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JPS55113987A - Electronic time limiting device - Google Patents

Electronic time limiting device

Info

Publication number
JPS55113987A
JPS55113987A JP2048679A JP2048679A JPS55113987A JP S55113987 A JPS55113987 A JP S55113987A JP 2048679 A JP2048679 A JP 2048679A JP 2048679 A JP2048679 A JP 2048679A JP S55113987 A JPS55113987 A JP S55113987A
Authority
JP
Japan
Prior art keywords
memories
information
indicator
timer
erased
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2048679A
Other languages
Japanese (ja)
Inventor
Takayasu Narita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP2048679A priority Critical patent/JPS55113987A/en
Publication of JPS55113987A publication Critical patent/JPS55113987A/en
Pending legal-status Critical Current

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Abstract

PURPOSE: To simplify the controller for an electronic time limiting device by operating twice clear switch when erasing all information of a plurality of timer memories and displaying all designations of the timer memories on an indicator by one operation.
CONSTITUTION: When a mode selector 5 selects a mode for calling the content of information memory for storing timer time, an indicator 8 indicates CALL. When a CLEAR key is initially operated in this mode, the indicator 8 indicates ALL to represent that all the timer memories of the information memories are designated on the indicator. Accordingly, when all the information is erased in the information memories, the operation can be confirmed. When the CLEAR key is again operated in this state, all the information in the memories are erased, and the indicator 8 switches to CALL to thus confirm that all are erased.
COPYRIGHT: (C)1980,JPO&Japio
JP2048679A 1979-02-23 1979-02-23 Electronic time limiting device Pending JPS55113987A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2048679A JPS55113987A (en) 1979-02-23 1979-02-23 Electronic time limiting device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2048679A JPS55113987A (en) 1979-02-23 1979-02-23 Electronic time limiting device

Publications (1)

Publication Number Publication Date
JPS55113987A true JPS55113987A (en) 1980-09-02

Family

ID=12028461

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2048679A Pending JPS55113987A (en) 1979-02-23 1979-02-23 Electronic time limiting device

Country Status (1)

Country Link
JP (1) JPS55113987A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61278784A (en) * 1985-06-03 1986-12-09 Omron Tateisi Electronics Co Electronic timer
JPS6391724A (en) * 1986-10-04 1988-04-22 Sharp Corp Reset display system for electronic computer

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61278784A (en) * 1985-06-03 1986-12-09 Omron Tateisi Electronics Co Electronic timer
JPS6391724A (en) * 1986-10-04 1988-04-22 Sharp Corp Reset display system for electronic computer

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