JPS55113323A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS55113323A JPS55113323A JP1976879A JP1976879A JPS55113323A JP S55113323 A JPS55113323 A JP S55113323A JP 1976879 A JP1976879 A JP 1976879A JP 1976879 A JP1976879 A JP 1976879A JP S55113323 A JPS55113323 A JP S55113323A
- Authority
- JP
- Japan
- Prior art keywords
- oxide film
- layer
- substrate
- poly
- gate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title abstract 2
- 239000004065 semiconductor Substances 0.000 title abstract 2
- 239000010410 layer Substances 0.000 abstract 5
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract 4
- 239000000758 substrate Substances 0.000 abstract 4
- 239000011229 interlayer Substances 0.000 abstract 2
- 238000007254 oxidation reaction Methods 0.000 abstract 2
- 239000000654 additive Substances 0.000 abstract 1
- 230000000996 additive effect Effects 0.000 abstract 1
- 230000007547 defect Effects 0.000 abstract 1
- 238000009792 diffusion process Methods 0.000 abstract 1
- 238000005530 etching Methods 0.000 abstract 1
- 150000002500 ions Chemical class 0.000 abstract 1
Abstract
PURPOSE: To prevent the lowering of threshold voltage Vth due to the addition of P, by making the ratio of the thickness of the gate oxide film and that of the inter-layer oxide film large in a two-layer poly-Si semiconductor device.
CONSTITUTION: Poly-Si layer 5 containing a P additive is laminated on field oxide film 2 and gate oxide film 3 provided on p-type Si substrate 1. Using oxide film 5 as a mask, etching is operated and thereby substrate 1 is exposed. By operating oxidization at high temperature, thick oxide film 5' is formed on inter-layer oxide film 5, and at the same time, gate oxide film 6 is formed on the surface of the substrate. Next, poly-Si layer 7 is provided and a part of the substrate is selectively exposed again. By injecting As ions, n+ layer 8 is formed. Since high-temperature oxidization of the gate region is operated after the P-added poly-Si layer is covered with a thick oxide film in this way, diffusion of P can be prevented, and a high- density gate film without defects is obtained, and at the same time, the lowering of threshold voltage Vth is prevented. By this structure, high-density-integration and high-speed devices are obtained with high manufacturing yields.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1976879A JPS55113323A (en) | 1979-02-23 | 1979-02-23 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1976879A JPS55113323A (en) | 1979-02-23 | 1979-02-23 | Manufacture of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS55113323A true JPS55113323A (en) | 1980-09-01 |
Family
ID=12008508
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1976879A Pending JPS55113323A (en) | 1979-02-23 | 1979-02-23 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS55113323A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5434098A (en) * | 1993-01-04 | 1995-07-18 | Vlsi Techology, Inc. | Double poly process with independently adjustable interpoly dielectric thickness |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5328382A (en) * | 1976-07-27 | 1978-03-16 | Mitsubishi Electric Corp | Production method of semiconductor devi ce |
JPS5363879A (en) * | 1976-11-18 | 1978-06-07 | Mitsubishi Electric Corp | Production of semiconductor device |
-
1979
- 1979-02-23 JP JP1976879A patent/JPS55113323A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5328382A (en) * | 1976-07-27 | 1978-03-16 | Mitsubishi Electric Corp | Production method of semiconductor devi ce |
JPS5363879A (en) * | 1976-11-18 | 1978-06-07 | Mitsubishi Electric Corp | Production of semiconductor device |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5434098A (en) * | 1993-01-04 | 1995-07-18 | Vlsi Techology, Inc. | Double poly process with independently adjustable interpoly dielectric thickness |
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