JPS5486202A - Addition unit for code distortion - Google Patents
Addition unit for code distortionInfo
- Publication number
- JPS5486202A JPS5486202A JP15488877A JP15488877A JPS5486202A JP S5486202 A JPS5486202 A JP S5486202A JP 15488877 A JP15488877 A JP 15488877A JP 15488877 A JP15488877 A JP 15488877A JP S5486202 A JPS5486202 A JP S5486202A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- signal
- counter
- change
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Dc Digital Transmission (AREA)
- Pulse Circuits (AREA)
- Manipulation Of Pulses (AREA)
Abstract
PURPOSE: To obtain a distortional-code addition unit with no need of adjustment points by composing a circuit, which detects the change point of a received code, of a R-SFF circuit, up-down counter, distortion setting switch circuit, D type FF circuit, change-over circuit, etc.
CONSTITUTION: Received signal A allows change-point detection circuit 7 to detect a change point and signal B is applied to gate circuits 13 and 14 via R-SFF9. Clock signal C inputted to terminal 12 is applied to the down input of up-down counter 11 via circuit 14 by the Q output of FF9 and to the up input of counter 11 via circuit 13 by the -Q output of FF9, and counter 11 outputs signal H, which is inputted to distortion setting switch circuit 3. Output signal I of circuit 3 having passed through gate 15 allows D type FFs 8 and 16 to sample the input signal; and gates 17 and 18 output signals M and N, and change-over circuit 19 signal P. According to the initial value of counter 11 and the set value of circuit 3, positive and negative distortions can be added freely without making adjustments.
COPYRIGHT: (C)1979,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15488877A JPS5486202A (en) | 1977-12-21 | 1977-12-21 | Addition unit for code distortion |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15488877A JPS5486202A (en) | 1977-12-21 | 1977-12-21 | Addition unit for code distortion |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5486202A true JPS5486202A (en) | 1979-07-09 |
JPS6160623B2 JPS6160623B2 (en) | 1986-12-22 |
Family
ID=15594142
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15488877A Granted JPS5486202A (en) | 1977-12-21 | 1977-12-21 | Addition unit for code distortion |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5486202A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5657354A (en) * | 1979-10-17 | 1981-05-19 | Fujitsu Ltd | Phase control circuit |
JPS5789360A (en) * | 1980-11-26 | 1982-06-03 | Nec Corp | Transmitting device |
-
1977
- 1977-12-21 JP JP15488877A patent/JPS5486202A/en active Granted
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5657354A (en) * | 1979-10-17 | 1981-05-19 | Fujitsu Ltd | Phase control circuit |
JPS5789360A (en) * | 1980-11-26 | 1982-06-03 | Nec Corp | Transmitting device |
Also Published As
Publication number | Publication date |
---|---|
JPS6160623B2 (en) | 1986-12-22 |
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