JPS5483307A - Automatic discrimination circuit for frequency tunning signal - Google Patents
Automatic discrimination circuit for frequency tunning signalInfo
- Publication number
- JPS5483307A JPS5483307A JP15131377A JP15131377A JPS5483307A JP S5483307 A JPS5483307 A JP S5483307A JP 15131377 A JP15131377 A JP 15131377A JP 15131377 A JP15131377 A JP 15131377A JP S5483307 A JPS5483307 A JP S5483307A
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- signal
- frequency
- outputted
- signals
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03J—TUNING RESONANT CIRCUITS; SELECTING RESONANT CIRCUITS
- H03J7/00—Automatic frequency control; Automatic scanning over a band of frequencies
- H03J7/02—Automatic frequency control
- H03J7/04—Automatic frequency control where the frequency control is accomplished by varying the electrical characteristics of a non-mechanically adjustable element or where the nature of the frequency controlling element is not significant
Landscapes
- Channel Selection Circuits, Automatic Tuning Circuits (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
PURPOSE:To obtain stable 3 kinds of signals corresponding to the direction of control even when an AFT signal level is changed by setting the threshold level to the AFT signal of S-figured characteristics in TV image receiving device. CONSTITUTION:After FM detection, AFT signals 11 and 12 with S-figured characteristics are applied to terminals 21 and 22 respectively and digital wave forms corresponding to the frequency of signals are outputted to terminals 34, 35 and 36 respectively through threshold level setting circuit 20, transistors 25 and 26 and NOR circuit 33. When the frequency exists in division BC, the voltage of signal 11 exceeds voltage V1 of the threshold level and wave form b is outputted to only terminal 34 and, when the frequency exists in division DE, the voltage of signal 12 exceeds voltage V1 and wave form c is outputted to only terminal 35; when the frequency exists in division CD, the voltage of signals 11 and 12 is lower than voltage V1, the voltage at tunning point F becomes standard voltage Vo and wave form d is outputted to only terminal 36.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15131377A JPS5483307A (en) | 1977-12-16 | 1977-12-16 | Automatic discrimination circuit for frequency tunning signal |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15131377A JPS5483307A (en) | 1977-12-16 | 1977-12-16 | Automatic discrimination circuit for frequency tunning signal |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5483307A true JPS5483307A (en) | 1979-07-03 |
Family
ID=15515908
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15131377A Pending JPS5483307A (en) | 1977-12-16 | 1977-12-16 | Automatic discrimination circuit for frequency tunning signal |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5483307A (en) |
-
1977
- 1977-12-16 JP JP15131377A patent/JPS5483307A/en active Pending
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