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JPS5470706A - Exchange system - Google Patents

Exchange system

Info

Publication number
JPS5470706A
JPS5470706A JP13761577A JP13761577A JPS5470706A JP S5470706 A JPS5470706 A JP S5470706A JP 13761577 A JP13761577 A JP 13761577A JP 13761577 A JP13761577 A JP 13761577A JP S5470706 A JPS5470706 A JP S5470706A
Authority
JP
Japan
Prior art keywords
module
highway
outgoing
processor
memory switch
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13761577A
Other languages
Japanese (ja)
Other versions
JPS6148318B2 (en
Inventor
Akio Moridera
Michimitsu Hattori
Yukio Ozawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP13761577A priority Critical patent/JPS5470706A/en
Publication of JPS5470706A publication Critical patent/JPS5470706A/en
Publication of JPS6148318B2 publication Critical patent/JPS6148318B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)

Abstract

PURPOSE:To reduce the transfer information between modules and thus to shorten the process time by controlling the memory switch with the processor for the module divided at the MGM-type exchange circuit network. CONSTITUTION:The incoming highway of module 30 is m-distributed, and one of the distributed highways is combined to the outgoing highway of module 30 via memory switch 21 within the self-module. And another highway is combined to the outgoing highway of module 30' via memory switch 21' of module 30'. The m-units of the memory switch connected to each module are provided at the outgoing highway side of each module and then controlled directly by control memory 23 based on the command given from module processor 10. Accordingly, only the idle/busy information of the outgoing trunk is transferred to the corresponding processor of the incoming trunk from the corresponding module processor against the desired outgoing trunk.
JP13761577A 1977-11-16 1977-11-16 Exchange system Granted JPS5470706A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13761577A JPS5470706A (en) 1977-11-16 1977-11-16 Exchange system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13761577A JPS5470706A (en) 1977-11-16 1977-11-16 Exchange system

Publications (2)

Publication Number Publication Date
JPS5470706A true JPS5470706A (en) 1979-06-06
JPS6148318B2 JPS6148318B2 (en) 1986-10-23

Family

ID=15202809

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13761577A Granted JPS5470706A (en) 1977-11-16 1977-11-16 Exchange system

Country Status (1)

Country Link
JP (1) JPS5470706A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5883494A (en) * 1981-11-13 1983-05-19 Nec Corp Channel device for time division exchange

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5883494A (en) * 1981-11-13 1983-05-19 Nec Corp Channel device for time division exchange

Also Published As

Publication number Publication date
JPS6148318B2 (en) 1986-10-23

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