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JPS5469930A - Nonvolatile memory read-out circuit - Google Patents

Nonvolatile memory read-out circuit

Info

Publication number
JPS5469930A
JPS5469930A JP13737877A JP13737877A JPS5469930A JP S5469930 A JPS5469930 A JP S5469930A JP 13737877 A JP13737877 A JP 13737877A JP 13737877 A JP13737877 A JP 13737877A JP S5469930 A JPS5469930 A JP S5469930A
Authority
JP
Japan
Prior art keywords
threshold
nonvolatile memory
out circuit
low
memory read
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13737877A
Other languages
Japanese (ja)
Other versions
JPS6057160B2 (en
Inventor
Akira Nakagawara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP52137378A priority Critical patent/JPS6057160B2/en
Publication of JPS5469930A publication Critical patent/JPS5469930A/en
Publication of JPS6057160B2 publication Critical patent/JPS6057160B2/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/04Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0466Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells with charge storage in an insulating layer, e.g. metal-nitride-oxide-silicon [MNOS], silicon-oxide-nitride-oxide-silicon [SONOS]

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)

Abstract

PURPOSE:To reduce the power consumption of a nonvolatile memory read-out circuit using an insulation-gate field effect transistor whose memory contents can be charged, by preventing a load transistor from turning on invariably. CONSTITUTION:When high-threshold and low-threshold read voltages are applied between terminals 16 and 17 while terminals 18 and 19 are at the same potential and load transistor Tr22 conducts, Tr20 will not operate and the potential of terminal 18 will not change neither with the threshold level or Tr20 set high, and Tr20 operates with that of Tr20 set low. As a result, the output of inverter 21 is inverted from a low level to a high level to make Tr22 conduct. Namely, Tr20 is OFF with Tr22 ON and Tr20 is ON with Tr22 OFF, so that the power consumption can be reduced by eliminating the state when the both conduct at the same time.
JP52137378A 1977-11-16 1977-11-16 non-volatile storage Expired JPS6057160B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP52137378A JPS6057160B2 (en) 1977-11-16 1977-11-16 non-volatile storage

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP52137378A JPS6057160B2 (en) 1977-11-16 1977-11-16 non-volatile storage

Publications (2)

Publication Number Publication Date
JPS5469930A true JPS5469930A (en) 1979-06-05
JPS6057160B2 JPS6057160B2 (en) 1985-12-13

Family

ID=15197278

Family Applications (1)

Application Number Title Priority Date Filing Date
JP52137378A Expired JPS6057160B2 (en) 1977-11-16 1977-11-16 non-volatile storage

Country Status (1)

Country Link
JP (1) JPS6057160B2 (en)

Also Published As

Publication number Publication date
JPS6057160B2 (en) 1985-12-13

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