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JPS5455138A - Input-output control system - Google Patents

Input-output control system

Info

Publication number
JPS5455138A
JPS5455138A JP12139777A JP12139777A JPS5455138A JP S5455138 A JPS5455138 A JP S5455138A JP 12139777 A JP12139777 A JP 12139777A JP 12139777 A JP12139777 A JP 12139777A JP S5455138 A JPS5455138 A JP S5455138A
Authority
JP
Japan
Prior art keywords
data
control data
flag
processed
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12139777A
Other languages
Japanese (ja)
Inventor
Michio Arai
Yukiro Shiraokawa
Tsutomu Sakamoto
Keizo Aoyanagi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP12139777A priority Critical patent/JPS5455138A/en
Publication of JPS5455138A publication Critical patent/JPS5455138A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To ignore unneeded data by providing a disregard code flag to any bit position of a channel control word.
CONSTITUTION: Eight-bit control part has a continuation assignment flat at its head, which determines whether the next control data is processed or not after the data process in the control part. When this flag is set, the process assigned by the control data is interrupted and its restart depends on interruption signal ATN on the next channel dedicated bus. Namely, the next control data is processed after the reception of interruption signal ATN from an apparatus. In an OFF time with the flag reset, the process of the next control data is done continuously
COPYRIGHT: (C)1979,JPO&Japio
JP12139777A 1977-10-12 1977-10-12 Input-output control system Pending JPS5455138A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12139777A JPS5455138A (en) 1977-10-12 1977-10-12 Input-output control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12139777A JPS5455138A (en) 1977-10-12 1977-10-12 Input-output control system

Publications (1)

Publication Number Publication Date
JPS5455138A true JPS5455138A (en) 1979-05-02

Family

ID=14810168

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12139777A Pending JPS5455138A (en) 1977-10-12 1977-10-12 Input-output control system

Country Status (1)

Country Link
JP (1) JPS5455138A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5624626A (en) * 1979-08-02 1981-03-09 Nec Corp Data processing system
JPS62296258A (en) * 1986-06-16 1987-12-23 Fujitsu Ltd Subchannel command word storage method

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5624626A (en) * 1979-08-02 1981-03-09 Nec Corp Data processing system
JPS62296258A (en) * 1986-06-16 1987-12-23 Fujitsu Ltd Subchannel command word storage method
JPH0531778B2 (en) * 1986-06-16 1993-05-13 Fujitsu Kk

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