JPS5450269A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS5450269A JPS5450269A JP11716777A JP11716777A JPS5450269A JP S5450269 A JPS5450269 A JP S5450269A JP 11716777 A JP11716777 A JP 11716777A JP 11716777 A JP11716777 A JP 11716777A JP S5450269 A JPS5450269 A JP S5450269A
- Authority
- JP
- Japan
- Prior art keywords
- melting point
- solder layer
- tin
- silver
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title 1
- 230000008018 melting Effects 0.000 abstract 6
- 238000002844 melting Methods 0.000 abstract 6
- 229910000679 solder Inorganic materials 0.000 abstract 6
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 abstract 2
- 239000008188 pellet Substances 0.000 abstract 2
- 229910052709 silver Inorganic materials 0.000 abstract 2
- 239000004332 silver Substances 0.000 abstract 2
- 239000000758 substrate Substances 0.000 abstract 2
- 230000007774 longterm Effects 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/2612—Auxiliary members for layer connectors, e.g. spacers
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Die Bonding (AREA)
Abstract
PURPOSE: To mount pellets to a substrate by sandwiching a high melting point solder layer with low melting point solder layers.
CONSTITUTION: Low melting point solder layers 2b, 2b' of 200 to 220°C in melting point mainly composed of silver and tin are laminated on the front and back of a high melting point solder layer 2a of 300 to 350°C in melting point mainly composed of silver, tin and lead. When the solder layers 2 are heated at 200 to 220°C on a substrate 1, a pellet 3 is bonded at a uniform thickness by the high temperature solder layer 2a, thus it does not bocome brittle owing to thermal fatigue despite long term operation
COPYRIGHT: (C)1979,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11716777A JPS5450269A (en) | 1977-09-28 | 1977-09-28 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11716777A JPS5450269A (en) | 1977-09-28 | 1977-09-28 | Semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5450269A true JPS5450269A (en) | 1979-04-20 |
Family
ID=14705099
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11716777A Pending JPS5450269A (en) | 1977-09-28 | 1977-09-28 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5450269A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60176244A (en) * | 1984-02-22 | 1985-09-10 | Sumitomo Electric Ind Ltd | Adhesive part of semiconductor device |
US4677741A (en) * | 1981-11-30 | 1987-07-07 | Mitsubishi Denki Kabushiki Kaisha | Method of manufacturing package for high power integrated circuit |
JPS63155732A (en) * | 1986-12-19 | 1988-06-28 | Agency Of Ind Science & Technol | Semiconductor device |
US5470787A (en) * | 1994-05-02 | 1995-11-28 | Motorola, Inc. | Semiconductor device solder bump having intrinsic potential for forming an extended eutectic region and method for making and using the same |
WO2001091176A3 (en) * | 2000-05-23 | 2002-04-18 | Unitive Electronics Inc | Trilayer/bilayer solder bumps and fabrication methods therefor |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS51118372A (en) * | 1975-04-10 | 1976-10-18 | Hitachi Cable Ltd | Solder for semiconductor unit |
-
1977
- 1977-09-28 JP JP11716777A patent/JPS5450269A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS51118372A (en) * | 1975-04-10 | 1976-10-18 | Hitachi Cable Ltd | Solder for semiconductor unit |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4677741A (en) * | 1981-11-30 | 1987-07-07 | Mitsubishi Denki Kabushiki Kaisha | Method of manufacturing package for high power integrated circuit |
JPS60176244A (en) * | 1984-02-22 | 1985-09-10 | Sumitomo Electric Ind Ltd | Adhesive part of semiconductor device |
JPS63155732A (en) * | 1986-12-19 | 1988-06-28 | Agency Of Ind Science & Technol | Semiconductor device |
JPH0325933B2 (en) * | 1986-12-19 | 1991-04-09 | Kogyo Gijutsuin | |
US5470787A (en) * | 1994-05-02 | 1995-11-28 | Motorola, Inc. | Semiconductor device solder bump having intrinsic potential for forming an extended eutectic region and method for making and using the same |
WO2001091176A3 (en) * | 2000-05-23 | 2002-04-18 | Unitive Electronics Inc | Trilayer/bilayer solder bumps and fabrication methods therefor |
US6492197B1 (en) | 2000-05-23 | 2002-12-10 | Unitive Electronics Inc. | Trilayer/bilayer solder bumps and fabrication methods therefor |
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