[go: up one dir, main page]

JPS54159865A - Forming method of electrode - Google Patents

Forming method of electrode

Info

Publication number
JPS54159865A
JPS54159865A JP6860478A JP6860478A JPS54159865A JP S54159865 A JPS54159865 A JP S54159865A JP 6860478 A JP6860478 A JP 6860478A JP 6860478 A JP6860478 A JP 6860478A JP S54159865 A JPS54159865 A JP S54159865A
Authority
JP
Japan
Prior art keywords
electrode
lift
etching
metallic layer
protruded
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6860478A
Other languages
Japanese (ja)
Inventor
Ikuo Tomita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP6860478A priority Critical patent/JPS54159865A/en
Publication of JPS54159865A publication Critical patent/JPS54159865A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods

Landscapes

  • Apparatuses And Processes For Manufacturing Resistors (AREA)

Abstract

PURPOSE: To form a protruded electrode safely and surely by combining the etching method and the lift-off method to remove the part other than the electrode part after the protruded electrode is caused to adhere onto a foundation metallic pattern.
CONSTITUTION: The conventional production method goes to the forming of protruded electrode 9. Next, photo resistor layer 7 and Cu adhesion metallic layer 6 of upper layers for electrode forming are removed by etching. In this case, since the selectivity of Cu adhesion metallic layer 6 is good and Cr and Al are not etched, the side lower part of the electrode is sufficiently safe from etching. When adopting the lift-off method under this state, a lift-off state can be realized easily because Cr adhesion metallic layer 5 is thin and pin holes, etc., exist.
COPYRIGHT: (C)1979,JPO&Japio
JP6860478A 1978-06-07 1978-06-07 Forming method of electrode Pending JPS54159865A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6860478A JPS54159865A (en) 1978-06-07 1978-06-07 Forming method of electrode

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6860478A JPS54159865A (en) 1978-06-07 1978-06-07 Forming method of electrode

Publications (1)

Publication Number Publication Date
JPS54159865A true JPS54159865A (en) 1979-12-18

Family

ID=13378540

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6860478A Pending JPS54159865A (en) 1978-06-07 1978-06-07 Forming method of electrode

Country Status (1)

Country Link
JP (1) JPS54159865A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1982003727A1 (en) * 1981-04-21 1982-10-28 Seiichiro Aigoo Method of making a semiconductor device having a projecting,plated electrode
JPS58142547A (en) * 1982-02-18 1983-08-24 Nec Corp Manufacture of semiconductor device
US5349239A (en) * 1991-07-04 1994-09-20 Sharp Kabushiki Kaisha Vertical type construction transistor
US5444300A (en) * 1991-08-09 1995-08-22 Sharp Kabushiki Kaisha Semiconductor apparatus with heat sink

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1982003727A1 (en) * 1981-04-21 1982-10-28 Seiichiro Aigoo Method of making a semiconductor device having a projecting,plated electrode
JPS58142547A (en) * 1982-02-18 1983-08-24 Nec Corp Manufacture of semiconductor device
US5349239A (en) * 1991-07-04 1994-09-20 Sharp Kabushiki Kaisha Vertical type construction transistor
US5444300A (en) * 1991-08-09 1995-08-22 Sharp Kabushiki Kaisha Semiconductor apparatus with heat sink

Similar Documents

Publication Publication Date Title
IE791715L (en) Manufacture of integrated circuits
JPS5669835A (en) Method for forming thin film pattern
JPS54159865A (en) Forming method of electrode
EP0304077A3 (en) Method of forming a fine pattern
JPS5487172A (en) Manufacture for simiconductor device
JPS5418279A (en) Pattern formation method
JPS55124698A (en) Printing mask
JPS6414710A (en) Production of thin film magnetic head
JPS6459936A (en) Manufacture of integrated circuit
JPS5516433A (en) Method of forming multilayer distributing layer
JPS5752130A (en) Forming method for electrode
JPS5713740A (en) Forming method for conductor pattern
JPS5596654A (en) Method of fabricating semiconductor device
JPS5325384A (en) Forming method of conductive patte rn
JPS55130148A (en) Forming method of bump electrode
JPS5391635A (en) Forming method for magnetic film pattern
JPS5720370A (en) Production of thermal head
JPS52117550A (en) Electrode formation method
JPS5513982A (en) Producing method of microscopic pattern
JPS6466942A (en) Formation of thin-film pattern
JPS56123879A (en) Thick film circuit substrate
JPS54162460A (en) Electrode forming method
JPS53126879A (en) Formation mathod of electrode wiring layer
JPS52113679A (en) Sputter etching method
JPS56150829A (en) Manufacture of aperture iris