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JPS54156420A - Interlace control circuit for television receivers - Google Patents

Interlace control circuit for television receivers

Info

Publication number
JPS54156420A
JPS54156420A JP6421678A JP6421678A JPS54156420A JP S54156420 A JPS54156420 A JP S54156420A JP 6421678 A JP6421678 A JP 6421678A JP 6421678 A JP6421678 A JP 6421678A JP S54156420 A JPS54156420 A JP S54156420A
Authority
JP
Japan
Prior art keywords
circuit
video signal
control circuit
small picture
field
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6421678A
Other languages
Japanese (ja)
Other versions
JPS5937913B2 (en
Inventor
Toshiyuki Katagiri
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Home Electronics Ltd
NEC Corp
Original Assignee
NEC Home Electronics Ltd
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Home Electronics Ltd, Nippon Electric Co Ltd filed Critical NEC Home Electronics Ltd
Priority to JP6421678A priority Critical patent/JPS5937913B2/en
Publication of JPS54156420A publication Critical patent/JPS54156420A/en
Publication of JPS5937913B2 publication Critical patent/JPS5937913B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Synchronizing For Television (AREA)
  • Details Of Television Scanning (AREA)

Abstract

PURPOSE:To constitute the control circuit which suitably performs the interlace for a small picture, in TV receivers picturing a small picture within the standard screen at the same time. CONSTITUTION:The synchronism separation circuit 27 separating vertical and horizontal synchronizing signals included in the small picture video signal, and the synchronism separation circuit 13 separating those included in the large screen video signal, are provided. Further, the memory unit 24 constituted with the memory corresponding to the first and second field memorizing the small picture video signal, frame detection circuit 33 determining the video signal whether it is in the first or second field, based on the both synchronizing signals separated at the circuit 27, and the frame detection circuit 45 discriminating the video signal whether it is in the first or second field based on the both synchronizing signal separated from the circuit 27, are provided. Moreover, based on the synchronizing signal of the circuit 13 or circuit 27, the memory control circuit 28 which controls the readout and write-in of the video signals of small and large screen to the memory unit 24, is provided.
JP6421678A 1978-05-31 1978-05-31 Interlace control circuit for television receivers Expired JPS5937913B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6421678A JPS5937913B2 (en) 1978-05-31 1978-05-31 Interlace control circuit for television receivers

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6421678A JPS5937913B2 (en) 1978-05-31 1978-05-31 Interlace control circuit for television receivers

Publications (2)

Publication Number Publication Date
JPS54156420A true JPS54156420A (en) 1979-12-10
JPS5937913B2 JPS5937913B2 (en) 1984-09-12

Family

ID=13251664

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6421678A Expired JPS5937913B2 (en) 1978-05-31 1978-05-31 Interlace control circuit for television receivers

Country Status (1)

Country Link
JP (1) JPS5937913B2 (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5531153U (en) * 1978-08-18 1980-02-28
JPS55153484A (en) * 1979-05-18 1980-11-29 Hitachi Ltd Interlace correction circuit for two screen television receiver
JPS6221381A (en) * 1985-07-19 1987-01-29 Matsushita Electric Ind Co Ltd Two screen television receiver
JPS6324767A (en) * 1986-06-10 1988-02-02 コーニンクレッカ　フィリップス　エレクトロニクス　エヌ　ヴィ Television image display
US4724487A (en) * 1987-02-17 1988-02-09 Rca Corporation Interlace inversion detector for a picture-in-picture video signal generator
US4918518A (en) * 1988-06-15 1990-04-17 North American Philips Corporation Method and apparatus for the recording and replay of interlaced signals
US5883610A (en) * 1995-12-15 1999-03-16 Samsung Electronics Co., Ltd. Graphics overlay device

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS611199U (en) * 1984-06-11 1986-01-07 三洋電機株式会社 Wick adjustment knob for upper and lower wick type combustor

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5940684Y2 (en) * 1978-08-18 1984-11-19 三菱電機株式会社 Sheet alignment and feeding device
JPS5531153U (en) * 1978-08-18 1980-02-28
JPS55153484A (en) * 1979-05-18 1980-11-29 Hitachi Ltd Interlace correction circuit for two screen television receiver
JPS6222506B2 (en) * 1979-05-18 1987-05-18 Hitachi Ltd
JPH0564911B2 (en) * 1985-07-19 1993-09-16 Matsushita Electric Ind Co Ltd
JPS6221381A (en) * 1985-07-19 1987-01-29 Matsushita Electric Ind Co Ltd Two screen television receiver
DE3690375C2 (en) * 1985-07-19 1989-08-17 Matsushita Electric Industrial Co., Ltd., Kadoma, Osaka, Jp
JPS6324767A (en) * 1986-06-10 1988-02-02 コーニンクレッカ　フィリップス　エレクトロニクス　エヌ　ヴィ Television image display
JP2928803B2 (en) * 1986-06-10 1999-08-03 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ Television image display
US4724487A (en) * 1987-02-17 1988-02-09 Rca Corporation Interlace inversion detector for a picture-in-picture video signal generator
GB2201317B (en) * 1987-02-17 1991-07-17 Rca Licensing Corp Picture-in-picture video signal generator
US4918518A (en) * 1988-06-15 1990-04-17 North American Philips Corporation Method and apparatus for the recording and replay of interlaced signals
US5883610A (en) * 1995-12-15 1999-03-16 Samsung Electronics Co., Ltd. Graphics overlay device

Also Published As

Publication number Publication date
JPS5937913B2 (en) 1984-09-12

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