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JPS54152470A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS54152470A
JPS54152470A JP6149078A JP6149078A JPS54152470A JP S54152470 A JPS54152470 A JP S54152470A JP 6149078 A JP6149078 A JP 6149078A JP 6149078 A JP6149078 A JP 6149078A JP S54152470 A JPS54152470 A JP S54152470A
Authority
JP
Japan
Prior art keywords
electrode
particles
external lead
ferromagnetic substance
chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6149078A
Other languages
Japanese (ja)
Inventor
Takashi Miyamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP6149078A priority Critical patent/JPS54152470A/en
Publication of JPS54152470A publication Critical patent/JPS54152470A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation

Landscapes

  • Wire Bonding (AREA)

Abstract

PURPOSE: To simplify the fabrication by connecting an electrode to an external lead via metal particles making use of the nature of a ferromagnetic substance.
CONSTITUTION: The electrode of semiconductor chip 1' is obtained by stacking Cr8, Ni9 and Au10 on Al wiring 7, and parts except the electode are covered with SiO2 11. A magnetic filed perpendicular to the main surface is applied, the electrode is made close to particles of the ferromagnetic substance, and chip 11 is vibrated to shake excessive sticking particles off. An optimum quantity of metal particles 6' are stuck to the electrode and positioned to the external lead pattern on ceramic substrate 2 and a connection is made by heat or pressure. Thermal pressure welding of gold is not always necessary and using solder-plated particles makes it possible to make a definite connection only by heating; when the connection part of the external lead is formed of a ferromagnetic substance, the chip self-corrects the position even if a slight shift in position occurs, so that the process will become simpler.
COPYRIGHT: (C)1979,JPO&Japio
JP6149078A 1978-05-22 1978-05-22 Semiconductor device Pending JPS54152470A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6149078A JPS54152470A (en) 1978-05-22 1978-05-22 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6149078A JPS54152470A (en) 1978-05-22 1978-05-22 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS54152470A true JPS54152470A (en) 1979-11-30

Family

ID=13172576

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6149078A Pending JPS54152470A (en) 1978-05-22 1978-05-22 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS54152470A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0362536A (en) * 1989-07-31 1991-03-18 Canon Inc Spreading of conductive particles
JPH0374852A (en) * 1989-08-17 1991-03-29 Canon Inc Interconnecting method for electrode terminals
WO2002067317A1 (en) * 2001-02-19 2002-08-29 Sony Chemicals Corp. Bumpless semiconductor device

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0362536A (en) * 1989-07-31 1991-03-18 Canon Inc Spreading of conductive particles
JPH0374852A (en) * 1989-08-17 1991-03-29 Canon Inc Interconnecting method for electrode terminals
WO2002067317A1 (en) * 2001-02-19 2002-08-29 Sony Chemicals Corp. Bumpless semiconductor device
US7109058B2 (en) 2001-02-19 2006-09-19 Sony Chemicals Corp. Bumpless semiconductor device
CN100342513C (en) * 2001-02-19 2007-10-10 索尼化学&信息部件株式会社 Bumpless semiconductor device
US7638876B2 (en) 2001-02-19 2009-12-29 Sony Chemical & Information Device Corporation Bumpless semiconductor device

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