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JPS54150981A - Junction-type field effect transistor - Google Patents

Junction-type field effect transistor

Info

Publication number
JPS54150981A
JPS54150981A JP5970878A JP5970878A JPS54150981A JP S54150981 A JPS54150981 A JP S54150981A JP 5970878 A JP5970878 A JP 5970878A JP 5970878 A JP5970878 A JP 5970878A JP S54150981 A JPS54150981 A JP S54150981A
Authority
JP
Japan
Prior art keywords
electrode
gate
region
constitution
junction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5970878A
Other languages
Japanese (ja)
Inventor
Kosuke Yasuno
Kosei Kajiwara
Tatsunori Nakajima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP5970878A priority Critical patent/JPS54150981A/en
Publication of JPS54150981A publication Critical patent/JPS54150981A/en
Pending legal-status Critical Current

Links

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

PURPOSE: To prevent the deterioration of characteristics caused by the mobile ion by extending the electrode onto the surface of the gate region via the insulator film to be connected to the isolation layer.
CONSTITUTION: Metal electrode 9 is provided on the surface of gate region 3 via insulator film 8 to reach isolation region 1 surface and then connect to region 1 piercing through film 8. Electrode 9 forms the MIS structure along with gate 3 and the semiconductor surface near gate 3. Thus, the plus (+) mobile ions never gather on the semiconductor interface even if the bias temperature treatment is given to the J-FET of such constitution. Furthermore, electrode 9 can be formed in the same process as conventional except for the mask alteration of the photo graphic process, thus featuring an extremely simple manufacture.
COPYRIGHT: (C)1979,JPO&Japio
JP5970878A 1978-05-18 1978-05-18 Junction-type field effect transistor Pending JPS54150981A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5970878A JPS54150981A (en) 1978-05-18 1978-05-18 Junction-type field effect transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5970878A JPS54150981A (en) 1978-05-18 1978-05-18 Junction-type field effect transistor

Publications (1)

Publication Number Publication Date
JPS54150981A true JPS54150981A (en) 1979-11-27

Family

ID=13120974

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5970878A Pending JPS54150981A (en) 1978-05-18 1978-05-18 Junction-type field effect transistor

Country Status (1)

Country Link
JP (1) JPS54150981A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS572672U (en) * 1980-06-05 1982-01-08
JP2006513580A (en) * 2003-01-29 2006-04-20 株式会社東芝 Power semiconductor element

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS572672U (en) * 1980-06-05 1982-01-08
JPS6218056Y2 (en) * 1980-06-05 1987-05-09
JP2006513580A (en) * 2003-01-29 2006-04-20 株式会社東芝 Power semiconductor element

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