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JPS54129937A - Bus control system - Google Patents

Bus control system

Info

Publication number
JPS54129937A
JPS54129937A JP3762578A JP3762578A JPS54129937A JP S54129937 A JPS54129937 A JP S54129937A JP 3762578 A JP3762578 A JP 3762578A JP 3762578 A JP3762578 A JP 3762578A JP S54129937 A JPS54129937 A JP S54129937A
Authority
JP
Japan
Prior art keywords
bus
speed
mmu24
acu26
throughput
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3762578A
Other languages
Japanese (ja)
Inventor
Takashi Rokutanda
Yukiro Shiraokawa
Keizo Aoyanagi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP3762578A priority Critical patent/JPS54129937A/en
Publication of JPS54129937A publication Critical patent/JPS54129937A/en
Pending legal-status Critical Current

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  • Debugging And Monitoring (AREA)

Abstract

PURPOSE: To improve the throughput of a system by using two independent buses and by making the control of either one independent of a CPU.
CONSTITUTION: Using high-speed H bus 22 and low-speed L bus 23 by which inputting and outputting are performed efficiently, the CPU consists of main memory unit MMU24, bus controller BC25, and arithmetic processor ACU26. The H bus 22 has the data width of 32 bits, for example, and can transfer information at a high speed while connecting via BC25 to various input-output devices I/Os 28 such as MMU24, ACU26, high-speed multiplexer MPX27, and direct memory address DMA. Then, L bus 23 has the data width of eight bits, for example, and connects via low-speed bus 23 to I/O devices 29. On receiving a bus acquisition request from a main unit, BC25 sends out a bus-occupation permission signal and supervises the transmission time of this signal; when the time exceeds a fixed value, the transmission of the bus-occupation permission signal is stopped until the reception of the bus acquisition request, thereby improving the throughput of the system.
COPYRIGHT: (C)1979,JPO&Japio
JP3762578A 1978-03-31 1978-03-31 Bus control system Pending JPS54129937A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3762578A JPS54129937A (en) 1978-03-31 1978-03-31 Bus control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3762578A JPS54129937A (en) 1978-03-31 1978-03-31 Bus control system

Publications (1)

Publication Number Publication Date
JPS54129937A true JPS54129937A (en) 1979-10-08

Family

ID=12502808

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3762578A Pending JPS54129937A (en) 1978-03-31 1978-03-31 Bus control system

Country Status (1)

Country Link
JP (1) JPS54129937A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5696311A (en) * 1979-12-28 1981-08-04 Fujitsu Ltd Bus centralized monitoring system
JPS5696310A (en) * 1979-12-28 1981-08-04 Fujitsu Ltd Centralized control system of bus

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5147497A (en) * 1974-10-21 1976-04-23 Glory Kogyo Kk SHOHINJIDOHANBAIKINIOKERUSHOHINTOSHUTSUHOSHIKI
JPS5427738A (en) * 1977-08-03 1979-03-02 Toshiba Corp Bus stall processing system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5147497A (en) * 1974-10-21 1976-04-23 Glory Kogyo Kk SHOHINJIDOHANBAIKINIOKERUSHOHINTOSHUTSUHOSHIKI
JPS5427738A (en) * 1977-08-03 1979-03-02 Toshiba Corp Bus stall processing system

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5696311A (en) * 1979-12-28 1981-08-04 Fujitsu Ltd Bus centralized monitoring system
JPS5696310A (en) * 1979-12-28 1981-08-04 Fujitsu Ltd Centralized control system of bus
JPS5845050B2 (en) * 1979-12-28 1983-10-06 富士通株式会社 Bus centralized monitoring system

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