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JPS54126476A - Offset voltage measuring method of semiconductor integrated operational amplifier circuit - Google Patents

Offset voltage measuring method of semiconductor integrated operational amplifier circuit

Info

Publication number
JPS54126476A
JPS54126476A JP3430278A JP3430278A JPS54126476A JP S54126476 A JPS54126476 A JP S54126476A JP 3430278 A JP3430278 A JP 3430278A JP 3430278 A JP3430278 A JP 3430278A JP S54126476 A JPS54126476 A JP S54126476A
Authority
JP
Japan
Prior art keywords
voltage
expression
indicated
offset
offset voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3430278A
Other languages
Japanese (ja)
Inventor
Takashi Yamaguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP3430278A priority Critical patent/JPS54126476A/en
Publication of JPS54126476A publication Critical patent/JPS54126476A/en
Pending legal-status Critical Current

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  • Testing Of Individual Semiconductor Devices (AREA)
  • Tests Of Electronic Circuits (AREA)

Abstract

PURPOSE: To simplify measurement by measuring previously the offset voltage at the time when one input bias resistance having a known value is inserted to the input to terminal of an operational amplifier and calculating the offset voltage at the time, when a differnt bias resistance is inserted, by an arithmetic processing circuit.
CONSTITUTION: In measurement of offset voltage V103 in case of input bias resistance "0", contacts a and b of lead relay K1 are short-circuited previously, and output voltage V03 of null amplifier 2 is measured by measuring circuit 3 and is digitized, and this digitized value is first stored in arithmetic processing circuit 4. Next, contacts a and b are opened to connect bias resistances RSa and RSb, and output voltage V04 obtained under this state is measured, and difference vltage V05 between this voltage V04 and voltage V03 stored in circuit 4 is obtained, and offset current IOFF1 indicated by expression-(3) is obtained from this voltage V05. After that, offset current IOFF2 indicated by expression-(4) is obtained from voltage VOX2 at the time when different bias resistance RX is connected, and voltage VOX2 indicated by expression-(5) is calculated from expressions-(3) and (4) to obtain desired voltage VOX1 to be measured, which is indicated by expression-(6).
COPYRIGHT: (C)1979,JPO&Japio
JP3430278A 1978-03-24 1978-03-24 Offset voltage measuring method of semiconductor integrated operational amplifier circuit Pending JPS54126476A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3430278A JPS54126476A (en) 1978-03-24 1978-03-24 Offset voltage measuring method of semiconductor integrated operational amplifier circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3430278A JPS54126476A (en) 1978-03-24 1978-03-24 Offset voltage measuring method of semiconductor integrated operational amplifier circuit

Publications (1)

Publication Number Publication Date
JPS54126476A true JPS54126476A (en) 1979-10-01

Family

ID=12410351

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3430278A Pending JPS54126476A (en) 1978-03-24 1978-03-24 Offset voltage measuring method of semiconductor integrated operational amplifier circuit

Country Status (1)

Country Link
JP (1) JPS54126476A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
RU2612872C1 (en) * 2016-01-14 2017-03-13 Акционерное общество "Российская корпорация ракетно-космического приборостроения и информационных систем" (АО "Российские космические системы") Device for measuring electrical parameters of operational amplifiers and voltage comparators
CN110361646A (en) * 2019-07-12 2019-10-22 北京华峰测控技术股份有限公司 A kind of operational amplifier test circuit and test method
CN117092484A (en) * 2023-07-04 2023-11-21 江苏润石科技有限公司 High-speed operational amplifier test circuit and test method thereof
CN117214661A (en) * 2023-09-11 2023-12-12 无锡市晶源微电子股份有限公司 Input offset voltage testing device for operational amplifier

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
RU2612872C1 (en) * 2016-01-14 2017-03-13 Акционерное общество "Российская корпорация ракетно-космического приборостроения и информационных систем" (АО "Российские космические системы") Device for measuring electrical parameters of operational amplifiers and voltage comparators
CN110361646A (en) * 2019-07-12 2019-10-22 北京华峰测控技术股份有限公司 A kind of operational amplifier test circuit and test method
CN110361646B (en) * 2019-07-12 2024-01-02 北京华峰测控技术股份有限公司 Operational amplifier test circuit and test method
CN117092484A (en) * 2023-07-04 2023-11-21 江苏润石科技有限公司 High-speed operational amplifier test circuit and test method thereof
CN117214661A (en) * 2023-09-11 2023-12-12 无锡市晶源微电子股份有限公司 Input offset voltage testing device for operational amplifier
CN117214661B (en) * 2023-09-11 2024-04-19 无锡市晶源微电子股份有限公司 Input offset voltage testing device for operational amplifier

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