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JPS54114136A - Microprogram loading system - Google Patents

Microprogram loading system

Info

Publication number
JPS54114136A
JPS54114136A JP2182678A JP2182678A JPS54114136A JP S54114136 A JPS54114136 A JP S54114136A JP 2182678 A JP2182678 A JP 2182678A JP 2182678 A JP2182678 A JP 2182678A JP S54114136 A JPS54114136 A JP S54114136A
Authority
JP
Japan
Prior art keywords
processor
microprogram
rank
signal line
loading
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2182678A
Other languages
Japanese (ja)
Inventor
Yutaka Takeuchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP2182678A priority Critical patent/JPS54114136A/en
Publication of JPS54114136A publication Critical patent/JPS54114136A/en
Pending legal-status Critical Current

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  • Multi Processors (AREA)

Abstract

PURPOSE: To reduce the number of the load exclusive signal line as well as the hardware quantity by performing the program loading to the lower-rank processor by making use of the function with which the higher-rank processor can control the lower-rank processor.
CONSTITUTION: When the device power source is thrown in, the microprogram is loaded to higher-rank processor 1 via load device 5. And the microprogram necessary for loading of the microprogram to lower-rank processor 2 is prepared at the microprogram. Then the loaded microprogram is executed by the higher-rank processor, and thus processor 1 reads out the microprogram of processor 2 via external memory unit 6 to then write it into control memory unit 4 of processor 2 through load device 5, signal line 7, processor 1 and signal line 9 respectively. Thus, the microprogram loading completes.
COPYRIGHT: (C)1979,JPO&Japio
JP2182678A 1978-02-27 1978-02-27 Microprogram loading system Pending JPS54114136A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2182678A JPS54114136A (en) 1978-02-27 1978-02-27 Microprogram loading system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2182678A JPS54114136A (en) 1978-02-27 1978-02-27 Microprogram loading system

Publications (1)

Publication Number Publication Date
JPS54114136A true JPS54114136A (en) 1979-09-06

Family

ID=12065858

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2182678A Pending JPS54114136A (en) 1978-02-27 1978-02-27 Microprogram loading system

Country Status (1)

Country Link
JP (1) JPS54114136A (en)

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5730012A (en) * 1980-07-30 1982-02-18 Fujitsu Ltd Program loading system
JPS57174962A (en) * 1981-04-20 1982-10-27 Toshiba Corp Modem for two-wire type half duplex communication
WO1982003708A1 (en) * 1981-04-22 1982-10-28 Kurakake Mitsuo Data processing system
JPS58158759A (en) * 1982-03-16 1983-09-21 Nec Corp Information processing device
JPS58197566A (en) * 1982-05-12 1983-11-17 Fujitsu Ltd Control system for program loading
JPS5945574A (en) * 1982-09-06 1984-03-14 Fujitsu Ltd System configuration method
JPS5990159A (en) * 1982-11-12 1984-05-24 Sharp Corp Multi-cpu starting system
JPH0264759A (en) * 1988-08-31 1990-03-05 Nec Corp Input/output processor
JPH0581034A (en) * 1991-08-03 1993-04-02 Olympus Optical Co Ltd Automatic analysis apparatus
JPH08263297A (en) * 1995-03-27 1996-10-11 Nippon Denki Ido Tsushin Kk Program booting system

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS522346A (en) * 1975-06-24 1977-01-10 Nec Corp Terminal equipment program loading system
JPS5248938A (en) * 1975-10-17 1977-04-19 Nippon Telegr & Teleph Corp <Ntt> Initial program load system
JPS52142443A (en) * 1976-05-21 1977-11-28 Mitsubishi Electric Corp Microprogram write-in method

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS522346A (en) * 1975-06-24 1977-01-10 Nec Corp Terminal equipment program loading system
JPS5248938A (en) * 1975-10-17 1977-04-19 Nippon Telegr & Teleph Corp <Ntt> Initial program load system
JPS52142443A (en) * 1976-05-21 1977-11-28 Mitsubishi Electric Corp Microprogram write-in method

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5730012A (en) * 1980-07-30 1982-02-18 Fujitsu Ltd Program loading system
JPS57174962A (en) * 1981-04-20 1982-10-27 Toshiba Corp Modem for two-wire type half duplex communication
WO1982003708A1 (en) * 1981-04-22 1982-10-28 Kurakake Mitsuo Data processing system
JPS58158759A (en) * 1982-03-16 1983-09-21 Nec Corp Information processing device
JPS58197566A (en) * 1982-05-12 1983-11-17 Fujitsu Ltd Control system for program loading
JPS5945574A (en) * 1982-09-06 1984-03-14 Fujitsu Ltd System configuration method
JPS5990159A (en) * 1982-11-12 1984-05-24 Sharp Corp Multi-cpu starting system
JPH0264759A (en) * 1988-08-31 1990-03-05 Nec Corp Input/output processor
JPH0581034A (en) * 1991-08-03 1993-04-02 Olympus Optical Co Ltd Automatic analysis apparatus
JPH08263297A (en) * 1995-03-27 1996-10-11 Nippon Denki Ido Tsushin Kk Program booting system

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