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JPS54102846A - Signal holding circuit - Google Patents

Signal holding circuit

Info

Publication number
JPS54102846A
JPS54102846A JP907978A JP907978A JPS54102846A JP S54102846 A JPS54102846 A JP S54102846A JP 907978 A JP907978 A JP 907978A JP 907978 A JP907978 A JP 907978A JP S54102846 A JPS54102846 A JP S54102846A
Authority
JP
Japan
Prior art keywords
gate
signal
time
neutralize
inputted
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP907978A
Other languages
Japanese (ja)
Inventor
Mamoru Maeda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ricoh Co Ltd
Original Assignee
Ricoh Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ricoh Co Ltd filed Critical Ricoh Co Ltd
Priority to JP907978A priority Critical patent/JPS54102846A/en
Publication of JPS54102846A publication Critical patent/JPS54102846A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To reduce noise at the time of gate switching, and also to improve reliability by generating a signal of the opposite polarity to a gate control signal by a pulse transformer and then by applying it to neutralize a signal which appears at a gate output side through a floating capacity. CONSTITUTION:As gate control signal B2''H'' is inputted to the primary side of pulse transformer 14 at time (t1), signal B2a''H'' amplifying B2 is inputted to the control terminal of input gate 11 to turn ON gate 11, and capacitor C12 is charged by high-level input signal A2. At this time, signal C2''L'' inverting B2a is applied from the variable output terminal of variable resistor 19 of transformer 14 to the output terminal of gate 11 through neutralizing capacitor C22 to neutralize B2a appearing at the output side of gate 11 through floating capacity 21. As a result, C12 is charged only by A2 and the charge voltage of C12 is amplified 13, so that the high level of A2 will be held as it is without being influenced by noise.
JP907978A 1978-01-30 1978-01-30 Signal holding circuit Pending JPS54102846A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP907978A JPS54102846A (en) 1978-01-30 1978-01-30 Signal holding circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP907978A JPS54102846A (en) 1978-01-30 1978-01-30 Signal holding circuit

Publications (1)

Publication Number Publication Date
JPS54102846A true JPS54102846A (en) 1979-08-13

Family

ID=11710600

Family Applications (1)

Application Number Title Priority Date Filing Date
JP907978A Pending JPS54102846A (en) 1978-01-30 1978-01-30 Signal holding circuit

Country Status (1)

Country Link
JP (1) JPS54102846A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5883833U (en) * 1981-11-30 1983-06-07 三洋電機株式会社 sampling circuit
JPS59106229U (en) * 1983-01-06 1984-07-17 日本電気株式会社 resampler
JPS6079172A (en) * 1983-10-06 1985-05-04 Fuji Electric Co Ltd Distributorless type igniter
JPS6418500U (en) * 1987-07-23 1989-01-30

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5883833U (en) * 1981-11-30 1983-06-07 三洋電機株式会社 sampling circuit
JPS59106229U (en) * 1983-01-06 1984-07-17 日本電気株式会社 resampler
JPS6079172A (en) * 1983-10-06 1985-05-04 Fuji Electric Co Ltd Distributorless type igniter
JPH0561469B2 (en) * 1983-10-06 1993-09-06 Fuji Electric Co Ltd
JPS6418500U (en) * 1987-07-23 1989-01-30

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