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JPS54100612A - Circuit control system - Google Patents

Circuit control system

Info

Publication number
JPS54100612A
JPS54100612A JP709678A JP709678A JPS54100612A JP S54100612 A JPS54100612 A JP S54100612A JP 709678 A JP709678 A JP 709678A JP 709678 A JP709678 A JP 709678A JP S54100612 A JPS54100612 A JP S54100612A
Authority
JP
Japan
Prior art keywords
circuit
buffer
control
control information
control system
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP709678A
Other languages
Japanese (ja)
Inventor
Takuto Kojima
Michimitsu Hattori
Toru Masuda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP709678A priority Critical patent/JPS54100612A/en
Publication of JPS54100612A publication Critical patent/JPS54100612A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Prepayment Telephone Systems (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)

Abstract

PURPOSE:To control circuit by transmitting a line number and control information from a central processor, by equipping the circuit-corresponding circuit of the circuit with a buffer which generates an output for controlling the circuit. CONSTITUTION:To control circuit-corresponding circuit LC#1, #1 as line number LN from central processor CC is decoded by decoder DEC and supplied to the terminal CK of buffer B of circuit-corresponding circuit CL#1 to allow buffer B to set or reset corresponding to control information SD from CC, and to generate output Q. To control circuit-corresponding circuit LC#n which attains two kinds of control, CC supplies difference line numbers #n and #n+1 to two buffers B1 and B2 and the buffer is set or reset via decoder DEC by control information SD at that time.
JP709678A 1978-01-25 1978-01-25 Circuit control system Pending JPS54100612A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP709678A JPS54100612A (en) 1978-01-25 1978-01-25 Circuit control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP709678A JPS54100612A (en) 1978-01-25 1978-01-25 Circuit control system

Publications (1)

Publication Number Publication Date
JPS54100612A true JPS54100612A (en) 1979-08-08

Family

ID=11656537

Family Applications (1)

Application Number Title Priority Date Filing Date
JP709678A Pending JPS54100612A (en) 1978-01-25 1978-01-25 Circuit control system

Country Status (1)

Country Link
JP (1) JPS54100612A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8842849B2 (en) 2006-02-06 2014-09-23 Vocollect, Inc. Headset terminal with speech functionality

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8842849B2 (en) 2006-02-06 2014-09-23 Vocollect, Inc. Headset terminal with speech functionality

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