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JPS5354432A - Memory device - Google Patents

Memory device

Info

Publication number
JPS5354432A
JPS5354432A JP12880876A JP12880876A JPS5354432A JP S5354432 A JPS5354432 A JP S5354432A JP 12880876 A JP12880876 A JP 12880876A JP 12880876 A JP12880876 A JP 12880876A JP S5354432 A JPS5354432 A JP S5354432A
Authority
JP
Japan
Prior art keywords
memory device
ignore
modifying
loss
make
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12880876A
Other languages
Japanese (ja)
Inventor
Mitsuo Saito
Takeshi Sato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP12880876A priority Critical patent/JPS5354432A/en
Publication of JPS5354432A publication Critical patent/JPS5354432A/en
Pending legal-status Critical Current

Links

Landscapes

  • Indexing, Searching, Synchronizing, And The Amount Of Synchronization Travel Of Record Carriers (AREA)

Abstract

PURPOSE: To make it possible to ignore the loss of a head moving time effectively by modifying the order of the access against the stored data.
COPYRIGHT: (C)1978,JPO&Japio
JP12880876A 1976-10-28 1976-10-28 Memory device Pending JPS5354432A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12880876A JPS5354432A (en) 1976-10-28 1976-10-28 Memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12880876A JPS5354432A (en) 1976-10-28 1976-10-28 Memory device

Publications (1)

Publication Number Publication Date
JPS5354432A true JPS5354432A (en) 1978-05-17

Family

ID=14993921

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12880876A Pending JPS5354432A (en) 1976-10-28 1976-10-28 Memory device

Country Status (1)

Country Link
JP (1) JPS5354432A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60108940A (en) * 1983-11-17 1985-06-14 Nippon Denki Kanji Syst Kk Generator of character signal or the like
JPH02504083A (en) * 1987-07-02 1990-11-22 エクサバイト・コーポレーシヨン Method and apparatus for data buffer management
JPH04355818A (en) * 1991-06-03 1992-12-09 Pfu Ltd Data input/output controller

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50120811A (en) * 1974-03-11 1975-09-22

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50120811A (en) * 1974-03-11 1975-09-22

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60108940A (en) * 1983-11-17 1985-06-14 Nippon Denki Kanji Syst Kk Generator of character signal or the like
JPH02504083A (en) * 1987-07-02 1990-11-22 エクサバイト・コーポレーシヨン Method and apparatus for data buffer management
JPH04355818A (en) * 1991-06-03 1992-12-09 Pfu Ltd Data input/output controller

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