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JPS5282149A - Instruction address control system - Google Patents

Instruction address control system

Info

Publication number
JPS5282149A
JPS5282149A JP15772175A JP15772175A JPS5282149A JP S5282149 A JPS5282149 A JP S5282149A JP 15772175 A JP15772175 A JP 15772175A JP 15772175 A JP15772175 A JP 15772175A JP S5282149 A JPS5282149 A JP S5282149A
Authority
JP
Japan
Prior art keywords
control system
address control
instruction address
transfer
reduce
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15772175A
Other languages
Japanese (ja)
Inventor
Isao Aizawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP15772175A priority Critical patent/JPS5282149A/en
Publication of JPS5282149A publication Critical patent/JPS5282149A/en
Pending legal-status Critical Current

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  • Advance Control (AREA)
  • Executing Machine-Instructions (AREA)

Abstract

PURPOSE: To simplify processing structure to transfer various instructions of different instruction length to decoder correctly by providing main buffer register, and thus to reduce the time lag due to transfer.
COPYRIGHT: (C)1977,JPO&Japio
JP15772175A 1975-12-29 1975-12-29 Instruction address control system Pending JPS5282149A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15772175A JPS5282149A (en) 1975-12-29 1975-12-29 Instruction address control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15772175A JPS5282149A (en) 1975-12-29 1975-12-29 Instruction address control system

Publications (1)

Publication Number Publication Date
JPS5282149A true JPS5282149A (en) 1977-07-09

Family

ID=15655908

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15772175A Pending JPS5282149A (en) 1975-12-29 1975-12-29 Instruction address control system

Country Status (1)

Country Link
JP (1) JPS5282149A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5484943A (en) * 1977-10-25 1979-07-06 Digital Equipment Corp Cpu for executing variable length command
JPS5494841A (en) * 1977-12-30 1979-07-26 Honeywell Inf Systems Data processing system having instruction buffer relative to cache memory
JPS584449A (en) * 1981-06-30 1983-01-11 Fujitsu Ltd Instruction buffer control method
JPS60117336A (en) * 1983-11-30 1985-06-24 Fujitsu Ltd Branch instruction control system
JPH03156534A (en) * 1989-08-28 1991-07-04 Nec Corp Microprocessor

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5484943A (en) * 1977-10-25 1979-07-06 Digital Equipment Corp Cpu for executing variable length command
JPS5931733B2 (en) * 1977-10-25 1984-08-03 デイジタル イクイプメント コ−ポレ−シヨン central processing unit that executes variable length instructions
JPS5494841A (en) * 1977-12-30 1979-07-26 Honeywell Inf Systems Data processing system having instruction buffer relative to cache memory
JPS584449A (en) * 1981-06-30 1983-01-11 Fujitsu Ltd Instruction buffer control method
JPS60117336A (en) * 1983-11-30 1985-06-24 Fujitsu Ltd Branch instruction control system
JPH03156534A (en) * 1989-08-28 1991-07-04 Nec Corp Microprocessor

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