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JPS52133760A - Intergrated circuit - Google Patents

Intergrated circuit

Info

Publication number
JPS52133760A
JPS52133760A JP5056176A JP5056176A JPS52133760A JP S52133760 A JPS52133760 A JP S52133760A JP 5056176 A JP5056176 A JP 5056176A JP 5056176 A JP5056176 A JP 5056176A JP S52133760 A JPS52133760 A JP S52133760A
Authority
JP
Japan
Prior art keywords
intergrated circuit
base
collectors
feedback
applying
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5056176A
Other languages
Japanese (ja)
Inventor
Yoshisue Sakai
Yoshinori Morita
Tsuneo Funatsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP5056176A priority Critical patent/JPS52133760A/en
Publication of JPS52133760A publication Critical patent/JPS52133760A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/65—Integrated injection logic

Landscapes

  • Bipolar Transistors (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Logic Circuits (AREA)

Abstract

PURPOSE:To produce an I<2>L of a high speed by applying a feedback from one of the collectors of switching transistors to base and providing a pinch resistor between the base and injector terminal.
JP5056176A 1976-05-01 1976-05-01 Intergrated circuit Pending JPS52133760A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5056176A JPS52133760A (en) 1976-05-01 1976-05-01 Intergrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5056176A JPS52133760A (en) 1976-05-01 1976-05-01 Intergrated circuit

Publications (1)

Publication Number Publication Date
JPS52133760A true JPS52133760A (en) 1977-11-09

Family

ID=12862409

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5056176A Pending JPS52133760A (en) 1976-05-01 1976-05-01 Intergrated circuit

Country Status (1)

Country Link
JP (1) JPS52133760A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56104442U (en) * 1980-01-12 1981-08-15

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56104442U (en) * 1980-01-12 1981-08-15

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