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JPS52131450A - Up-down counter - Google Patents

Up-down counter

Info

Publication number
JPS52131450A
JPS52131450A JP4877776A JP4877776A JPS52131450A JP S52131450 A JPS52131450 A JP S52131450A JP 4877776 A JP4877776 A JP 4877776A JP 4877776 A JP4877776 A JP 4877776A JP S52131450 A JPS52131450 A JP S52131450A
Authority
JP
Japan
Prior art keywords
down counter
stage
counter
sutibale
simple structure
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4877776A
Other languages
Japanese (ja)
Other versions
JPS6113657B2 (en
Inventor
Toshio Mitsumoto
Setsushi Kamuro
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP4877776A priority Critical patent/JPS52131450A/en
Publication of JPS52131450A publication Critical patent/JPS52131450A/en
Publication of JPS6113657B2 publication Critical patent/JPS6113657B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K23/00—Pulse counters comprising counting chains; Frequency dividers comprising counting chains
    • H03K23/40—Gating or clocking signals applied to all stages, i.e. synchronous counters
    • H03K23/50—Gating or clocking signals applied to all stages, i.e. synchronous counters using bi-stable regenerative trigger circuits
    • H03K23/54—Ring counters, i.e. feedback shift register counters
    • H03K23/548—Reversible counters

Landscapes

  • Error Detection And Correction (AREA)
  • Shift Register Type Memory (AREA)

Abstract

PURPOSE:To realize an up-down counter of simple structure even with multi-stage land with only the output feedback for the sutibale stage of the gate circuit, by using the polynomial counter.
JP4877776A 1976-04-28 1976-04-28 Up-down counter Granted JPS52131450A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4877776A JPS52131450A (en) 1976-04-28 1976-04-28 Up-down counter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4877776A JPS52131450A (en) 1976-04-28 1976-04-28 Up-down counter

Publications (2)

Publication Number Publication Date
JPS52131450A true JPS52131450A (en) 1977-11-04
JPS6113657B2 JPS6113657B2 (en) 1986-04-15

Family

ID=12812680

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4877776A Granted JPS52131450A (en) 1976-04-28 1976-04-28 Up-down counter

Country Status (1)

Country Link
JP (1) JPS52131450A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5781731A (en) * 1980-11-11 1982-05-21 Matsushita Electric Ind Co Ltd Frequency dividing circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5781731A (en) * 1980-11-11 1982-05-21 Matsushita Electric Ind Co Ltd Frequency dividing circuit

Also Published As

Publication number Publication date
JPS6113657B2 (en) 1986-04-15

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