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JPS51147254A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS51147254A
JPS51147254A JP50070798A JP7079875A JPS51147254A JP S51147254 A JPS51147254 A JP S51147254A JP 50070798 A JP50070798 A JP 50070798A JP 7079875 A JP7079875 A JP 7079875A JP S51147254 A JPS51147254 A JP S51147254A
Authority
JP
Japan
Prior art keywords
gold
semiconductor device
bumping
tin
lead
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP50070798A
Other languages
Japanese (ja)
Inventor
Wataru Nozaki
Zenzo Tajima
Kazuo Umeyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP50070798A priority Critical patent/JPS51147254A/en
Publication of JPS51147254A publication Critical patent/JPS51147254A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto

Landscapes

  • Wire Bonding (AREA)

Abstract

PURPOSE:To eliminate loss of gold by replacing gold bumping performed at the time of connection of semiconductor elements, with tin bumping, and by providing a lead with gold plating.
JP50070798A 1975-06-13 1975-06-13 Semiconductor device Pending JPS51147254A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP50070798A JPS51147254A (en) 1975-06-13 1975-06-13 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50070798A JPS51147254A (en) 1975-06-13 1975-06-13 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS51147254A true JPS51147254A (en) 1976-12-17

Family

ID=13441910

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50070798A Pending JPS51147254A (en) 1975-06-13 1975-06-13 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS51147254A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07166690A (en) * 1994-11-22 1995-06-27 Nankai Plywood Kk Prefabricated closet unit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07166690A (en) * 1994-11-22 1995-06-27 Nankai Plywood Kk Prefabricated closet unit

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees