JPH1174871A - Communication system and method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To attain data transmission reception with higher accuracy by detecting a communication error even when a noise is intruded on a signal line between a communication control means and each communication means resulting in causing the communication error. SOLUTION: First prescribed data sent from a communication controller are stored in a shift register 6 and then set to a data setting register 14 and second prescribed data sent from the communication controller are stored in the shift register 6 and a comparator 15 compares the data in the shift register 6 with the data in the data setting register 14 and when they are dissident, the comparator 15 detects it as a communication error.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to communication systems and methods.

[0002]

2. Description of the Related Art Conventionally, a serial communication system of the type shown in FIG. 1 has been devised. In the serial communication system, a communication IC 103 to which a communication controller 101 and an appropriate number of sensors 106 are connected, and a communication IC 102 to which a motor driver 105 for driving a motor 104 are connected include +5 V as a power supply line, ground GND, They are cascaded via a single signal line consisting of a total of four synchronous clock lines CLK and data lines DATA for serial communication.

When such a serial communication system is used by being built in an image forming apparatus such as a copying machine, for example,
As shown in FIG. 2, a communication controller 201, communication ICs 202 and 203 to which motor drivers 208 and 209 for driving motors 206 and 207 disposed at appropriate positions in the apparatus are connected, and an appropriate number of sensors 210 to 2
11 is connected via a single signal line to the communication ICs 204 to 205 to perform data communication between the communication controller 201 and each of the communication ICs 202 to 205.
In this case, a unique address (address 0, address 1, address 2,...) Is specified for each communication IC irrespective of the arrangement position of these communication ICs 202 to 205 in the device, so that the communication ICs 202 to 205 of each address are designated. Transmission and reception communication is performed between the communication controller 205 and the communication controller 201. When the communication ICs are accessed simultaneously or frequently at a speed higher than a predetermined serial transmission rate, a delay occurs in data transmission / reception in any communication frame. As a countermeasure, priority of communication with the communication controller 201 is reduced. It is conventionally known to provide and perform communication.
That is, as shown in FIG. 2, the priority of communication is increased in ascending order of communication address (for example, address 0 is set as the highest priority, and priority is given in the order of address 1, address 2,...) By connecting the communication ICs 202 to 205 and the communication controller 201, a communication IC that allows the least delay (in this case, the communication IC 202)
Communication is performed with the highest priority specified.

An outline of the operation of the serial communication system will be described. When performing a transmission operation of transmitting predetermined phase data to rotate the motor 206, the communication controller 20
1 transmits a pulse train of a predetermined frequency to the CLK line. The communication controller 201 and the communication ICs 202 to 205 perform processing according to the transmission data format shown in FIG. 3 in synchronization with the pulse train.

First, at the first falling edge of CLK sent from the communication controller 201, the communication ICs 202 to 205
Recognizes the start of communication and confirms whether or not the communication controller 201 has transmitted the start bit “L” to the DATA line at the next rising edge of CLK. The communication IC 202 to the next falling edge of CLK
205 determines whether to perform the transmission operation (“L”) or the reception operation (“H”). The next two clocks of data are address bits, and the communication controller 201
Sends the specified address on the DATA line,
When this address is its own address, the C 202 to 205 take in the data transmitted from the next CLK. The specified communication IC takes in a total of 8 bits of data on the DATA line from the rising edge of CLK. The designated communication IC captures the parity data sent from the communication controller 201 at the next falling edge of CLK at the rising edge of CLK, and compares it with the parity data calculated by itself from the data. If the parities match, the data is validated and the communication controller 201
ACK ("L") is transmitted to the communication controller 201 if the parities do not match, and the data is invalidated. Communication controller 201
Receives an ACK at the rising edge of CLK, sends out a stop bit “L” at the falling edge of the next CLK if ACK is “L”, and sends the next CLK if ACK is “H”.
, A stop bit “H” is transmitted. The specified communication IC recognizes the stop bit at the rising edge of CLK, outputs data if the stop bit is "L", and does not output data if the stop bit is "H". In the above sequence, the communication IC 202
And the motor 206 is rotated.

[0006] Sensor 210 connected to communication IC 204
The reception operation for reading the value of the value will be described. When performing a receiving operation, the communication controller 201 sends a pulse train of a predetermined frequency to the CLK line. The communication controller 201 and the communication ICs 202 to 202-2 are synchronized with the pulse train.
05 performs processing according to the received data format shown in FIG.

First, at the first falling edge of the CLK transmitted from the communication controller 201, the communication ICs 202 to 205
Recognizes the start of communication and confirms whether or not the communication controller 201 has transmitted the start bit “L” to the DATA line at the next rising edge of CLK. The communication IC 202 to the next falling edge of CLK
205 determines whether to perform the transmission operation ("L") or the reception operation ("H"). The next two clocks of data are address bits, and the communication controller 201
Sends the specified address on the DATA line. The communication ICs 202 to 205 take in this address and send the sensor data to the communication controller 201 from the next CLK if it is its own address. The specified communication IC is placed on the DATA line from the falling edge of CLK for a total of 8
Bit data is transmitted, and the communication controller 201
The data is taken in at the fall of LK. At the next rising edge of CLK, the communication controller 201 takes in the parity data transmitted from the specified communication IC, and compares it with the parity data calculated by itself from the data. If the parities match, the data is valid. If the parities do not match, the data is invalid. Communication is performed with the communication IC 204 in the above sequence, and the value of the sensor 210 is read.

With such a system configuration, it is possible to operate a large number of motors and sensors arranged in various parts of the entire apparatus by four cascade-connected signal lines and to read information.

In this example, one address is set to 8 bits, and 4
The configuration for exchanging the information for the address between the communication controller and the communication IC has been described. However, the configuration can be changed to an appropriately optimized configuration by deciding the communication data format.

When such a serial communication system is not used, conventionally, a large number of binary sensors, such as photointerrupters, installed in various places in a copying machine, together with a power supply and a GND line, are directly connected to a port input of a microcomputer of a host controller. A huge amount of wire harness is wired radially from the host controller, and the workability in assembling the equipment, the reliability of the assembly, the risk of harness damage during assembly and service, the weight increase, the harness Problems such as an increase in cost were pointed out.

[0011]

However, in a conventional serial communication system, since a long cable runs around the inside and outside of the image forming apparatus, a communication error due to noise may occur. For example, when noise is superimposed on the clock line during communication, the counter of the communication IC shifts, resulting in a communication error. If this communication error occurs frequently, the communication speed may be reduced or the system may be down.

It is an object of the present invention to provide a communication system and a method which solve the above problems.

[0013]

In order to achieve the above object, according to the present invention, there is provided a communication control means for controlling serial communication for transmitting and receiving predetermined serial data in a time series on one data line. And a plurality of communication means connected to the communication control means for transmitting and receiving serial data to and from the communication control means, wherein the communication means comprises: First holding means for holding predetermined data transmitted from the control means, second holding means for holding data held in the first holding means, and holding in the first holding means sent from the communication control means The first predetermined data obtained is the second predetermined data.
A comparing unit that compares the data in the first and second holding units after the second predetermined data transmitted from the communication control unit is stored in the first holding unit; It is characterized by having.

According to a second aspect of the present invention, in the first aspect, the communication means calculates a parity calculated from predetermined data transmitted from the communication control means and held in the first holding means, Parity check means for performing a match comparison with the parity transmitted from the communication control means following data, and control signal output means for transmitting a control signal responsive to a result of the match comparison of the parity check means to the communication control means And characterized in that:

[0015] Further, the invention according to claim 3 is based on claim 2.
Wherein the control signal output means transmits the first signal transmitted from the communication control means by the parity check means.
As a result of the coincidence comparison between the parity calculated from the first predetermined data held in the holding unit and the parity transmitted from the communication control unit subsequent to the first predetermined data, if they match, the second predetermined A signal for requesting data transmission is transmitted to the communication control unit if the signal does not match, and a signal for requesting retransmission of the first predetermined data is transmitted.

Further, the invention according to claim 4 is the invention according to claim 1.
In any one of 2 to 3, the control signal output means includes:
A parity calculated from the second predetermined data transmitted from the communication control unit and held in the first holding unit by the parity check unit, and a parity transmitted from the communication control unit following the second predetermined data. If at least one of the result of the match comparison of the parity check means and the result of the match comparison of the parity check means do not match, a signal for requesting re-execution of the transmission from the first predetermined data is received. Transmitting a signal indicating that the communication has been successful to the communication control means.

Further, the invention according to claim 5 is based on claim 1.
In any one of the first to fourth aspects, an output unit for outputting data in the second holding unit is further provided.

Further, the invention according to claim 6 is the invention according to claim 1.
The communication system according to any one of (1) to (5) is applied to information processing in the image forming apparatus.

According to a seventh aspect of the present invention, data transmitted in time series on a data line is transmitted and received between a communication control means and a plurality of communication means cascaded to the communication control means. In the communication method, the communication control unit transmits the first predetermined data to the communication unit, and each of the communication units stores the transmitted first predetermined data in the first storage unit and then stores the first predetermined data in the second storage unit. The communication control means transmits the second predetermined data to the communication means, and each of the communication means holds the transmitted second predetermined data in the first holding means. It is characterized in that the data in the first and second holding means are compared and matched.

[0020] The invention according to claim 8 is the invention according to claim 7.
In the communication means, the parity calculated from the predetermined data transmitted from the communication control means and held in the first holding means and the parity transmitted from the communication control means subsequent to the held predetermined data Match comparison is performed, and a control signal responsive to the result of the match comparison is transmitted to the communication control means.

The invention according to claim 9 is the invention according to claim 8
In the communication means, the parity transmitted from the communication control means and calculated from the first predetermined data held in the first holding means, and the parity transmitted from the communication control means following the first predetermined data As a result of the parity comparison with the parity, if the two match, a signal for requesting the second transmission of the predetermined data is transmitted to the communication control means if the two do not match, and a signal for requesting retransmission of the first predetermined data is transmitted to the communication control means. It is characterized by.

According to a tenth aspect of the present invention, in any one of the seventh to ninth aspects, the communication means transmits the second communication data transmitted from the communication control means and held in the first holding means.
A result of a match comparison between the parity calculated from the second predetermined data and the parity transmitted from the communication control unit subsequent to the second predetermined data; and the first and second parity data.
If at least one of the results of the data comparison in the holding means does not match, a signal requesting re-execution of transmission from the first predetermined data is indicated. If both match, it indicates that data reception was successful. A signal is transmitted to the communication control means.

[0023]

The present embodiment is an improvement of the configuration and communication format of a register for receiving transmission data from a communication controller in each communication IC in the serial communication system as described above. This will be described below with reference to the configuration diagram of the register inside the communication IC and the communication format of FIG.

In FIG. 4, reference numeral 1 denotes a counter which counts up sequentially from the rising edge of the first falling edge of the CLK described in the conventional example, and uses the count value to receive data transmitted from the communication controller by the communication IC. Is determined.

In this embodiment, the bit width of the counter 1 is set to 5 bits in order to support the communication format shown in FIG.
It is designed to output a signal (hereinafter referred to as OVF) with a count value of 18. Then, the counter 1 maintains the count value until the reset pulse “H” is input. Reference numeral 2 denotes a reset signal generation unit that outputs a reset pulse “H” to the counter 1 after a lapse of a predetermined time after receiving OVF = “H”. 3 is a counter having the same specification as the counter 1, and the first transmission frame (OVF = "H") and the second transmission frame (O
VF = “L”). Reference numeral 4 denotes a timing correction D flip-flop, which outputs the OVF of the counter 3 in synchronization with the rise of the clock. Counters 1 and 3
Before the communication IC starts the data receiving operation, the communication IC counts up by a reset format in advance and enters an overflow state. Thereafter, the counter 1 is reset by the reset pulse from the reset signal generation unit 2, and waits for the first falling edge of the CLK transmitted from the communication controller. The counter 3 maintains its overflow state until the first data reception is completed.

The first data reception is performed in accordance with the count-up of the counter 1 as in the conventional example. At this time, the serial data input through the bidirectional buffer 5 is written into the shift register 6. A match signal "H" output when the address detection register 7 detects a match between the address of the communication IC and the address data based on the counter value of the counter 1 and the address data sent via the counter 3; The enable signal “H” generated by the enable signal generator 8 based on the count value of the counter 1
Thereby, writing of the reception data into the shift register 6 is permitted, and the writing is performed at the timing (b7 to b0) shown in the first transmission format in FIG. After that, the parity check unit 9 compares the parity data transmitted from the communication controller at the timing of the PA of the first transmission format in FIG. 5 with the parity generated from the data in the shift register 6, and compares the parity data. If so, "H" is output, and if not, "L" is output. The output is input to the ACK signal output unit 11 by the D flip-flop 10 at the fall of CLK.

The ACK signal output unit 11 determines that the received frame is the first reception frame by the Q output “H” of the D flip-flop 4, the output “H” of the address detection register 7 and the count value of the counter 1. Thus, it is detected that the output timing of the ACK signal is reached, and if the output of the D flip-flop 10 is “H”, the ACK signal “L”
If the output of the flip-flop 10 is "L", an ACK signal "H" is sent to the communication controller. At this time, AC
The K signal output unit 11 inputs an “H” pulse to the enable terminal of the bidirectional buffer 5, and sets the communication IC to the transmission mode.

When the communication controller receives the ACK signal “L”, the first reception does not malfunction and the communication I
C, the stop bit "H"
Is returned at the timing of SP in the first transmission format in FIG. Then, the stop bit detection unit 12
Based on the count value of the counter 1 and the Q output “H” of the D flip-flop 4, an “H” pulse is output, which is received by the reset terminal of the counter 3, and OVF = “L”,
Shift to the second transmission frame. Also, the output “H” pulse of the AND gate 13 due to the Q output “H” of the D flip-flop 4, the output “H” of the address detection register 7, and the output “H” pulse of the stop bit detection unit 12 is converted to the data setting register 14. , And the data of the shift register 6 is latched by the data setting register 14 at the rise of the clock.

On the contrary, the communication controller sets ACK “H”
Is received, it is detected that a malfunction has occurred in the communication IC in the first reception, and the stop bit “L” is set in FIG.
Is returned at the timing of the SP of the first transmission format. Therefore, since the stop bit detection unit 12 does not output the “H” pulse, the OVF of the counter 3 is maintained at “H”, and the data communication as the first transmission format is performed again.

In the second transmission format, the parity check is performed in the same manner as in the first transmission format. However, regarding the output of the ACK signal, the data in the data setting register 14 and the shift register received in the second transmission are output. The result of comparison (match: “H”, mismatch: “L”) of the comparator 15 based on the data No. 6 is involved. In other words, the ACK signal output unit 11 uses the Q output “L” of the D flip-flop 4 to determine the second transmission format and the output “H” of the address detection register 7 and the count value of the counter 1. Then, when it is detected that the output timing of the ACK signal is reached, the ACK "L" is transmitted to the communication controller only when the outputs of the D flip-flop 10 and the comparator 15 are both "H" (parity OK and comparison data match). Either is “L” (parity N
G or mismatch of comparison data), "H" is sent out. At this time, the ACK signal output unit 11 inputs an “H” pulse to the enable terminal of the bidirectional buffer 5 as in the first transmission format, and sets the communication IC to the transmission mode.
The communication controller returns a stop bit in response to the ACK signal, as in the first transmission format.

When the stop bit is "H", the data output controller 16 outputs the Q output "L" of the D flip-flop 4
Based on the output "H" of the address detection register 7 and the count value of the counter 1, "H" is output by the stop bit "H", and the output register 17 is enabled. The output register 17 latches the data in the data setting register 14 at the rising edge of the clock. With this, a series of data reception is completed without delay.

Conversely, when the stop bit is "L", the data of the data setting register 14 is not latched to the output register 17, and the data communication is performed again from the first transmission format. For the stop bit of the second transmission format, the stop bit detector 12 detects the stop output of the D flip-flop 4 using the Q output “L”.
Unlike the first transmission format, no "H" pulse is output. Therefore, regardless of the stop bit "H" (end of data reception) and "L" (re-execution), the counter 3 is not reset, the overflow state is maintained, and the next first transmission format is performed. Can be handled.

[0033]

As described above, according to the present invention,
For example, even if a communication error occurs due to noise mixing on a signal line between the communication control unit and each communication unit,
By receiving the same data twice and comparing the match,
Communication errors can be reliably detected. Therefore, data transmission and reception with higher accuracy can be performed as compared with the case where only the parity check is performed.

[Brief description of the drawings]

FIG. 1 is a diagram showing a system configuration of a serial communication system.

FIG. 2 is a diagram showing a system configuration of a serial communication system.

FIG. 3 is a diagram showing a communication format of a conventional example.

FIG. 4 is a diagram illustrating an internal configuration of a communication IC according to the embodiment of the present invention.

FIG. 5 is a diagram showing a communication format according to the embodiment of the present invention.

[Explanation of symbols]

 1,3 counter 2,14,17 register

Claims (10)

[Claims] 1. A communication control means for controlling serial communication for transmitting and receiving predetermined serial data in a time series on one data line; and a serial control means connected to the communication control means and communicating with the communication control means. A synchronous serial communication system including a plurality of communication units for transmitting and receiving data, wherein the communication unit includes a first holding unit that holds predetermined data transmitted from the communication control unit; 1
Second holding means for holding the data held in the holding means, and first predetermined data transmitted from the communication control means and held in the first holding means, held in the second holding means; After the second predetermined data transmitted from the control means is held in the first holding means, a comparison means for comparing the data in the first and second holding means with each other is provided. Communications system. 2. The communication control unit according to claim 1, wherein the communication unit is configured to calculate a parity calculated from predetermined data transmitted from the communication control unit and stored in the first storage unit and the stored predetermined data. Parity check means for performing a match comparison with the parity transmitted from the means, and control signal output means for transmitting a control signal responsive to a result of the match comparison of the parity check means to the communication control means. Communication system. 3. The parity checker according to claim 2, wherein the control signal output means calculates the parity calculated from the first predetermined data transmitted from the communication control means by the parity check means and held in the first holding means. As a result of the coincidence comparison with the parity transmitted from the communication control means subsequent to the second predetermined data, a signal for requesting the transmission of the second predetermined data is obtained when they match, and a signal for requesting the transmission of the first predetermined data when they do not match. A communication system for transmitting a signal requesting retransmission of the communication data to the communication control means. 4. The control signal output unit according to claim 1, wherein the control signal output unit calculates from the second predetermined data transmitted from the communication control unit by the parity check unit and stored in the first storage unit. If at least one of the result of the match comparison between the parity and the parity transmitted from the communication control means subsequent to the second predetermined data and the result of the match comparison by the parity check means do not match, the first time A communication system, wherein a signal for requesting re-execution of transmission from predetermined data is transmitted to the communication control means when both of them match, a signal indicating that data reception was successful. 5. The communication system according to claim 1, further comprising an output unit that outputs data in the second holding unit. 6. A communication system, wherein the communication system according to claim 1 is applied to information processing in an image forming apparatus. 7. A communication method for transmitting and receiving data transmitted in time series on a data line between a communication control unit and a plurality of communication units cascaded to the communication control unit, the communication control unit comprising: Means for transmitting the first predetermined data to the communication means, each of the communication means holding the transmitted first predetermined data in the first holding means, then in the second holding means, and then in the communication The control means transmits the second predetermined data to the communication means, and each of the communication means stores the transmitted second predetermined data in the first holding means, and then stores the first and second holding data in the first holding means. A communication method characterized by performing data comparison of data in the data. 8. The communication control unit according to claim 7, wherein the communication unit calculates a parity calculated from predetermined data transmitted from the communication control unit and stored in the first storage unit and the stored predetermined data. A communication method for performing a match comparison with the parity transmitted from the means and transmitting a control signal responsive to a result of the match comparison to the communication control means. 9. The communication device according to claim 8, wherein the communication unit calculates a parity calculated from the first predetermined data transmitted from the communication control unit and held in the first holding unit and the first predetermined data. As a result of the match comparison with the parity transmitted from the communication control means,
A communication method characterized by transmitting, to the communication control means, a signal for requesting the transmission of predetermined data for the second time if they match, or a signal for requesting retransmission of the first predetermined data if they do not match. 10. The communication device according to claim 7, wherein said communication means calculates a parity calculated from second predetermined data transmitted from said communication control means and stored in said first storage means, and said second parity. Following the predetermined data, the result of the match comparison with the parity transmitted from the communication control means,
And if at least one of the results of the data comparison in the first and second holding means does not match, a signal requesting re-execution of transmission from the first predetermined data; A communication method, comprising transmitting a signal indicating that the reception has succeeded to the communication control means.