JPH1168409A - Delay circuit - Google Patents

Abstract

(57) [Problem] To provide a delay circuit which contributes to downsizing and economic efficiency when an application frequency band of the delay circuit is limited to a relatively narrow band. SOLUTION: Two parallel resonance circuits are constituted by dielectric resonators 14 and 15 and voltage variable capacitance diodes 8 to 11, and these two parallel resonance circuits are connected to a variable capacitance capacitor 51.
To join. Terminal 1 for voltage variable capacitance diodes 8-11
3, the center frequency of the BPF constituted by two parallel resonance circuits can be varied by controlling the voltage change. By changing the capacitance of the variable capacitor 51, the delay time of the high-frequency signal can be changed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit for processing a high frequency signal of a radio communication device in a radio frequency band of VHF to UHF, and to a delay circuit for intentionally delaying the high frequency signal.

[0002]

2. Description of the Related Art Conventionally, in a radio communication apparatus, there is a case where a circuit for delaying a part of a high-frequency signal is installed in order to realize the apparatus performance. For this purpose, a delay element is inserted in a signal propagation path. However, obtaining a desired delay time is widely practiced.

As the delay element, a transmission line such as a coaxial cable is widely used, and among coaxial cables, a so-called semi-rigid coaxial cable using a seamless metal tube as an outer conductor is compared with a braided coaxial cable. Therefore, it is preferably used because it has excellent uniformity of structural accuracy and, as a result, stable electric characteristics can be obtained.

[0004]

The delay time characteristic of the above-mentioned semi-rigid coaxial cable is about 5 nanoseconds per unit length (1 m). It can be relatively easily accommodated in the device by processing (for example, processing into a coil shape) (however, the allowable bending radius is limited according to the external dimensions of the cable).

[0005] However, assuming that the desired delay time reaches several hundred nanoseconds, for example, the cable length in the case of 200 nanoseconds is about 40 m. Assuming dimensions, it is difficult to install (store) the cable.

Further, semi-rigid coaxial cables generally have a standard length of about 2 m in terms of manufacture, and when the cable length is to be extended, it is necessary to use a relay connector or the like, which deteriorates economic efficiency. Although a cable having a cable length of about several tens of meters can be manufactured, the cost is different from the general manufacturing process, and the economical efficiency is similarly deteriorated.

[0007] An object of the present invention is particularly for mobile communications. This radio communication apparatus is intended to solve the above-mentioned conventional disadvantages, focusing on the fact that the applicable frequency band of a delay circuit is limited to a relatively narrow band. Another object of the present invention is to provide a delay circuit that contributes to miniaturization, economy, and economy.

[0008]

An object of the present invention is to provide a parallel circuit comprising a circuit in which a dielectric resonator having a high dielectric constant and a voltage variable capacitance diode to which a reverse bias voltage is applied are connected in parallel in a high frequency equivalent manner. A variable capacitor that includes two resonance circuits and that couples the parallel resonance circuits to each other to control the passage time of a high-frequency signal that passes therethrough; and a band formed by the two parallel resonance circuits that are coupled by the variable capacitors. This is achieved by providing a reverse bias voltage application circuit that makes the center frequency of the filter (BPF) characteristic variable by controlling the reverse bias voltage applied to the voltage variable capacitance diode.

According to the above means, the center frequency of the BPF can be varied by controlling the reverse bias voltage applied to the voltage variable capacitance diode, and the capacitance of the variable capacitance capacitor can be varied. Thus, the delay time of the passing high-frequency signal can be made variable.

[0010]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a circuit diagram of an embodiment of the present invention. In the figure, reference numerals 1 and 2 designate an input terminal and an output terminal, which are connected to an input transmission line and an output transmission line, respectively.
Further, the capacitors 3 and 4 are provided mainly for the purpose of matching the characteristic impedance of the input or output transmission line with the parallel resonance circuit.

When it is desired to separate and select only a specific frequency band, a band-pass filter (BPF) is widely used.
As a configuration method for realizing this BPF, a configuration in which two parallel resonance circuits 16 and 17 are combined as shown in FIG. 3 is used. The parallel resonance circuits 16 and 17 each include an inductance L and a capacitor C, which are electrically coupled by the coupling capacitor 5.

In the configuration shown in FIG. 3, the center frequency of the BPF is substantially determined by the capacitances of L and C, which are components of the parallel resonance circuits 16 and 17. Further, the selection characteristic as the BPF can be changed by appropriately changing the value of the coupling capacitor 5, and at the same time, the delay characteristic, in other words, the delay time of a signal passing through the BPF can be changed.

The present invention is an application development of these properties. In FIG. 1, the parallel resonance circuit includes dielectric resonators 14 and 15 and voltage variable capacitance diodes 8, 9, 10, and 1.
1. The dielectric resonators 14 and 15 have a high dielectric constant, and the resonance frequency is set slightly higher than the frequency to be selected. Voltage variable capacitance diode 8-1
No. 1 has a characteristic that the capacitance value changes in accordance with the change in the applied reverse bias voltage.

The dielectric resonator 14 and the voltage variable capacitance diodes 8 and 9 constitute one parallel resonance circuit, and the dielectric resonator 15 and the voltage variable capacitance diodes 10 and 11 constitute another parallel resonance circuit. . Voltage variable capacitance diode 8,
9 is applied from the bias voltage application terminal 13 through the resistor 6 for the purpose of blocking a high-frequency signal. Another voltage variable capacitance diode 10,
The reverse bias voltage with respect to 11 is the bias voltage application terminal 1
3 through a resistor 7. The capacitor 12 connected between the terminal 13 and the ground is intended for decoupling of the bias voltage supply circuit connected to the terminal 13.

As the coupling capacitor 51 for coupling the two parallel resonance circuits, a variable capacitance capacitor having a variable capacitance value is used.

The center frequency of the BPF formed by the two parallel resonance circuits coupled by the coupling capacitor 51 is controlled by controlling the reverse bias voltage applied from the terminal 13 to the voltage variable capacitance diodes 8, 9 and the voltage variable capacitance diodes 10, 11. Can be varied. The delay characteristic can change the delay time of the passing high-frequency signal by changing the capacitance of the variable capacitor 51.

When the application frequency band of the delay circuit is limited to a relatively narrow band, the BP is controlled by controlling the reverse bias voltage applied to the voltage variable capacitance diodes 8 to 11.
The center frequency of F can be varied, and required delay time characteristics at the applied frequency can be easily obtained.

FIG. 2 is a diagram in which the configuration of FIG. 1 is modified as a high-frequency equivalent circuit. In the figure, 161 and 171
Represents a parallel resonant circuit, L 'in the circuit represents the equivalent inductance of the dielectric resonators 14 and 15 of FIG. 1, and C' represents the parallel combined capacitance or the parallel variable capacitance of the voltage variable capacitance diodes 8 and 9 of FIG. 2 shows a parallel combined capacitance of the voltage variable capacitance diodes 10 and 11.

The parallel combined capacitance C 'depends on the reverse bias voltage of the variable capacitance diodes 8 to 10. In other words, the resonance frequency of the parallel resonance circuits 161 and 171 is
Variable by the control voltage applied to
From the characteristics of the PF, the center frequency of the band to be selected can be made variable.

The delay characteristic of the variable capacitor 5
The delay time of the passing high-frequency signal can be changed by changing the capacitance of the first signal.

FIGS. 4 and 5 show measured characteristics of a delay circuit to which the present invention is applied. BP by controlling reverse bias voltage
F center frequency 276 MHz (FIG. 4), and 288 MH
This shows the characteristics of the delay time when z (FIG. 5) is set.
In this example, the capacitance value of the coupling capacitor 51 of the parallel resonance circuit is selected so that the required delay time is approximately 200 nanoseconds.

FIG. 6 shows a schematic external size of a delay circuit which has realized the actually measured characteristics shown in FIGS. This 25mm
The size of × 35 mm × 12 mm has a structure that is significantly smaller than the case where the semi-rigid cable used in the prior art is used.

[0024]

As described above, according to the present invention, VHF ~
As a delay circuit of a wireless communication device in the UHF band, Equation 1
A relatively large delay time of 00 nanoseconds can be easily realized. Also, the use of the BPF has the effect of being relatively compact and economical to construct.

[Brief description of the drawings]

FIG. 1 is a circuit configuration diagram of an embodiment of the present invention.

FIG. 2 is an equivalent circuit configuration diagram of FIG. 1;

FIG. 3 is a configuration diagram of a general BPF for explaining the present invention.

FIG. 4 is a characteristic diagram of one embodiment of the present invention.

FIG. 5 is a characteristic diagram of one embodiment of the present invention.

FIG. 6 is a schematic external view of an embodiment of the present invention.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Input terminal, 2 ... Output terminal, 3/4 ... Matching capacitor, 6,7 ... Resistance, 8-10 ... Voltage variable capacitance diode, 12 ... Decoupling capacitor, 13 ... Reverse bias voltage application terminal, 14, 15 ... dielectric resonator, 51 ... coupling capacitor, 161, 171 ... parallel resonance circuit.

Claims (1)

[Claims] 1. A delay circuit for delaying a passage time of a high-frequency signal, comprising: a circuit in which a dielectric resonator having a high dielectric constant and a voltage variable capacitance diode to which a reverse bias voltage is applied are connected in parallel in a high-frequency manner. And a variable capacitance capacitor that couples the parallel resonance circuits to each other to control the transit time of a high-frequency signal passed therethrough, and two parallel resonance circuits coupled by the variable capacitance capacitors. A reverse bias voltage application circuit that varies a center frequency of the bandpass filter characteristic by controlling a reverse bias voltage applied to the voltage variable capacitance diode.