JPH1168056A - Ferroelectric capacitor and memory provided therewith - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a ferroelectric capacitor which is superior in temperature and fatigue characteristics. SOLUTION: A lower electrode 13, a ferroelectric layer 14, and an upper electrode 15 are successively laminated on a substrate 11 via the intermediary of a diffusion preventive layer 12. The ferroelectric layer 14 is of a structure composed of a deterioration preventive layer 14a, a center layer 14b, and a deterioration preventive layer 14c which are successively laminated in this sequence on the lower electrode 13. The deterioration preventive layers 14a and 14c are each formed of Srx Biy Taz Nb(2-z) O9 ±d (0.6<=x<=1.2, 1.7<=y<=2.5, 0<=z<=2.0, 0<=d<=1.0), and the center layer 14b is formed of Sru Biv Tiw O15 ±δ (0.8<=u<=1.2, 3.0<=v<=5.0, 3.0<=w<=5.0, 0<=δ<=1). The deterioration protective layers 14a and 14c ensure a ferroelectric capacitor of fatigue properties, and the center layer 14b ensures the capacitor of temperature properties.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a ferroelectric capacitor having a pair of electrodes connected to a ferroelectric film and a memory using the same.

[0002]

2. Description of the Related Art In recent years, with the progress of film forming technology, non-volatile memories using ferroelectric thin films have been actively developed. This non-volatile memory is a non-volatile random access memory (Ferroelect) that can be rewritten at high speed by using high-speed polarization inversion of a ferroelectric thin film and its dielectric polarization.
RIC (Random Access Memories; FeRAM), which has the advantage that the written contents are not erased, unlike the volatile memory in which the information written therein is erased when the power is turned off. As a ferroelectric material constituting such an FeRAM, a bismuth-based layered crystal structure oxide is exemplified. This bismuth-based layered crystal structure oxide has the largest disadvantage of the conventionally used PZT-based material which is a solid solution of PbTiO ₃ and PbZrO ₃ , that is, a decrease in dielectric polarization value due to repetition of rewriting. He is attracting attention because he cannot do it.

Further, these ferroelectric materials have a characteristic that the dielectric polarization value decreases with an increase in temperature and becomes zero at the Curie point. Such temperature characteristics are peculiar to each material, and generally, the larger the Curie point of a material, the smaller the amount of change in the dielectric polarization value in the same temperature range. Therefore, a material having a large Curie point is superior as a ferroelectric material constituting the FeRAM. For example, the Curie point of a bismuth-based layered crystal structure oxide is calculated based on bismuth strontium titanate (Sr
Bi ₄ Ti ₄ O ₁₅ ) is 530 ° C., and bismuth strontium tantalate (SrBi ₂ Ta ₂ O ₉ ) is 335.
℃, bismuth strontium niobate (SrBi
₂ Nb ₂ O ₉₎ is is 440 ° C., bismuth strontium titanate, if attention is paid to temperature characteristics Fe
It is excellent as a ferroelectric material constituting a RAM.

[0004]

However, this bismuth strontium titanate has a problem that it is excellent in temperature characteristics but inferior in fatiging characteristics as compared with other bismuth-based layered crystal structure oxides. For example,
A platinum (Pt) electrode is connected to a 200 nm thick ferroelectric thin film made of bismuth strontium titanate, bismuth strontium tantalate or bismuth strontium niobate, respectively.
When a voltage of 5 V is applied and the rewriting operation is performed 10 ¹² times, the dielectric polarization of bismuth strontium tantalate or bismuth strontium niobate is less than 10% before the rewriting operation. In the case of bismuth strontium titanate, the amount is reduced by about 50%. That is, conventionally, it was not possible to obtain a material having sufficiently satisfactory fating characteristics and temperature characteristics.

The present invention has been made in view of the above problems, and an object of the present invention is to provide a ferroelectric capacitor excellent in temperature characteristics and fating characteristics and a memory using the same.

[0006]

A ferroelectric capacitor according to the present invention comprises a pair of electrodes connected to a ferroelectric film. It has a prevention layer.

The memory according to the present invention has a ferroelectric capacitor in which a pair of electrodes are connected to a ferroelectric film, and a deterioration preventing layer for preventing the ferroelectric film from being deteriorated by applying a voltage. It is provided with.

In the ferroelectric capacitor of the present invention, when a voltage is applied between the pair of electrodes, polarization occurs in the ferroelectric film. Here, since the ferroelectric film is provided with the deterioration preventing layer, fatigue due to polarization reversal is small.

In the memory of the present invention, when a voltage is applied between the pair of electrodes of the ferroelectric capacitor, polarization occurs in the ferroelectric film. The electrode-polarization characteristic has a hysteresis, and data storage and reading are performed using the hysteresis. Here, since the ferroelectric film is provided with the deterioration preventing layer, fatigue due to polarization reversal is small.

[0010]

Embodiments of the present invention will be described below in detail with reference to the drawings.

FIG. 1 shows a schematic configuration of a ferroelectric capacitor according to an embodiment of the present invention. This ferroelectric capacitor is provided on a substrate 11 made of, for example, silicon (Si) via a diffusion preventing layer 12 made of, for example, iridium oxide (IrO ₂ ) and, if necessary, a bonding layer (not shown here). , A lower electrode 13, a ferroelectric film 14, and an upper electrode 15 are sequentially laminated. In other words, this ferroelectric capacitor includes a pair of electrodes 1 on the ferroelectric film 14.
3, 15 are connected.

The lower electrode 13 and the upper electrode 15 are made of, for example, platinum (Pt), iridium (Ir), ruthenium (Ru), rhodium (Rh) and palladium (Pd).
, Or an alloy containing any two or more of these. Note that the lower electrode 13 and the upper electrode 15 may at least partially include an oxide thereof.

The ferroelectric film 14 is formed from the lower electrode 13 side.
It has a structure in which a first deterioration preventing layer 14a, a central layer 14b, and a second deterioration preventing layer 14c are sequentially laminated. Here, the deterioration preventing layers 14a and 14c are for preventing a decrease (that is, deterioration) of the dielectric polarization value due to repetition of voltage application. It is considered that such deterioration is mainly caused by oxygen defects generated at the interface between the electrodes 13 and 15 and the ferroelectric film 14.
4a and 14c are inserted between the electrodes 13 and 15 and the central layer 14b, respectively.

Such deterioration preventing layers 14a and 14c are
Less degradation due to application of a voltage (excellent fatigue characteristics) ferroelectric material (e.g. Sr _x Bi _y Ta _z Nb
_(2-z) O ₉ ± _d (however, 0.6 ≦ x ≦ 1.2, 1.7 ≦
y ≦ 2.5, 0 ≦ z ≦ 2.0, 0 ≦ d ≦ 1.0)). This Sr _x Bi _y Ta
_{z Nb (2-z) O} 9 ± d may be either polycrystalline single crystal. S
_{r x Bi y Ta z Nb (} 2-z) O 9 to the composition range of ± _d are limited as described above is because it is possible to obtain a high dielectric polarization value in the composition in these ranges . The compositions of the deterioration preventing layers 14a and 14c may be the same or different.

The central layer 14b reduces the change in the dielectric polarization value due to the temperature change (improves the temperature characteristics).
It is for. Such middle layer 14b is a ferroelectric material having excellent temperature characteristics (e.g., Sr _u Bi _v Ti _w O
₁₅ ± δ (where 0.8 ≦ u ≦ 1.2, 3.0 ≦ v ≦ 5.
0, 3.0 ≦ w ≦ 5.0, 0 ≦ δ ≦ 1)) at least in part. The _{Sr u Bi v Ti w O 15} ±
δ may be a single crystal or polycrystal. Sr _u Bi _v Ti _w O
_The reason why the composition range of ₁₅ ± δ is limited as described above is that a high dielectric polarization value can be obtained with a composition within these ranges.

The thickness of each of the deterioration preventing layers 14a and 14c is preferably 5 to 50 nm. Film thickness 5
If it is smaller than nm, deterioration cannot be sufficiently prevented,
This is because if the thickness is larger than 50 nm, the temperature characteristics deteriorate.
Incidentally, the thickness of the central layer 14b is, for example, 50 to 1000.
nm.

The ferroelectric capacitor having such a configuration can be manufactured as follows.

First, a substrate 11 made of, for example, silicon is prepared, and an iridium oxide film is formed thereon as a diffusion preventing layer 12 by, for example, a reactive sputtering method. Next, a platinum film is formed thereon as the lower electrode 13 by, for example, a sputtering method.

Subsequently, a ferroelectric film 14 is formed on the lower electrode 13 by, for example, CVD (Chemical Vapor Depos).
ition) method, laser ablation method, sol-gel method and MOD (Metal Organic Decomposition) method.
_{Sr x Bi y Ta z Nb (} 2-z) O 9 deterioration preventing layer 14a containing ± _d, the central layer 1 containing _{Sr u Bi v Ti w O 15} ± δ
4b and _{Sr x Bi y Ta z Nb (} 2-z) O 9 deterioration preventing layer 14c containing ± _d sequentially stacked.

After the ferroelectric film 14 is formed as described above, a platinum film is deposited thereon as the upper electrode 15 by, for example, a sputtering method. Thereafter, etching is appropriately performed by, for example, an ion milling method to complete the ferroelectric capacitor shown in FIG.

The ferroelectric capacitor can be used, for example, as a part of a memory as follows.

FIG. 2 shows an example of a specific structure of a memory using a ferroelectric capacitor. This memory includes the ferroelectric capacitor 10 according to the present embodiment and a switching transistor 20. The transistor 20 has, for example, a source region 21 made of an n ⁺ layer and a drain region 22 made of an n ⁺ layer formed at intervals on the surface of a substrate 11 made of p-type silicon. A gate electrode 24 as a word line is formed on the substrate 11 between the source region 21 and the drain region 22 with a gate insulating film 23 interposed therebetween. In addition,
A field oxide film 31 for element isolation is formed on the surface of the substrate 11 around the transistor 20.

On the transistor 20, an interlayer insulating film 3
2, a ferroelectric capacitor 10 is formed.
That is, the diffusion prevention layer 12, the lower electrode 13, the ferroelectric film 14, and the upper electrode 15 are sequentially stacked via the interlayer insulating film 32. The source region 21 of the transistor 20 and the diffusion prevention layer 12 of the ferroelectric capacitor 10 are electrically connected via a contact hole 32 a provided in the interlayer insulating film 32. A plug layer 33 made of, for example, polycrystalline silicon or tungsten (W) is embedded in the contact hole 32a.

In the memory having such a configuration, when a voltage is applied to the gate electrode 24 of the transistor 20,
The switch of the transistor 20 is turned “on”, and current flows between the source region 21 and the drain region 22. Thereby, the ferroelectric capacitor 1 is connected via the plug layer 33.
A current flows to 0, and a voltage is applied between the upper electrode 15 and the lower electrode 13. In the ferroelectric capacitor 10, when a voltage is applied, polarization occurs in the ferroelectric film 14.
Because this voltage-polarization characteristic has hysteresis,
Using this hysteresis, data of "1" or "0" is stored or read. Here, since the ferroelectric film 14 includes the central layer 14b having excellent temperature characteristics and the deterioration preventing layers 14a and 14c for preventing the deterioration, the change in the dielectric polarization value due to the temperature change is small, and the polarization inversion occurs. Less fatigue due to

As described above, according to the ferroelectric capacitor according to the present embodiment, since the ferroelectric film 14 is provided with the central layer 14b and the deterioration preventing layers 14a and 14c, the temperature characteristics and the fatigue characteristics are improved. Both can be improved.

[0026]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Further, specific embodiments of the present invention will be described in detail with reference to the drawings. In the following each embodiment, the ferroelectric film 14 deterioration preventing layer 14a of, and 14c constituted by _{Sr 0.8 Bi 2.2 Ta 2 O 9} ± d, and the central layer 14b is constituted by SrBi ₄ Ta ₄ O ₁₅ The case will be described.

(First Embodiment) In this embodiment, first, a substrate 11 made of silicon is prepared, and an iridium oxide film having a thickness of 100 nm is formed thereon by a reactive sputtering method. No. 12 was formed. Next, a 200 nm-thick platinum film was formed thereon by a sputtering method to form the lower electrode 13.

Subsequently, a film thickness of 20 n is formed on the lower electrode 13.
m Sr _0.8 Bi _2.2 Ta ₂ O ₉ ± _d , a deterioration preventing layer 14a containing SrBi ₄ Ta ₄ O ₁₅ having a thickness of 160 nm, a central layer 14b containing SrBi ₄ Ta ₄ O ₁₅ having a thickness of 160 nm, and Sr _0.8 Bi _2.2 T having a thickness of 20 nm.
a ₂ O ₉ ± _d and a deterioration preventing layer 14c containing
A ferroelectric film 14 was formed. Here, the deterioration prevention layer 14
The formation of the a, 14c and the central layer 14b was specifically performed by the flash-MOCVD method as follows.

FIG. 3 shows a schematic configuration of a flash-MOCVD apparatus used in this embodiment of the present invention. This MOCVD apparatus is a liquid material supply device 4 for supplying a liquid organometallic precursor (organic metal material) as a gas.
0, and a gas mixing section 5 for mixing the organometallic precursor vaporized by the liquid raw material supply device 40 with oxygen gas (O ₂ ).
0 and a gas mixed by the gas mixing section 50 to react and thermally decompose to form a reaction chamber 6 for forming a thin film on the substrate 11.
0.

The liquid material supply device 40 includes a plurality of (here, four) containers 41a and 41 for accommodating a plurality of organometallic precursors, which are raw materials of a thin film to be formed, in a liquid state.
b, 41c and 41d. Each container 41a-41
d is connected to a liquid mixing valve (mixing manifold) 43 via each of the on-off valves 42a to 42d. The liquid mixing valve 43 is precisely controlled electrically, and mixes the respective organometallic precursors supplied in accordance with the opening and closing of the respective on-off valves 42a to 42d at a predetermined ratio. A vaporizing chamber 45 is connected to the liquid mixing valve 43 via a liquid pump 44. The vaporization chamber 45 heats the liquid organometallic precursor mixed by the liquid mixing valve 43 at a predetermined temperature (180 to 240 ° C.) and vaporizes (flash vaporizes) on a porous metal frit (not shown). Has become.

The gas mixing section 50 is connected to the vaporizing chamber 45 and the reaction chamber 60, and mixes the organometallic precursor supplied together with the carrier gas (here, argon (Ar) gas) from the vaporizing chamber 45 with oxygen gas. Then, it is supplied into the reaction chamber 60. The reaction chamber 60 includes a gas mixing section 5.
0, and a mounting table 62 is provided so as to face the shower nozzle 61, and the gas mixed by the gas mixing unit 50 is supplied to the mounting table 62.
Is supplied uniformly to the surface of the substrate 11 placed on the substrate. The mounting table 62 is provided with a heater (not shown), and heats the substrate 11 at a predetermined temperature (400 to
(650 ° C.). Reaction chamber 60
Is provided with a pump 63 for evacuating the inside of the reaction chamber 60.

Here, such a flash-MOC
With use of VD device, bismuth raw material as triphenyl bismuth _{(Bi (C 6 H 5)} 3) of the (Bi) and, as a raw material of strontium (Sr) Sr-tetramethylheptanedione _{(Sr (C 11 H 19 O} 2 ₂ ) The adduct of tetraglyme (CH ₃ OCH ₂ CH ₂ OCH ₃ ) (ad)
dition product; the compound addition product) was added, tantalum (raw material as Ta- partially compounds substituted by tetramethylheptanedione alkoxy group isopropoxide Ta) (Ta (i-OC 3 H ₇ )
₄ (C ₁₁ H ₁₉ O ₂ )) as a raw material for titanium (Ti), a compound (T) in which part of the alkoxy group of Ti-isopropoxide is substituted by tetramethylheptanedione.
i a _{(i-OC 3 H 7)} 2 (C 11 H 19 O 2) 2) were used, respectively. Each of these organometallic precursors is dissolved in tetrahydrofuran (THF; C ₄ H ₈ O),
a to 41d.

After preparing the apparatus in this way, first, the on-off valves 42a to 42d are opened and closed appropriately to selectively supply the organometallic precursors of the respective raw materials of bismuth, strontium and tantalum, and the bismuth having a thickness of 20 nm is formed. Then, a layer mainly composed of amorphous composed of strontium, tantalum and oxygen was formed. That is, the respective organometallic precursors were mixed by the liquid mixing valve 33, vaporized in the vaporization chamber 35, mixed with oxygen gas in the gas mixing section 40, and supplied into the reaction chamber 50. At this time, the gas pressure in the reaction chamber 50 is 0.5 to 50 T
orr and the substrate was kept at 400-650 ° C.
The supply amount of each organometallic precursor was adjusted so that the composition ratio of the layer mainly composed of amorphous was bismuth: strontium: tantalum to be 2.2: 0.8: 2.

Next, the layer containing amorphous as a main component was heated at 750 ° C. for 30 seconds in an oxygen atmosphere to perform RTA treatment, thereby crystallization of the layer containing amorphous as a main component. Subsequently, at 750 ° C. in an oxygen atmosphere.
For 30 minutes to promote crystallization, and to prevent deterioration.
a was formed.

After the formation of the deterioration preventing layer 14a, similarly, the organometallic precursors of the respective raw materials of bismuth, strontium and titanium are selectively supplied, and the film thickness is 160 nm.
A layer mainly composed of amorphous composed of bismuth, strontium, titanium and oxygen was formed. In addition, the supply amount of each organometallic precursor is such that the composition ratio of the layer mainly composed of amorphous is bismuth: strontium: titanium:
Adjusted to be 1: 4.

Thereafter, the layer containing amorphous as a main component is heated at 750 ° C. for 30 seconds in an oxygen atmosphere and subjected to RTA treatment to crystallize the layer containing amorphous as a main component. ° C
For 1 hour to promote crystallization and form the central layer 14b.

After the formation of the central layer 14b, similarly to the deterioration preventing layer 14a, a 20 nm-thick layer mainly composed of bismuth, strontium, tantalum, and oxygen is formed. After crystallization, crystallization was further promoted by a heat treatment to form the deterioration preventing layer 14c.

After the ferroelectric film 14 was formed in this manner, an upper electrode 15 of a 200 nm-thick platinum film was formed on the ferroelectric film 14 by a sputtering method. Thereafter, etching was performed by an ion milling method to complete a ferroelectric capacitor having a diameter of 50 μm.

With respect to the ferroelectric capacitor thus obtained, the temperature characteristics and the fatigue characteristics were measured. The temperature characteristic is determined by the dielectric polarization value at 25 ° C. (2P
r ₂₅ ) and the dielectric polarization value at 150 ° C. (2Pr ₁₅₀ ) were measured and judged from the rate of change (Pr ₁₅₀ / Pr ₂₅ ). Further, the dielectric characteristic was measured by measuring the dielectric polarization value before and after repeating the application of a voltage of 5 V 10 ¹² times, and judging from the rate of change (Pr _after / Pr _initial ). The results are shown below.

² Pr ₂₅ ; 22 μC / cm ² Pr ₁₅₀ / Pr ₂₅ ; 0.9 Pr _after / Pr _initial ; 0.9

As a comparative example, a ferroelectric capacitor in which only the configuration of the ferroelectric film was changed (Comparative Examples 1 and 2)
Was formed by the same method as in this example. Comparative Example 1
The ferroelectric film was composed of only a 200-nm-thick layer containing SrBi ₄ Ti ₄ O ₁₅ . In Comparative Example 2, the ferroelectric film was composed of only a 200 nm-thick layer containing Sr _0.8 Bi _2.2 Ta ₂ O ₉ ± _d . For these, the temperature characteristics and the fatigue characteristics were measured in the same manner as in this example. The results are shown below.

Comparative Example 1 ² Pr ₂₅ ; 22 μC / cm ² Pr ₁₅₀ / Pr ₂₅ ; 0.9 Pr _after / Pr _initial ; 0.5 Comparative Example 2 ² Pr ₂₅ ; 22 μC / cm ² Pr ₁₅₀ / Pr ₂₅ ; 0.75 Pr _after / Pr _initial ; 0.9

As described above, unlike the comparative example, the ferroelectric capacitor of this example was excellent in both the temperature characteristic and the fatigue characteristic.

(Second Embodiment) In this embodiment, first, a substrate 11 made of silicon is prepared, and a silicon dioxide (SiO ₂ ) film having a thickness of 350 nm is formed on the surface thereof by thermal oxidation and diffused. The prevention layer 12 was formed. Then, a 30-nm-thick titanium film is deposited thereon by a sputtering method to form a bonding layer, and then a 200-nm-thick platinum film is deposited by the same sputtering method to form a lower electrode 1.
3 was formed.

Subsequently, a film thickness of 20 n
m Sr _0.8 Bi _2.2 Ta ₂ O ₉ ± _d , a deterioration preventing layer 14a containing SrBi ₄ Ta ₄ O ₁₅ having a thickness of 160 nm, a central layer 14b containing SrBi ₄ Ta ₄ O ₁₅ having a thickness of 160 nm, and Sr _0.8 Bi _2.2 T having a thickness of 20 nm.
a ₂ O ₉ ± _d and a deterioration preventing layer 14c containing
A ferroelectric film 14 was formed. Here, the deterioration prevention layer 14
The formation of the a, 14c and the central layer 14b was carried out by the sol-gel method, specifically, as follows.

That is, first, on the lower electrode 13, the composition ratio of strontium, bismuth and tantalum is 0.8:
After the sol-gel solution of 2.4: 2.0 is spin-coated, each heat treatment is sequentially performed at 100 ° C. for 3 minutes, 250 ° C. for 5 minutes, 750 ° C. for 30 seconds, and 750 ° C. for 60 minutes to sequentially deteriorate. The prevention layer 14a was formed.

Then, a sol-gel solution having a composition ratio of strontium, bismuth and titanium of 1.0: 4.5: 4.0 is spin-coated thereon, and then the deterioration preventing layer 14a is formed.
Each heat treatment was performed in the same manner as described above to form the central layer 14b. Subsequently, a deterioration preventing layer 14c was formed thereon in the same manner as the deterioration preventing layer 14a. Thereafter, a heat treatment was further performed at 750 ° C. for 30 minutes in an oxygen atmosphere to form a ferroelectric film 14.

After the ferroelectric film 14 was formed in this manner, a 200 nm-thick platinum film upper electrode 15 was formed on the ferroelectric film 14 by sputtering. Thereafter, etching was performed by an ion milling method to complete a ferroelectric capacitor having a diameter of 50 μm.

With respect to the ferroelectric capacitor thus obtained, the temperature characteristics and the fatigue characteristics were measured in the same manner as in the first embodiment. The results are shown below.

2Pr ₂₅ ; 22 μC / cm ² Pr ₁₅₀ / Pr ₂₅ ; 0.9 Pr _after / Pr _initial ; 0.88

As a comparative example, a ferroelectric capacitor in which only the structure of the ferroelectric film was changed (Comparative Examples 3 and 4)
Was formed by the same method as in this example. Comparative Example 3
The ferroelectric film was composed of only a 200-nm-thick layer containing SrBi ₄ Ti ₄ O ₁₅ . In Comparative Example 4, the ferroelectric film was composed of only a 200-nm-thick layer containing Sr _0.8 Bi _2.2 Ta ₂ O ₉ ± _d . Also for these, the temperature characteristics and the fating characteristics were measured. The results are shown below.

Comparative Example 3 ² Pr ₂₅ ; 22 μC / cm ² Pr ₁₅₀ / Pr ₂₅ ; 0.9 Pr _after / Pr _initial ; 0.5 Comparative Example 4 ² Pr ₂₅ ; 22 μC / cm ² Pr ₁₅₀ / Pr ₂₅ ; 0.75 Pr _after / Pr _initial ; 0.85

As described above, unlike the comparative example, the ferroelectric capacitor of this example was excellent in both temperature characteristics and fatiguing characteristics.

(Third Embodiment) In this embodiment, first, a substrate 11 made of silicon is prepared, and a 100 nm-thick iridium oxide film is formed thereon by a reactive sputtering method. No. 12 was formed. Next, a lower electrode 13 made of an iridium film having a thickness of 100 nm was formed thereon by a sputtering method.

Subsequently, a 20 nm-thick Sr _0.8 Bi _2.2 Ta film is formed on the lower electrode 13 in the same manner as in the second embodiment.
A deterioration prevention layer 14a containing ₂ O ₉ ± _d and a film thickness of 160 nm
A central layer 14b containing SrBi ₄ Ta ₄ O ₁₅
A ferroelectric film 14 was formed by sequentially laminating a 0 nm Sr _0.8 Bi _2.2 Ta ₂ O ₉ ± _d containing deterioration preventing layer 14c.

After the ferroelectric film 14 is formed, a film thickness of 100
The upper electrode 15 made of an iridium film having a thickness of 10 nm was formed.
After that, etching by ion milling method,
A ferroelectric capacitor having a diameter of 50 μm was completed.

With respect to the ferroelectric capacitor thus obtained, the temperature characteristics and the fatigue characteristics were measured in the same manner as in the first embodiment. The results are shown below.

² Pr ₂₅ ; 22 μC / cm ² Pr ₁₅₀ / Pr ₂₅ ; 0.9 Pr _after / Pr _initial ; 0.86

As a comparative example, a ferroelectric capacitor in which only the configuration of the ferroelectric film was changed (Comparative Examples 3 and 4)
Was formed by the same method as in this example. Comparative Example 5
The ferroelectric film was composed of only a 200-nm-thick layer containing SrBi ₄ Ti ₄ O ₁₅ . In Comparative Example 6, the ferroelectric film was composed of only a 200 nm-thick layer containing Sr _0.8 Bi _2.2 Ta ₂ O ₉ ± _d . Also for these, the temperature characteristics and the fating characteristics were measured. The results are shown below.

Comparative Example 5 2Pr ₂₅ ; 22 μC / cm ² Pr ₁₅₀ / Pr ₂₅ ; 0.9 Pr _after / Pr _initial ; 0.5 Comparative Example 6 2Pr ₂₅ ; 22 μC / cm ² Pr ₁₅₀ / Pr ₂₅ ; 0.76 Pr _after / Pr _initial ; 0.85

As described above, unlike the comparative example, the ferroelectric capacitor of this example was excellent in both temperature characteristics and fatiguing characteristics.

Although the present invention has been described with reference to the embodiments and examples, the present invention is not limited to these embodiments and examples, and various modifications can be made within an equivalent range. is there. For example, in each of the above embodiments, the deterioration preventing layers 14a and 14c are made of Sr _0.8 Bi _2.2 Ta.
Constituted by ₂ O ₉ ± _d, the central layer 14b SrBi ₄ T
has been described as being constituted by i ₄ O _15, the degradation preventing layer 14a, a _{14c Sr x Bi y Ta z Nb} (2-z)
O ₉ ± _d (0.6 ≦ x ≦ 1.2, 1.7 ≦ y ≦ 2.5,
0 ≦ z ≦ 2.0,0 constituted by ≦ d ≦ 1.0), a central layer _{14b Sr u Bi v Ti w O} 15 ± δ (0.8 ≦ u ≦
1.2, 3.0 ≦ v ≦ 5.0, 3.0 ≦ w ≦ 5.0, 0
<Δ ≦ 1), the same effect as in the above embodiment can be obtained.

Further, in the above embodiment, the memory using the ferroelectric capacitor has been specifically described by way of example. However, the ferroelectric capacitor of the present invention is not limited to a memory cell having various other structures. Can also be used. For example, in the above embodiment, the substrate 1
The memory cell in which the ferroelectric capacitor 10 and the transistor 20 are formed in the direction perpendicular to the substrate 1 has been described, but the memory cell in which the ferroelectric capacitor and the transistor are formed in a direction parallel to the substrate is formed. Can be similarly used.

Furthermore, in the above-described embodiment, the case where the ferroelectric capacitor of the present invention is used for one memory has been described.
The same can be applied to an SI (Large Scale Integrated Circuit) memory.

[0065]

As described above, according to the ferroelectric capacitor of the present invention, since the ferroelectric film is provided with the deterioration preventing layer, it is possible to improve the fatigue characteristics while maintaining excellent temperature characteristics. be able to. Therefore, there is an effect that excellent characteristics can be obtained over a long period of time.

Further, according to the memory of the present invention, since the ferroelectric film of the present invention is provided, deterioration due to the rewriting operation can be reduced while maintaining excellent temperature characteristics. Therefore, there is an effect that the life can be extended while maintaining high quality.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view illustrating a schematic configuration of a ferroelectric capacitor according to an embodiment of the present invention.

FIG. 2 is a sectional view illustrating a configuration of a memory using the ferroelectric capacitor illustrated in FIG.

FIG. 3 is a configuration diagram illustrating a flash-MOCVD apparatus used in the first embodiment of the present invention.

[Explanation of symbols]

11: substrate, 12: diffusion preventing layer, 13: lower electrode, 14
... ferroelectric film, 14a ... first deterioration prevention layer, 14b ... central layer, 14c ... second deterioration prevention layer, 15 ... upper electrode, 2
0 ... transistor, 21 ... source region, 22 ... drain region, 23 ... gate oxide film, 24 ... gate electrode, 31 ...
Field oxide film, 32 interlayer insulating film, 32a contact hole, 33 plug layer, 40 liquid material supply device, 41a, 41b, 41c, 41d container, 42a,
42b, 42c, 42d: open / close valve, 43: liquid mixing valve, 44: liquid pump, 45: vaporization chamber, 50: gas mixing section, 60: reaction chamber, 61: shower nozzle, 62: mounting table, 63: pump

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁶ Identification symbol FI H01L 21/8247 29/788 29/792 (72) Inventor Kenji Katori 6-7-35 Kita-Shinagawa, Shinagawa-ku, Tokyo Sony Stock In company

Claims (8)

[Claims] 1. A ferroelectric capacitor in which a pair of electrodes are connected to a ferroelectric film, wherein the ferroelectric film includes a deterioration preventing layer for preventing deterioration due to application of a voltage. Ferroelectric capacitor. 2. The ferroelectric capacitor according to claim 1, wherein the ferroelectric film includes a central layer, and the deterioration preventing layer formed between the central layer and an electrode. . Wherein the deterioration preventing layer, Sr _x Bi _y Ta _z
Nb _(2-z) O ₉ ± _d (where 0.6 ≦ x ≦ 1.2, 1.
2. The ferroelectric capacitor according to claim 1, further comprising: 7 ≦ y ≦ 2.5, 0 ≦ z ≦ 2.0, 0 ≦ d ≦ 1.0). 4. The ferroelectric capacitor according to claim 1, wherein said deterioration preventing layer has a thickness in a range of 5 nm or more and 50 nm or less. Wherein said central _{layer, Sr u Bi v Ti w O} 15
± δ (where 0.8 ≦ u ≦ 1.2, 3.0 ≦ v ≦ 5.
3. The ferroelectric capacitor according to claim 2, wherein 0, 3.0 ≦ w ≦ 5.0, 0 ≦ δ ≦ 1). 6. The electrode according to claim 1, wherein the electrode is at least one selected from the group consisting of platinum (Pt), iridium (Ir), ruthenium (Ru), rhodium (Rh), and palladium (Pd).
2. The ferroelectric capacitor according to claim 1, comprising a seed. 7. The electrode has at least a portion of platinum (P)
2. The ferroelectric capacitor according to claim 1, further comprising at least one oxide selected from the group consisting of t), iridium (Ir), ruthenium (Ru), rhodium (Rh), and palladium (Pd). . 8. A memory having a ferroelectric capacitor in which a pair of electrodes are connected to a ferroelectric film, wherein the ferroelectric film includes a deterioration preventing layer for preventing deterioration due to application of a voltage. A memory characterized in that: