JPH1153327A - Multiprocessor system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve the working rate of each processor by realizing dynamic load distribution of task. SOLUTION: This system consists of plural processors 11 for executing processing, a shared memory 12 which can be accessed to from all the processors 11 and stores a command sequence that the processor 11 executes and data of a processing object, a task memory 13, which has an area storing a task number waiting for processing at each processor 11 and initiation address information on the common memory of each task, and a bus 14 for connecting these. In this case, the processors 11 which complete processing and enter idling conditions, access the task memory 13, take out task from a task list of a processor holding more task than a predetermined threshold value, update the task list of the processors 11, register it as their own processors and immediately initiate an execution of the task taken out.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a multiprocessor system, and more particularly to a multiprocessor system capable of dynamic load distribution.

[0002]

2. Description of the Related Art With the recent development of semiconductor technology, the processing speed of computers has been dramatically improved. Also, applications to be processed are demanding enormous computer resources, as represented by multimedia, and there is a demand for further improvement in processing speed. Against this background, a multiprocessor computer having a plurality of processors is being developed and put into practical use.

In a conventional multiprocessor system, one process is divided into a plurality of tasks that can be executed in parallel, and each processor executes a task that can be executed in parallel. In general, task division and assignment to processors are performed before task execution, and any task after execution is not reassigned.

[0004]

In the above-described conventional multiprocessor system, the assignment of tasks to each processor is determined at the start of processing, and the task is not reassigned according to the load status of each processor. When the amount of calculation of each task is different, load imbalance among processors tends to occur due to dynamic load distribution. For this reason, it has been difficult to equalize the load on each processor and minimize the processing time of the entire system.

An object of the present invention is to provide a multiprocessor system which realizes dynamic load distribution for reallocating tasks according to the load status of each processor, and improves the ratio of each processor.

[0006]

SUMMARY OF THE INVENTION The present invention provides a plurality of processors that execute processing, a shared memory that is accessible from all the processors, and stores an instruction sequence executed by the processors and data to be processed. An exclusive-accessible task memory having an area for storing the number of tasks waiting to be processed in each processor and start address information of each task on the shared memory, and a bus connecting the processor, the shared memory, and the task memory. A multiprocessor system configured, wherein the processor that has completed processing and is in an idling state accesses the task memory and holds more tasks than a predetermined threshold. The task is taken out of the task list and the task Update the door, registered as the own processor task, immediately characterized by initiating the execution of the extraction task.

[0007]

Next, an embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of a multiprocessor system according to the present invention. The multiprocessor system shown in FIG. 1 includes a plurality of processors 11, a shared memory 12, a task memory 13, and a bus 14.

The processor 11 is a minimum unit for processing each task, reads an instruction sequence and data from the shared memory 12, and executes each instruction.

[0010] The shared memory 12 is accessed by each processor 11 and stores an instruction sequence and data to be executed by each processor 11. Since each processor 11 has its own program counter, different instructions can be executed at once.

The task memory 13 stores, for each processor 11, the current number of tasks waiting for processing held by each processor and the start address (task list) of each task on the shared memory. Processor 11 that has completed processing
Accesses the task memory 13 and
Check the number of tasks held by. If there is a processor 11 holding a number of tasks larger than a preset threshold, the task is extracted from the current task list, registered in the task list of the own processor, and executed. Access to the task list is exclusive, so there is no loss of consistency.

The bus 14 is a bus for connecting the processor 11, the shared memory 12, and the task memory 13.

FIG. 2 is a diagram showing a configuration example of the task memory of the multiprocessor system shown in FIG. Before executing the processing, each processor 11 or a specific processor of the processor 11 decomposes the processing into tasks that can be executed in parallel, and stores the number of tasks allocated to each processor 11 in the task memory 13 and the number of tasks in the shared memory. Stores the start address of the task instruction sequence. In this example, processor 1 is 3
Processor 2 has 10 tasks, and processor 3 has 5 tasks.

When the processor 4 completes the processing and refers to the task memory 13, it is understood that the load of the processor 2 is heavier than other processors. In this case, the processor 4 removes the last task from the task list of the processor 2, re-registers the task as a process of its own processor, and immediately starts processing the task.

[0015]

As described above, according to the multiprocessor system of the present invention, the processor which has completed the processing and has entered the idling state accesses the task memory, and selects the task from the task list of the processor holding many tasks. It takes out, re-registers as its own task, and immediately starts processing. By realizing dynamic load distribution of each task, it is possible to improve the operation rate of each processor and shorten the processing time of the entire system. It has the effect of.

[Brief description of the drawings]

FIG. 1 is a configuration diagram showing an embodiment of a multiprocessor system of the present invention.

FIG. 2 is a diagram illustrating a configuration example of a task memory illustrated in FIG. 1;

[Explanation of symbols]

 11 processor 12 shared memory 13 task memory 14 bus

Claims (7)

[Claims] 1. A plurality of processors for executing processing, a shared memory accessible by all of the processors and storing an instruction sequence to be executed by the processors and data to be processed, a task waiting for processing in each processor A multiprocessor system including a task memory having an area for storing the number and start address information of each task on a shared memory, and a bus connecting the processor, the shared memory, and the task memory; The processor in the idling state then accesses the task memory, retrieves a task from the task list of the processor that has not completed processing, updates the task list of the processor, registers it as a task of its own processor, Immediately execute the retrieved task A multiprocessor system, characterized in that: 2. The processor, which is in an idling state after processing is completed, accesses the task memory and selects a task from a task list of the processor which holds more tasks than a predetermined threshold. 2. The multiprocessor system according to claim 1, wherein the multiprocessor system is extracted. 3. The processor, which has completed processing and is in an idle state, accesses the task memory and retains more tasks than a predetermined threshold. 2. The multiprocessor system according to claim 1, wherein the task is extracted from the multiprocessor. 4. The multiprocessor system according to claim 1, wherein access to the task memory is performed exclusively. 5. A plurality of processors for executing processing, a shared memory accessible by all the processors, storing an instruction sequence to be executed by the processors and data to be processed, and a task waiting for processing in each processor. A dynamic load balancing method for a multiprocessor system comprising a task memory having an area for storing the number and start address information of each task on a shared memory, and a bus connecting the processor, the shared memory and the task memory The processor, which has been in the idling state after the processing is completed, accesses the task memory and extracts a task from the task list of the processor that holds more tasks than a predetermined threshold, Update the task list of the processor, Dynamic load balancing method of a multiprocessor system to register immediately characterized by initiating the execution of the retrieved task as. 6. The task list of the processor, in which the processor which has entered the idling state after the processing is completed, accesses the task memory and holds more tasks than a predetermined threshold. 6. The dynamic load distribution method for a multiprocessor system according to claim 5, wherein a task is extracted from the multiprocessor system. 7. The dynamic load distribution method for a multiprocessor system according to claim 5, wherein access to the task memory is performed exclusively.