JPH11330906A - Analog filter circuit and magnetic disk drive using the same - Google Patents

Abstract

(57) [Abstract] [Problem] To reduce the restriction on the production process type of a variable transconductance amplifier,
Provided is an analog filter circuit whose relationship with a cutoff frequency has a linear characteristic. An analog filter for filtering a signal inputted from the outside, a transconductance amplifier having the same characteristics as a transconductance amplifier constituting the analog filter, and a control current of the same magnitude supplied to both amplifiers. 26 to 28 and an amplifier 2
Circuits 20 and 22 for generating a signal having a magnitude proportional to the transconductance of 1 and circuits 11 and 23 for generating a signal having a magnitude corresponding to the value of the setting data. And circuits 24 and 25 for controlling the magnitude of the control current.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an analog filter circuit using a transconductance amplifier, and more particularly, to an analog filter circuit whose cutoff frequency changes according to setting data.

[0002]

2. Description of the Related Art FIG. 2 is a block diagram showing a configuration of a conventional analog filter circuit. The illustrated analog filter circuit includes an analog filter 10 and an analog filter 10.
DAC that generates a control signal with a cutoff frequency of
tal to Analog Converter) 11, Analog filter 1
It comprises a register 12 in which data designating a cutoff frequency of 0 is set, and a reference current generation block 13 for generating a reference current for the DAC 11.

[0003] The analog filter 10 is composed of a transconductance amplifier 14 and a capacitor 15. The reference current generation block 13 includes a reference current source 16 and
And transistors 17 and 18 for transmitting a reference current.

[0004] The DAC 11 includes a reference current generation block 13.
And the set value n of the register 12 are inputted, and a current having a magnitude n times the reference current is output. The output current of the DAC 11 is input to the transconductance amplifier 14 as a transconductance control current.

Here, the transconductance amplifier 1
Assuming that the transconductance of No. 4 is gm and the capacitance value of the capacitor 15 is C, the cutoff frequency fc of the analog filter 10 can be expressed by the following equation (1).

Fc = gm / (2πC) (1) As described above, the cutoff frequency fc of the analog filter 10 changes in proportion to the transconductance gm. For this reason, the cutoff frequency fc of the analog filter 10 can be controlled by changing the set value of the DAC 11.

The above analog filter is described in US Pat. No. 5,572,163.

FIG. 3 shows the relationship between the control current and the transconductance in the transconductance amplifier. In the figure, reference numeral 60 denotes a characteristic when configured by a BiCMOS process, and 61 denotes a characteristic when configured by a CMOS process. As shown in the figure, the characteristics of the transconductance amplifier differ depending on the type of semiconductor configuration such as BiCMOS or CMOS (hereinafter referred to as a production process type).

In the above conventional analog filter circuit, the transconductance amplifier 14 constituting the analog filter 10 is made by a BiCMOS process. As shown in the figure, the relationship between the control current of the transconductance amplifier formed of BiCMOS and the transconductance has a linear characteristic. Therefore, in the above-described conventional analog filter circuit, the size of the data set in the register 12 and the cutoff of the filter 10 are reduced. The relationship with the off frequency fc has a linear characteristic.

[0010]

However, for example, an analog filter circuit used as one function of a magnetic disk drive may be mounted together with other processing circuits in the same integrated circuit. Sometimes the type cannot be BiCMOS.

In the circuit of FIG. 2, when the transconductance amplifier 14 is formed of, for example, CMOS, the relationship between the control current and the transconductance becomes non-linear as shown in FIG. The relationship between the size and the cut-off frequency fc of the filter 10 also has non-linear characteristics. That is, since the amount of change of the cutoff frequency with respect to a unit change (change of one value) of the setting data is not constant, it becomes difficult to control the cutoff frequency with high accuracy.

It is an object of the present invention to provide an analog filter circuit which can relax the restriction on the production process type of the transconductance amplifier and make the relationship between the size of the set data and the cutoff frequency linear characteristics. Aim.

[0013]

According to the present invention, there is provided an analog filter circuit having a variable transconductance amplifier and a capacitor, wherein the cutoff frequency is changed in accordance with setting data. An analog filter for filtering a signal, a control current generating block for generating a control current for controlling transconductance of the analog filter,
A register for holding setting data; and a DA converter for outputting a current having a magnitude corresponding to the setting data of the register, wherein the control current generation block outputs a voltage of a constant level; A variable voltage source for generating a voltage having a magnitude corresponding to the output current of the DA converter, and an output voltage of the reference voltage source mounted on the same integrated circuit as the variable transconductance amplifier with the same circuit configuration and the same layout. A replica transconductance amplifier, a resistor for converting an output current of the replica transconductance amplifier into a voltage, a converted voltage of the resistor, and a differential amplifier for receiving an output voltage of the variable voltage source. And a current of the same magnitude in the variable transconductance amplifier and the replica transconductance amplifier. A current folding circuit for supplying,
A circuit for controlling the magnitude of the control current according to the output voltage of the differential amplifier.

[0014]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, an analog filter circuit according to an embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of the analog filter circuit of the present embodiment. As shown in the figure, the analog filter circuit includes an analog filter 10, a register 12 for setting a cutoff frequency of the analog filter 10, a DAC 11 for converting a set value of the register 12 into an analog value, and a control current for transconductance. And a control current generation block 19 that generates All of these configurations are implemented on a one-chip integrated circuit formed by a CMOS process.

The analog filter 10 includes a transconductance amplifier 14 and a capacitor 15. Here, the analog filter 10 has a filter characteristic determined by the conductance gm of the transconductance amplifier 14 and the capacitance value c of the capacitor 15, and has a cutoff frequency determined by Expression (1).

The control current generation block 19 includes a reference voltage source 20 and a replica transconductance amplifier 21.
A variable voltage source 23, an NMOS transistor 25,
It comprises PMOS transistors 26, 27 and 28.

[0018] Replica transconductance amplifier 2
1 is configured to have the same characteristics as the transconductance amplifier 14 configuring the analog filter 10. In order to match the characteristics of both, the transconductance amplifier 14 and the replica transconductance amplifier 21 are mounted on the same chip (integrated circuit) with the same circuit configuration and the same layout. As a result, it is possible to reduce the deviation in characteristics due to changes in temperature, power supply voltage, circuit variation, and the like.

The replica transconductance amplifier 21 is connected to a reference voltage source 2 that outputs a constant voltage at its input.
0 is connected, and an external resistor 22 is connected to the output.

The external resistor 22 converts the output current of the replica transconductance amplifier 21 into a voltage. The external resistor 22 is an externally attached resistor, and has high accuracy with little change in resistance value with temperature.

The DAC 11 outputs a current having a magnitude corresponding to the data set in the register 12. The variable voltage source 23 generates a voltage having a magnitude corresponding to the output current of the DAC 11. Here, the output voltage of the variable voltage source 23 is
The size increases linearly with an increase in the setting data of the register 12.

By making the characteristics of the variable voltage source 23 and the reference voltage source 20 the same with respect to the temperature change, it is possible to realize the transconductance gm which is less affected by the temperature change.

The differential amplifier 24 has an input connected to the external resistor 22 and the variable voltage source 23, and an output connected to the gate terminal of the NMOS transistor 25. Differential amplifier 24
Amplifies the input difference voltage with a sufficiently large constant gain and outputs it.

PMOS transistors 26, 27, 28
Constitutes a current folding circuit (current mirror circuit),
The gate terminal is commonly connected to the drain terminal of the NMOS transistor 25, and the source terminal is commonly connected to the power supply voltage Vcc.
Connected to. Control currents of the replica transconductance amplifier 21 and the conductance amplifier 14 are output from the drain terminals of the PMOS transistors 27 and 28, respectively. With this configuration, the PMOS transistors 26, 27, and 28 output a drain current of the same magnitude as the drain current of the NMOS transistor 25.

Next, the operation of the analog filter circuit will be described.

The output voltage value of the reference voltage source 20 is Vref,
The transconductance of replica transconductance amplifier 21 is gm, and the resistance of external resistor 22 is Rre.
Assuming that f, the voltage value V1 generated by the resistor 22 is expressed by the following equation (2).

V1 = Vref × gm × Rref (2) When the output voltage value of the variable voltage source 23 is V2 and the gain of the differential amplifier 24 is α, the output voltage of the differential amplifier 24 is α (V2 −V1). With this output voltage, N
The drain current of the MOS transistor 25 is controlled, and the drain current of the same magnitude is
It flows to 27 and 28. Then, the transconductance gm changes according to the characteristic 61 in FIG. 3, and the input voltage V1 of the differential amplifier 24 changes according to the equation (2).

Thus, the transconductance gm of the replica transconductance amplifier 21 is
Negative feedback control is performed so that the output voltage α (V2−V1) of the differential amplifier 24 approaches 0.

As a result, the following equations (3) and (4) hold.

Vref × gm × Rref = V2 (3) gm = V2 / (Vref × Rref) (4) As can be seen from Expression (4), the transconductance gm of the replica transconductance amplifier 21 is a variable voltage source. 23 in proportion to the voltage value V2.

On the other hand, the conductance amplifier 14 in the analog filter 10 receives a control current having the same magnitude as that of the replica transconductance amplifier 21.
The transconductance gm is the same as that of the replica transconductance amplifier 21. For this reason, the transconductance gm of the conductance amplifier 14 also changes in proportion to the voltage value V2 of the variable voltage source 23.

Here, since the voltage value V2, which is the output of the variable voltage source 23, has a value that increases linearly with an increase in the data set in the register 12, the cutoff frequency of the analog filter 10 is set according to equation (1). It will increase linearly with increasing data.

As described above, in the analog filter circuit of the present embodiment, a filter in which the relationship between the size of the data set in the register and the cutoff frequency of the analog filter has a linear characteristic is realized by the CMOS process.
In addition, since the change amount of the cutoff frequency with respect to the unit change of the setting data is constant, the cutoff frequency can be set with high accuracy. Further, a change in the cutoff frequency with respect to a change in temperature, power supply voltage, or the like can be suppressed to a small value.

Next, the analog filter 10, the variable voltage source 23, and the DAC 11 will be described in more detail.

FIG. 4 shows the configuration of the analog filter 10 when a secondary low-pass filter is used. This analog filter 10 includes a variable transconductance amplifier 5
0, 51, 52, 53, and capacitors 54, 55, 56, 57
It is composed of The control currents generated by the control current generation block 19 are commonly input to the variable transconductance amplifiers 50 to 53.

Transconductance amplifiers 50, 5
The transconductances of 1, 52, and 53 are respectively gm1, gm2, gm3, and gm4, and the capacitances 54, 5
Assuming that the capacitance values of 5, 56 and 57 are C, the transfer function H (s) of this filter is represented by the following equation (5).
Here, w0 is the cutoff frequency of the secondary low-pass filter, Q0 is the Q value of the filter, and A is the gain.

[0037] H (s) = A × w0 2 / (s 2 + w0 / Q0s + w0 2) ... (5) However, w0 = sqrt (gm2 × gm3 ) / C Q0 = sqrt (gm2 × gm3) / gm4 A = gm1 / Gm2 A circuit (not shown) for adjusting the magnitude of the control current input to each of the variable transconductance amplifiers 50 to 53 may be provided to control various parameters of the filter characteristics. According to equation (5), the cutoff frequency w0 of the secondary low-pass filter is determined by the transconductance g
By controlling m1, gm2, gm3, and gm4 at the same ratio, it is possible to control the filter while keeping the Q value and the gain A constant. Further, the Q value of the filter is controlled by controlling gm4 according to the equation (5), so that the cutoff frequency w0,
Control can be performed with the gain A kept constant.

FIG. 5 shows the configuration of a transconductance amplifier composed of CMOS.

As shown, the transconductance amplifier comprises NMOS transistors 110, 111, 112
And current sources 114, 115, 116, and 117, and a resistor 119 that functions as current-voltage conversion.

In this transconductance amplifier,
An input signal 118 to be filtered is input to the gate terminals of the NMOS transistors 110 and 111, and an output current IOUT as a filtering result is output to the NMOS transistor 110.
And 111 are output from the drain terminals.

Here, the NMOS transistors 110, 1
11, the resistance component rs is determined by the current value I1 of the current sources 114 and 115. The ON resistance ron of the NMOS transistor 112 is equal to the NMOS transistor 11
2 depends on the voltage Vg applied to the gate. This voltage Vg
Is determined by the following equation (6) based on the current value Igm of the control current 120 and the resistance value Rgm of the resistor 119.

Vg = Igm × Rgm (6) Assuming that the transconductance of this circuit with respect to the differential input signal 118 is gm, gm is expressed by the following equation (7).

Gm = 1 / (ron + rs) (7) Here, transconductance gm can be controlled by controlling ron with the control current 120.
To reduce rs in CMOS transistors,
This can be achieved by increasing the current value I1 of the current sources 114 and 115, but this is not realistic in view of power consumption.
Therefore, the control current 120 and the transconductance g
The relationship with m is a non-linear relationship like the characteristic 61 in FIG.

FIG. 8 shows the variable voltage source 23 and the DAC 11
1 shows a circuit configuration.

The variable voltage source 23 includes a reference voltage source 30, a differential amplifier 31, an NMOS transistor 32, and resistors 33 and 36. In this configuration, a current obtained by dividing the voltage value Vk of the reference voltage source 30 by the resistance value Rk of the resistor 33 is output to the DAC 11 as the drain current (reference current) of the NMOS transistor 32.

The DAC 11 is a PMOS transistor 3
4 and 35 and a switch 37. The plurality of PMOS transistors 35 each have a drain terminal connected to the switch 37 and a PMOS transistor 34.
Together with this, a current folding circuit is formed. Each switch 37
Are controlled to be turned on by the number corresponding to the value of the setting data of the register 12.

In the DAC 11, the reference current output from the variable voltage source 23 is input to the PMOS transistor 34, and a drain current of the same magnitude is output from each PMOS transistor 35 corresponding to the switch 37 in the ON state. This output current is input to the resistor 36 of the variable voltage source 23 and is converted into an output voltage V2 of the variable voltage source 23. Thus, the variable voltage source 23 generates the output voltage V2 having a linear relationship with the value of the setting data.

In the present embodiment described above, an example is shown in which the analog filter circuit is formed by a CMOS process. However, similar characteristics can be realized when the analog filter circuit is formed by another production process type. Further, in the present embodiment, a low-pass filter is shown as the analog filter 10, but application to other filters such as a band-pass filter and a high-pass filter is also possible.

Next, an embodiment of a magnetic disk drive using the analog filter circuit of the present invention will be described.

FIG. 6 is a block diagram showing the configuration of the magnetic disk drive. In the figure, the magnetic disk drive includes a signal processing circuit 70, a magnetic disk 650, a magnetic head 6
51, read / write amplifier (R / Wamp) 652, voice coil motor (VCM) 653, voice coil motor control circuit 654, hard disk controller (HD
C) 657, an interface (I / F) 656, and a microcomputer 658. Further, although not shown, it has a spindle motor for rotating the magnetic disk 650 and a spindle control circuit for controlling the spindle motor.

The signal processing circuit 70 includes the register 12, the DAC 11, the control current generation block (gm control) 19, and the analog filter 10 described in the above embodiment. The signal processing circuit 70 is realized as a one-chip integrated circuit using a CMOS process. Here, the analog filter 10 is a low-pass filter for removing noise and equalizing the waveform of the read signal.

The speed of the signal (read signal) read from the magnetic head 651 increases as the writing position (track) on the magnetic disk 650 approaches the outermost periphery. To enable good noise removal in each track, the analog filter 10 is controlled so that the cutoff frequency increases as the read data track approaches the outermost circumference.

The read operation of the magnetic disk drive will be described below.

Upon receiving the read command from the host device 80, the hard disk controller 657 obtains a track to be read, and stores data specifying a cutoff frequency corresponding to the track in the register 1 in the signal processing circuit 70.
Set to 2. Then, the position information is output to the microcomputer 658, and the read gate signal 37 is set to an effective level to start the read processing of the signal processing circuit 70. By setting the register 12, the cut-off frequency of the analog filter 10 matches the track to be read.

The voice coil motor 65 is controlled by the voice coil motor control circuit 654 and the microcomputer 658.
No. 3 moves the magnetic head 651 to the track to be read. Also, a spindle control circuit and a microcomputer 658
Controls the rotation of the spindle motor.
As a result, the read signal read by the magnetic head 651 is amplified by the read / write amplifier 652, and is then reproduced as data by the read processing of the signal processing circuit 70. The hard disk controller 657 and the interface 65
6 to the host 80.

The read signal input to the signal processing unit 70 is made constant in amplitude by the AGC amplifier 71, noise is removed by the analog filter 10, and sampled by the sample and hold circuit 82. This sample is PLL7
6 is performed in synchronization with the timing clock generated. The sampled signal is converted into data by a data detector 81, decoded by an encoder / decoder 74, descrambled by a scrambler / descrambler circuit 75, and passed through an input / output circuit (I / O) 73. This is sent to the hard disk controller 657.

The hard disk controller 657
Outputs the setting data to the register 12 by a serial signal. This serial signal is taken into the signal processing unit 70 via the serial interface (I / F) 72 and set in the register 12 as parallel data of a plurality of bits.

On the other hand, in the data write operation, write data from the host 80 is transferred through the hard disk controller 657 and the input / output circuit 73 and is converted into pseudo-random data by the scrambler / descrambler circuit 75, and then the encoder / decoder 74. And written through the read / write amplifier 652 and the head 651. The voice coil motor 653 and the spindle motor are controlled in the same manner as in the read operation so that writing is performed at an appropriate position.

FIG. 7 shows a mounting configuration of the magnetic disk drive. In the figure, components corresponding to FIG.
The same reference numerals as in FIG. 6 are used.

The internal structure 680 of the magnetic disk drive includes a magnetic disk 650, a spindle motor 682, a head 651, an arm 683 supporting the head 651, a voice coil motor 653, and the read / write amplifier 65.
Consists of two.

The electronic circuit section 68 of the magnetic disk drive
Reference numeral 1 denotes an interface 684 for connecting to an information processing device such as a host, an interface control circuit 656 for controlling input / output of the interface 684, a hard disk controller 657 for controlling data transfer and format, a microcomputer 658, and a signal processing circuit. 70, a spindle motor control circuit 685, and a voice coil motor control circuit 654.

As described above, in the magnetic disk drive of the present embodiment, it is possible to remove the noise and to equalize the waveform of the read signal at the cutoff frequency that matches the speed of the read signal. Further, the entire signal processing circuit 70 including the analog filter circuit can be mounted in a one-chip LSI in a CMOS process.

[0063]

As described above, according to the present invention, the limitation on the production process type of the transconductance amplifier is relaxed, and the relationship between the size of the set data and the cutoff frequency is made linear. It is possible to provide a possible analog filter circuit.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of an analog filter circuit according to an embodiment of the present invention.

FIG. 2 is a block diagram illustrating a configuration of a conventional analog filter circuit.

FIG. 3 is a graph showing a relationship between a control current and a transconductance.

FIG. 4 is a configuration diagram of an analog filter.

FIG. 5 is a circuit diagram of a CMOS transconductance amplifier.

FIG. 6 is a block diagram showing a configuration of a magnetic disk drive using the analog filter circuit of the present invention.

FIG. 7 is a diagram showing a mounting configuration of a magnetic disk drive using the present invention.

FIG. 8 is a circuit diagram illustrating a configuration example of a variable voltage source.

[Explanation of symbols]

 10: Analog filter 11: Digital-to-analog conversion circuit 12: Analog filter cutoff frequency setting register 14: Transconductance amplifier 15: Capacitance 19: Transconductance control current generation block 20: Reference voltage source 21: Replica transconductance amplifier 22: External resistance 23: Variable voltage source 24: Differential amplifier 25, 26, 27, 28: MOS transistor

Continued on the front page (72) Inventor Takashi Nara 5-2-1, Josuihonmachi, Kodaira-shi, Tokyo Inside the Semiconductor Division, Hitachi, Ltd. Manufacturing Storage Systems Division

Claims (8)

[Claims] An analog filter circuit whose cut-off frequency changes in accordance with setting data, comprising: a variable transconductance amplifier and a capacitor, wherein an analog filter for filtering a signal input from the outside and a transconductance of the analog filter. A control current generation block for generating a control current for control, a register for holding setting data, and a D for outputting a current having a magnitude corresponding to the setting data of the register
An A converter, and the control current generation block is mounted on the same integrated circuit as the variable transconductance amplifier, and a variable voltage source that generates a voltage having a magnitude corresponding to the output current of the DA converter. A replica transconductance amplifier to which an output voltage of a reference voltage source is input; a resistor that converts an output current of the replica transconductance amplifier into a voltage; a converted voltage of the resistor; and an output voltage of the variable voltage source. A differential amplifier to be input; a current folding circuit for supplying a current of the same magnitude to the variable transconductance amplifier and the replica transconductance amplifier; and a magnitude of the control current according to an output voltage of the differential amplifier. And a circuit for controlling the analog filter. 2. The analog filter circuit according to claim 1, wherein said replica transconductance amplifier is mounted with the same circuit configuration and the same layout as said variable transconductance amplifier. 3. The analog filter circuit according to claim 1, wherein said analog filter, a current generation block, a register,
An analog filter circuit wherein the DA converter is mounted in the same integrated circuit, and a resistor for converting an output current of the replica transconductance amplifier into a voltage is externally provided to the integrated circuit. 4. The analog filter circuit according to claim 1, wherein all the circuits are formed by a CMOS process. 5. A magnetic disk drive having a signal processing unit having a function of processing a read signal read by a magnetic head, wherein the signal processing unit comprises an analog filter for removing noise and waveform equalization of the read signal. The claim 1
Or a magnetic disk drive comprising the analog filter circuit according to 2. 6. The magnetic disk device according to claim 5, wherein a read command from a host device is received, and data determined by a track position of the magnetic disk on which data to be read is recorded is transferred to the analog filter circuit. A magnetic disk drive further comprising a control circuit for setting a register. 7. The magnetic disk drive according to claim 5, wherein the analog filter, the current generation block, the register, and the DA converter constituting the analog filter circuit are mounted in the same integrated circuit, and the replica transconductance is provided. A magnetic disk drive, wherein a resistor for converting an output current of the amplifier into a voltage is external to the integrated circuit. 8. An analog filter circuit whose cut-off frequency changes according to set data, comprising: an analog filter comprising a variable transconductance amplifier and a capacitor, for filtering a signal inputted from the outside, a control current and a cut-off frequency. A replica transconductance amplifier having the same characteristic as the variable transconductance amplifier, a circuit for supplying a control current of the same magnitude to the variable transconductance amplifier and the replica transconductance amplifier, and a replica transconductance amplifier. A circuit for generating a signal having a magnitude proportional to the transconductance thereof; a circuit for producing a signal having a magnitude corresponding to the value of the setting data; and a difference between magnitudes of the two generated signals. 0 As it approaches,
A circuit for controlling the magnitude of the control current.