JPH11297924A - Semiconductor module and socket, and hybrid integrated circuit device - Google Patents

Abstract

(57) [Summary] [PROBLEMS] To reduce the length of electric wiring to reduce parasitic components. SOLUTION: The memory module 10 has a plurality of bumps 12 protruding on one main surface, and a chip 11 formed on a main surface of a holder 13 formed in a rectangular plate shape.
The holder 13 is in contact with and fixed to the main surface opposite to the group, and left and right held portions 15 and 16 are formed on both short sides of the holder 13. External storage device is memory module 1
0 is arranged on the wiring board with a plurality of
16 is held by the holding unit and mounted. [Effect] Since the external terminals of the memory module can be constituted by the bumps themselves, the parasitic capacitance and inductance of the memory module can be eliminated, and the distortion of the electric signal waveform can be suppressed in the external storage device using the memory module.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor module, a socket, and a hybrid integrated circuit device, and more particularly to a connection technique for a semiconductor module, and more particularly to a technique effective for a memory module.

[0002]

2. Description of the Related Art A conventional memory module is generally constructed as follows. That is, a plurality of semiconductor devices that are functionally configured as memories and packaged and configured as surface mount packages are mounted on the first and second main surfaces of a rectangular wiring board. Each of the semiconductor devices is electrically connected to a plurality of terminals arranged on one end of the wiring board.

[0003] Generally, a memory module undergoes an electrical characteristic test at the time of shipment or receipt. At this time, the memory module is electrically connected via a socket to a tester for performing an electrical characteristic test.

[0004] Japanese Patent Application Laid-Open No. 8-139232 discloses an example in which a memory module is described.

[0005]

However, in the above-described memory module, since relatively long electric wiring is laid on the wiring board, it is difficult to ensure impedance matching for signal propagation. It has been found by the present inventors that there is a problem that a high data rate cannot be realized.

An object of the present invention is to provide a semiconductor module capable of reducing the length of an electric wiring.

[0007] The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0008]

The outline of a typical invention among the inventions disclosed in the present application is as follows.

In other words, the semiconductor module comprises a semiconductor device having a plurality of bumps protruding from one main surface thereof, and a semiconductor device formed in a quadrilateral plate shape on a main surface opposite to the bump group. The holder is provided with a pair of held portions formed on a pair of opposed sides of the holder.

The socket to which the semiconductor module is connected has a main body formed in a quadrilateral larger than the holder, and a pair of opposing ends of the main body have a pair of holding sides for holding the held portion. And a plurality of contacts electrically connected to the respective bumps are formed between the two holding portions on one main surface of the main body.

Further, the hybrid integrated circuit device on which the above-mentioned semiconductor module is mounted includes a wiring board formed in a quadrilateral having a size in which a plurality of the semiconductor modules are arranged, and the wiring boards are opposed to each other. A plurality of sets of holding portions for holding the held portions are formed on a pair of end sides, respectively, and a plurality of electric wirings in contact with the bumps are laid on one main surface of the wiring board. It is characterized by the following.

In the hybrid integrated circuit device described above, the semiconductor modules are electrically connected by the respective bumps being in direct contact with the electrical wiring of the wiring board. The transmission path to the module can be shortened, impedance matching for signal propagation can be easily ensured, and a high data rate can be realized.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to the drawings.

In this embodiment, the semiconductor module according to the present invention is configured as a memory module. As shown in FIG.
Reference numeral 0 denotes a semiconductor chip (hereinafter, referred to as a chip) 11 as a semiconductor device in which an integrated circuit including a memory element (hereinafter, referred to as an integrated circuit) is formed, and a rectangular plate formed by using an insulating material. And a holder 13.

A plurality of chips 11 (two chips in this embodiment) are prepared. Chip 11 is an IC
In a so-called pre-process in the manufacturing process, an integrated circuit is formed in a state of a silicon wafer, and is formed by dicing into a rectangular plate shape. A plurality of bumps 12 are arranged and projected in a matrix form on an active area side main surface (hereinafter, referred to as a first main surface) 11a on the side where the integrated circuit of the chip 11 is formed. For example, bump 1
2 can be formed by welding a gold (Au) ball or by nail head type wire bonding using a gold wire.

The holder 13 is made of an insulating material such as ceramic or glass epoxy resin, and is formed in a rectangular plate shape larger than two chips 11. Holder 1
A plurality of dents 14 (two in the present embodiment) are formed in one principal surface (hereinafter, referred to as a first principal surface) 13a of each of the three.
It is lined up and recessed. Each depression 14 is formed in a trapezoidal hole shape in cross section, and the length of the short side of the trapezoid corresponding to the bottom surface of the depression 14 is set to the size of the chip 11. The depth of the depression 14 is set smaller than the thickness of the chip 11.

On both short sides of the holder 13, a pair of held parts 1
5 and 16 are respectively formed, and both held portions 15,
16 are each formed in a female taper shape. That is, the opposing side surfaces of the held portions 15 and 16 are the first
It is formed in a tapered shape gradually expanding toward the main surface 13a. In order to prevent so-called reverse insertion, the left held portion 15 and the right held portion 16 are formed asymmetrically with each other. That is, the width of the left held portion 15 is set smaller than the width of the right held portion 16.

A second main surface 11b of the chip 13 opposite to the first main surface 11a is in contact with the bottom surface of each recess 14 of the holder 13 and is fixed by an adhesive layer 17, respectively.
The tips of the bumps 12 of each chip 11 protrude from the first main surface 13 a of the holder 13. On this occasion,
Since the chip 11 is positioned by the edge of the bottom surface of the recess 14, the chip 11 is properly held. Since the bumps 12 whose tips protrude from the first main surface 13a of the holder 13 are in a state substantially constituting the external terminals of the chip 11, the external terminals and the chip 11
There is no electrical wiring to electrically connect to the external terminal.

The memory module 10 configured as described above is electrically connected to a testing board or the like via the socket 20 shown in FIG. 2 when undergoing a screening test or a burn-in test. The socket 20 includes a socket body 21 integrally formed using an insulating material such as an epoxy resin. The socket body 21 is formed in a rectangular flat plate slightly larger than the holder 13 of the memory module 10. On both short sides of the rectangle of the socket body 21, a pair of holding portions 22,
3 project upward. Both holding parts 22,
Reference numerals 23 are each formed in a male taper shape, and correspond to the female taper shapes of the held portions 15 and 16 of the memory module 10, respectively. That is, both holding parts 22,
The opposing side surfaces of the 23 are formed in a tapered shape that gradually decreases upward. However, in order to prevent so-called reverse insertion, the left holding portion 22 and the right holding portion 23
Are asymmetrical to each other. That is, the width of the left holding portion 22 is set smaller than the width of the right holding portion 23.

Guide grooves 2 are provided on both holding portions 22 and 23.
4 and 24 are formed respectively, and both guide grooves 24,
Pressing plates 24 support holding plates 25, 25 slidably in the left-right direction. Both holding plates 25, 25 have both guide grooves 2
The memory module 10 is pressed from above by sliding the sliders 4 and 24 in the left-right direction and projecting inward.

A plurality of contacts 26 that are electrically connected to the respective bumps 12 of the memory module 10 are formed between the two holding portions 22 and 23 on the upper surface of the socket body 21. The contact group 26 is an anisotropic conductive member 27
Is formed by The anisotropic conductive member 27 is formed by implanting a large number of conductive pins 27b in the thickness direction in a state of being insulated from each other inside an elastic body 27a such as rubber or resin. Is contacted at the upper end of the pin 27b, the contacted pin 27
Only b is electrically connected to the bump 12.

An upper terminal 28 is provided on the upper surface of the socket body 21.
Are formed so as to correspond to the respective bumps 12, and a plurality of lower terminals 29 electrically connected to a tester (not shown) are formed on the lower surface of the socket body 21. Each upper terminal 28 and each lower terminal 29 are
0 is electrically connected to each other.

The memory module 10 is mounted in the socket 20 configured as described above with the first main surface 11a facing downward as shown in FIG. That is, the left and right held portions 15 of the memory module 10,
16 are respectively fitted to the left and right holding portions 22 and 23 from above, and the left and right holding plates 25 and 25 are slid along the respective guide grooves 24 so that the right and left ends of the holder 13 of the memory module 10 are respectively placed from above. It will be in the state of being held down. At this time, the left and right held parts 15, 16 and the left and right holding parts 2
Since the members 2 and 23 are formed in an asymmetric shape, the occurrence of a so-called reverse insertion is prevented. For example, even if the left held portion 15 is aligned with the right held portion 23, they cannot be fitted.

When the memory module 10 is mounted on the socket 20, each bump 12 comes into contact with each contact 26 formed by the anisotropic conductive member 27, thereby being electrically connected to the tester. .
At this time, since the memory module 10 is pressed against the anisotropic conductive member 27 having elasticity by the pressing plate 25, each bump 12 is securely connected to each contact 26. As a result, each chip 11 of the memory module 10 has bumps 12 and upper terminals 2
8. The tester is electrically connected to the designated terminal of the tester through the electric wiring 30 and the lower terminal 29. Then, each chip 1 of the memory module 10
When a test signal is exchanged between 1 and the tester, a predetermined electrical characteristic test is performed.

When an electrical characteristic test is performed,
The memory module 10 to be inspected is sequentially replaced with respect to the tester for each inspection object. When the memory module 10 as the inspection object is replaced, the memory module 1 is removed from the socket 20 while the socket 20 is connected to the testing board.
0 will be removed. In this case, the memory module 10 is lifted up after the holding plates 25, 25 are slid along the guide grooves 24 to release the holding, and the memory module 10
0 can be easily removed.

In the present embodiment, the hybrid integrated circuit device according to the present invention is configured as an external storage device 40 using a plurality of memory modules 10. As shown in FIGS. 4 and 5, the external storage device 40 includes a printed wiring board 41.
Represents a short side longer than the length of the holder 13 of the memory module 10 and a long side longer than the width of a plurality of (in this embodiment, four) memory modules 10 arranged side by side. It has a rectangular flat plate shape.

As shown in FIG. 5, a plurality of sets of a pair of left and right holding portions 42 and 43 are provided on both long sides of the rectangular shape of the printed wiring board 41 (in the present embodiment, 4 sets).
Pairs), arranged side by side and projecting upward. The holding portions 42 and 43 are each formed in a male taper shape, and the holding portion 1 of the memory module 10 is formed.
5 and 16 female tapered shapes respectively. That is, the opposing side surfaces of both holding portions 42 and 43 are formed in a tapered shape that gradually decreases upward. However, in order to prevent so-called reverse insertion, the left holding portion 42 and the right holding portion 43 are formed asymmetrically with each other. That is, the width of the left holding portion 42 is set smaller than the width of the right holding portion 43.

Guide grooves 4 are provided on both holding portions 42 and 43.
4 and 44 are formed respectively, and both guide grooves 44 and 44 are formed.
Pressing plates 44 support holding plates 45, 45 slidably in the left-right direction. Both holding plates 45, 45 are both guide grooves 4
The memory module 10 is pressed from above by sliding the sliders 4 and 44 in the left-right direction and projecting inward.

A plurality of contacts 4 electrically connected to each bump 12 of the memory module 10 are provided between the two holding portions 42 and 43 on the upper surface of the printed wiring board 41.
6 are formed. The group of contacts 46 is formed by an anisotropic conductive member 47. That is, the anisotropic conductive member 47 is formed by implanting a large number of conductive pins 47b in the thickness direction in a state of being insulated from each other inside an elastic body 47a such as rubber or resin. When the bump 12 comes into contact at the upper end of the pin 47b, only the contacted pin 47b is electrically connected.

A plurality of memory module side terminals 48 are formed on the upper surface of the printed wiring board 41 so as to correspond to the bumps 12, respectively.
A plurality of electric wires 49 electrically connected to the terminating resistance element 51 and the memory controller 52 are laid on the lower surface of 1. Terminal 4 on each memory module side
8 and each electric wiring 49 are electrically connected by a communication wiring 50.

The external storage device 40 configured as described above
In FIG. 4, four memory modules 10 are mounted with the first main surface 11a facing downward as shown in FIG. That is, the held portions 15 and 16 of each memory module 10 are fitted into the holding portions 42 and 43 of the printed wiring board from above, respectively, and the holding plates 45 are slid along the guide grooves 44 and the memory The left and right ends of the holder 13 of the module 10 are pressed from above. At this time, the left and right held parts 15, 1
6 and the left and right holding portions 42 and 43 are formed in an asymmetric shape, so that the so-called reverse insertion is prevented.

The memory module 10 is connected to the external storage device 4
0, each bump 12 becomes an anisotropic conductive member 47.
Each chip 11 of each memory module 10 is connected to the bump 12,
The memory module side terminal 48, the communication wiring 50, and the electric wiring 49 are electrically connected to the terminating resistance element 51 and the memory controller 52 of the external storage device 40 which are designated in advance.

That is, each memory module 10 is electrically connected as shown in the equivalent circuit diagram of FIG. The functions of the external storage device 40 are exhibited by exchanging storage signals between each chip 11 of the memory module 10 and the memory controller 52.

The memory module 10 according to the present embodiment
In FIG. 6, since the external terminals of the conventional memory module are formed by the bumps 12 themselves, as shown in FIG.
Since the parasitic capacitance and inductance of the external storage device 40 are eliminated, the distortion of the storage signal waveform can be suppressed in the external storage device 40 according to the present embodiment, and transmission at a high data rate can be realized.

According to the above embodiment, the following effects can be obtained.

A chip having a plurality of bumps protruding from one main surface is fixed on a first main surface of a holder formed in a rectangular plate shape by abutting a second main surface opposite to the bump group. This makes it possible to form external terminals of the memory module by the bumps themselves, thereby eliminating parasitic capacitance and inductance in the memory module.

By forming a pair of held portions on a pair of opposed sides of the holder, the memory module can be electrically connected to the tester via the socket, so that a sorting test, a burn-in test, etc. Can be easily inspected.

By forming a pair of held portions on a pair of opposed sides of the holder, the memory module can be easily mounted on the printed wiring board via the holding portion, so that the external storage device can be used. Can be easily constructed.

As described above, in an external storage device using the memory module, distortion of a storage signal waveform can be suppressed, so that transmission at a high data rate can be realized.

Although the invention made by the inventor has been specifically described based on the embodiment, the invention is not limited to the embodiment, and various modifications can be made without departing from the gist of the invention. Needless to say.

For example, the semiconductor device mounted on the holder is not limited to a bare chip on which bumps are directly formed.
A semiconductor device having bumps protruding from one main surface of the package, such as a semiconductor device having a (micro ball grid array package), may be used.

The semiconductor module is not limited to a memory module, but may be a logical module or the like.

The hybrid integrated circuit device is not limited to being configured as an external storage device, but may be configured as a microcomputer or the like.

In the above description, the case where the invention made by the present inventor is mainly applied to a memory module and an external storage device, which are the fields of use, has been described. However, the present invention is not limited to this case. The present invention can be applied to a semiconductor module in which a plurality of semiconductor devices of the same type or different types are mounted on a substrate, a hybrid integrated circuit device using the semiconductor module, a socket thereof, and a connection technology thereof.

[0045]

The effects obtained by typical aspects of the invention disclosed in the present application will be briefly described as follows.

A semiconductor device having a plurality of bumps protruding from one main surface is fixed on one main surface of a holder formed in a quadrilateral plate shape by abutting the main surface opposite to the bump group on the main surface. As a result, the external terminals of the semiconductor module can be constituted by the bumps themselves, so that the parasitic capacitance and inductance of the semiconductor module can be eliminated. In the hybrid integrated circuit device using this semiconductor module, the distortion of the electric signal waveform is reduced. Can be suppressed.

[Brief description of the drawings]

1A and 1B show a memory module according to an embodiment of the present invention, wherein FIG. 1A is a plan view, FIG. 1B is a left side view,
(C) is a right side view, and (d) is a side sectional view.

FIGS. 2A and 2B show a socket according to an embodiment of the present invention, wherein FIG. 2A is a plan view, FIG.
Is a left side view, and (d) is a side sectional view along line dd in (b).

3A and 3B show the mounted state, where FIG. 3A is a plan view,
(B) is a partially cut front view, (c) is a side cross-sectional view along line cc of (b), and (d) is a side cross-sectional view along line dd of (b).

4A and 4B show an external storage device according to an embodiment of the present invention, in which FIG. 4A is a partially cutaway plan view, and FIG. 4B is a partially cutaway front view.

5A and 5B show the printed wiring board, and FIG. 5A is a plan view in which a left half is partially omitted and a right half is a partially omitted bottom view;
(B) is a partially cut front view.

FIG. 6 is an equivalent circuit diagram thereof.

[Explanation of symbols]

10: memory module (semiconductor module), 11
... chips (semiconductor chips), 11a ... first main surface, 11b
.. 2nd main surface, 12 ... bump, 13 ... holder, 13a ... 1st main surface, 14 ... dent, 15, 16 ... held part, 17 ... adhesive layer, 20 ... socket, 21 ... socket body, 22,
23 ... holding part, 24 ... guide groove, 25 ... holding plate, 26
... contact, 27 ... anisotropic conductive member, 27a ... elastic body, 27b ... pin, 28 ... upper terminal, 29 ... lower terminal,
Reference numeral 30: electric wiring, 40: external storage device, 41: printed wiring board, 42, 43: holding portion, 44: guide groove, 45
... Pressing plate, 46 contact, 47 anisotropic conductive member, 47a elastic body, 47b pin, 48 memory terminal, 49 electrical wiring, 50 communication wiring, 5
1: Terminating resistance element, 52: Memory controller.

Claims (10)

[Claims] 1. A semiconductor device having a plurality of bumps projecting from one main surface thereof is brought into contact with a main surface of a holder formed in a quadrilateral plate shape on a main surface opposite to the bump group. A semiconductor module, wherein a pair of held portions are formed on a pair of opposed sides of the holder, respectively. 2. The semiconductor module according to claim 1, wherein said holder is formed in a rectangular flat plate shape, and said both held portions are respectively formed on both short sides thereof. 3. The semiconductor module according to claim 1, wherein the held portion is formed in a female tapered shape. 4. The semiconductor module according to claim 1, wherein an integrated circuit including a memory element is built in the semiconductor device. 5. A socket to which the semiconductor module according to claim 1 is connected, comprising: a main body formed into a quadrilateral larger than the holder; and a pair of opposing ends of the main body. Is formed with a pair of holding parts respectively holding the held part,
A socket, wherein a plurality of contacts electrically connected to the respective bumps are formed between both holding portions on one main surface of the main body. 6. The socket according to claim 5, wherein said holding portion is formed in a male taper shape. 7. The socket according to claim 5, wherein the contact is formed of an anisotropic conductive member. 8. A hybrid integrated circuit device on which the semiconductor module according to claim 1 is mounted, comprising: a wiring board formed in a quadrilateral having a size in which a plurality of the semiconductor modules are arranged. A plurality of sets of holding portions for holding the held portions are respectively formed on a pair of opposing edges of the wiring board, and a plurality of electric contacts in contact with the bumps are formed on one main surface of the wiring board. A hybrid integrated circuit device, wherein wiring is laid. 9. The hybrid integrated circuit device according to claim 8, wherein said holding portion is formed in a male taper shape. 10. The hybrid integrated circuit device according to claim 8, wherein said electric wiring group is laid in parallel with a direction in which said semiconductor module groups are arranged.