JPH11297760A - Semiconductor chip, its mounting structure and liquid crystal display device - Google Patents

Abstract

(57) [Problem] To provide an IC and an IC that can draw out a wiring pattern to a predetermined position by following a short path, and can further prevent the occurrence of a malfunction due to a displacement of the IC.
And a liquid crystal display device. SOLUTION: Bump electrodes 50 of a driving IC are arranged so as to draw a trapezoid along a chip side. Therefore, on the substrate side, all of the first to fourth wiring patterns 61, 62, 63, 64 can be drawn straight and parallel from the electrode terminal 60 without making a round trip. Further, even if the position of the driving IC is shifted in the drawing direction of the wiring pattern 6, the bump electrode 50 is on the electrode terminal 60.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a semiconductor chip (hereinafter, referred to as an IC), a mounting structure thereof, and a liquid crystal display device using the mounting structure.

[0002]

2. Description of the Related Art As an example of mounting an IC on a substrate by a face-down method, for example, in a liquid crystal display device,
A driving IC (semiconductor chip) is mounted on a transparent substrate constituting a liquid crystal panel by using an anisotropic conductive film (Anisotropic Co.).
C. using Negative Film / ACF)
It is used to implement OG (Chip on glass). The mounting method using the anisotropic conductive film has an advantage that it can cope with a fine pitch and can electrically connect multiple contacts collectively.

FIG. 12 is a perspective view showing the appearance of a liquid crystal panel used in a liquid crystal display device, and FIG. 13 is an exploded perspective view of the liquid crystal panel.

In FIG. 12 and FIG. 13, a liquid crystal panel 10 used in a liquid crystal display device is formed of a first transparent substrate 1 (liquid crystal panel substrate) made of, for example, transparent glass and a transparent glass. The second
Transparent substrate 2 (substrate for liquid crystal panel). A sealant 3 is formed on one of these transparent substrates by printing or the like, and the first transparent substrate 1 and the second transparent substrate 2 are bonded and fixed with the sealant 3 interposed therebetween. Also, the first
In the gap between the transparent substrate 1 and the second transparent substrate 2, the liquid crystal 4
1 is enclosed. A polarizing plate 4a is attached to the outer surface of the first transparent substrate 1 with an adhesive or the like, and a polarizing plate 4b is also attached to the outer surface of the second transparent substrate 2 with an adhesive or the like. Since the second transparent substrate 2 is larger than the first transparent substrate 1, in a state where the first transparent substrate 1 is overlaid on the second transparent substrate 2, a part of the second transparent substrate 2 is the first transparent substrate 2. From the lower edge of the transparent substrate 1.

[0005] An IC mounting area 9 is formed in the overhang portion, and a driving IC 13 is COG-mounted by face-down bonding in this area. In the second transparent substrate 2, an input terminal 12 to which a flexible printed wiring board (not shown) is connected by a method such as heat sealing is formed in a region adjacent to the IC mounting region 9.

On the inner surface of the second transparent substrate 2,
A plurality of stripe-shaped electrodes 6b extending in the vertical direction are formed inside the liquid crystal sealing region 40 defined by the sealant 3. A wiring pattern (not shown) extends from the stripe-shaped electrode 6b toward the IC mounting area 9 as described later.
Electrode terminals for mounting the drive IC 13 by COG in the mounting area 9 are configured (not shown). On the inner surface of the first transparent substrate 1, a plurality of stripe-shaped electrodes 6a extending in the horizontal direction inside the liquid crystal enclosing region 40 defined by the sealant 3 are formed. A wiring pattern (not shown) extending from the stripe-shaped electrode 6a on the first transparent substrate 1 is formed when the first transparent substrate 1 and the second transparent substrate 2 are bonded to each other. Is electrically connected to a wiring pattern (not shown) formed at a predetermined location. This wiring pattern is also formed on the second transparent substrate 2
The wiring pattern extends toward the IC mounting area 9.
13 constitutes a mounting terminal for COG mounting (not shown). Here, in each of the first and second transparent substrates 1 and 2, each wiring pattern is formed integrally with the striped electrodes 6a and 6b.
As with the striped electrodes 6a and 6b, an ITO film (Ind
It is formed of a transparent electrode such as ium tin oxide).

In the liquid crystal panel 10 configured as above, the striped electrodes 6a of the first transparent substrate 1 and the striped electrodes 6b of the second transparent substrate 2 intersect each other,
A pixel is formed at each intersection. Therefore, the driving IC 1
When the drive power and the drive signal are sent to the
3 applies a voltage to the desired stripe-shaped electrodes 6a and 6b based on a drive signal, and controls the liquid crystal 4 in each pixel.
1 is controlled. As a result, a desired image is displayed on the liquid crystal panel 10.

FIG. 14 is a plan view showing a conventional COG mounting IC and its mounting structure. FIG.
FIG. 4 is a bottom view of the conventional COG mounting IC shown in FIG. FIG. 16 is a transparent plan view showing a positional relationship in a state where the mounting surface of the driving IC on which the bump electrodes are formed, and the electrode terminals and the wiring patterns formed on the corresponding substrate side are overlaid.

In the liquid crystal panel 10 thus configured, the driving IC 13 mounted in the IC mounting area 9
Conventionally, as shown in FIG. 14, has a rectangular planar shape, and is electrically connected to a flexible printed wiring board from the IC mounting area 9 toward the edge of the second transparent substrate 2. The input wiring pattern 6 (first wiring pattern 61) is drawn out. Output wiring patterns 6 (second to fourth wiring patterns 62, 63, 64) are drawn out from the IC mounting area 9 toward the stripe-shaped electrodes (see FIG. 13). As a wiring member electrically connected to the input wiring pattern, a rubber connector, a pin connector, or the like may be used in addition to the flexible printed circuit board.

On the other hand, in the driving IC 13, a large number of bump electrodes 50 (bump electrode group) for face-down bonding are formed on a rectangular mounting surface 130, as shown in a bottom view in FIG. Here, the bump electrode group is
A first electrode row 51 arranged along a chip side (long side) facing the edge of the substrate when mounted on the IC mounting area 9 of the second transparent substrate 2; And third arranged from both ends of the chip along the chip side (short side)
, And a fourth electrode row 54 arranged in parallel with the first electrode row 51 along a chip side opposite to the chip side along which the first electrode row 51 runs. I have. The first electrode row 51 is an input terminal for inputting a signal from a flexible printed circuit board or the like, and the second to fourth electrode rows 52, 53,
Is an output terminal for outputting the signal generated in step (1) to the striped electrode via the wiring pattern 6.

On the other hand, in the IC mounting area 9 of the second transparent substrate, as shown in FIGS.
A large number of electrode terminals 60 corresponding to the arrangement of the bump electrodes 50.
Are arranged along the chip side. Here, the wiring pattern 6 (first to fourth wiring patterns 61, 6)
2, 63, 64) are drawn out in a direction perpendicular to the chip side, and are drawn out in parallel with the adjacent wiring pattern 6 at a predetermined interval. That is, the first wiring pattern 61 extends straight from the electrode terminal 60 to which the bump electrode 50 of the first electrode row 51 is conductively connected toward the mounting region of the flexible printed circuit board. Also, the bump electrodes 50 of the fourth electrode row 51
From the electrode terminal 60 to which the fourth wiring pattern 6 is connected.
4 extends straight toward the striped electrode.
However, the bump electrodes 5 of the second and third electrode rows 52 and 53 arranged along the chip side corresponding to the short side of the rectangle
0 from the electrode terminal 60 to which these electrodes are connected.
After the second and third wiring patterns 62 and 63 extend straight in the direction orthogonal to the arrangement direction of 0, that is, laterally, they are bent at right angles in the middle and extend toward the stripe-shaped electrodes. .

[0012]

However, unlike the conventional liquid crystal display device, the bump electrode 5 of the driving IC 13 is not provided.
0 is the first to fourth electrode rows 51, 5 along the chip side.
When arranged in a rectangular shape as 2, 53, 54, the second and third wiring patterns 62, 63 extend straight toward the side and then bend at a right angle in the middle to form a striped shape. Since the second and third wiring patterns 62 and 63 have to be extended toward the electrodes, the second and third wiring patterns 62 and 63 are detoured and connected to the striped electrodes. And the first
Or fourth wiring patterns 61, 62, 63, 64
Since both are ITO films formed simultaneously with the stripe-shaped electrodes, the specific resistance is high. Therefore, since the electrical resistance between the driving IC 13 and the stripe-shaped electrode is large, the quality of the display such as the reduction of the driving operation margin and the display unevenness due to the wiring resistance is reduced. There is a problem.

The bump electrodes 50 of the driving IC 13 are arranged along the chip side along first to fourth electrode rows 51, 52,
When the driving ICs 13 are arranged so as to draw rectangles as 53 and 54, the mounting position of the driving IC 13 is changed from the state shown in FIG. 16 to the drawing direction of the first and fourth wiring patterns 61 and 64 (the direction indicated by the arrow X). 17, the bump electrodes 50 of the first and fourth electrode rows 51 and 54 are located above the electrode terminals 60 (wiring pattern 6), as shown in FIG. A third electrode row 52,
The 53 bump electrode 50 is shifted from above the electrode terminal 60 (wiring pattern 6), causing an open or a short circuit. Although not shown, the driving IC 1
When the mounting position of No. 3 is displaced from the state shown in FIG. 16 in the direction in which the second and third wiring patterns 62 and 63 are drawn (the direction indicated by arrow Y), the second and third electrode rows 52 and 53 are provided. Of the bump electrodes 50 are located on the electrode terminals 60 (on the wiring pattern 6).
Of the electrode rows 51, 54 are connected to the electrode terminals 60.
(On the wiring pattern 6), causing an open or a short circuit. Therefore, when mounting the driving IC 13, it is necessary to perform positioning with high accuracy in both the X direction and the Y direction.

However, in the automatic crimping device for ICs, it is not necessary to position the driving IC 13 in one of the X direction and the Y direction with high accuracy, but the driving IC 13 is high in both the X direction and the Y direction. Accurate alignment is difficult in practice. Therefore,
In a conventional mounting structure using the driving IC 13, the width and the interval of the electrode terminal 60 (the width and the interval of the wiring pattern 6) are set to be wide in order to avoid a problem due to a displacement of the driving IC 13 during mounting. I have to do it. As a result, in the conventional liquid crystal panel, there is also a problem that a peripheral region that does not directly contribute to display is large in proportion to the area of the display region.

As shown in FIG. 18, even when two driving ICs 13 are arranged side by side, the bump electrodes 5
0 is the first to fourth electrode rows 51, 5 along the chip side.
As long as they are arranged to draw a rectangle as 2, 53 and 54, the wiring patterns 6 drawn from the electrode terminals 60
Among them, the second and third wiring patterns 62 and 63 drawn from the short side must extend straight to the side, then bend at a right angle and extend toward the stripe-shaped electrode. Therefore, also in this case, the second and third wiring patterns 62 and 63 are detoured and connected to the striped electrodes, and the same problem as described with reference to FIGS. There is.

The driving IC 13 may be mounted on the IC mounting area 9 of the TAB mounting flexible substrate 3 as shown in FIG.
The mounting terminal 610 formed at the end of the first wiring pattern 61 protruding from the substrate to the outside is electrically connected to the connection substrate by a method such as heat sealing or the like, or via a connector or the like. Alternatively, it is connected to an external device by, for example, directly soldering. In this case, the second to fourth wiring patterns 62 and 6 extending on the flexible substrate 3 toward the side opposite to the first wiring pattern 61
Mounting terminals 620, 6 formed at the ends of 3, 64
30 and 640 are conductively connected to terminals arranged and formed on the substrate surface of the liquid crystal panel holding the liquid crystal by heat sealing or the like, and are mounted. Also in this case, the driving I
In C13, if the bump electrodes 50 are arranged along the chip side so as to draw a rectangle as the first to fourth electrode rows, the second and third wiring patterns 62 and 63 drawn from the short side will , After extending straight to the side,
It must be bent at a right angle and extended toward the mounting terminals 620 and 630. Therefore, also in this case, the second and third wiring patterns 62 and 63 are detoured and
0 and 630, which causes a problem that a useless space is generated. In addition, there is a similar problem when mounted on a PCB board or an FPC board.

In view of the above problems, the object of the present invention is to
By improving the arrangement of the bump electrodes, the wiring pattern connected to the electrode terminals on the substrate side can be eliminated, and the wiring pattern can be pulled out to a predetermined position by following a short path and pulling out the wiring pattern to a predetermined position. , And a liquid crystal display device using the mounting structure.

Another object of the present invention is to improve the arrangement of bump electrodes so as to prevent the occurrence of problems caused by the displacement of the IC during mounting.
And a liquid crystal display device using the mounting structure.

[0019]

According to the present invention, there is provided an IC including a bump electrode group for face-down bonding on a mounting surface with a substrate, wherein the bump electrode group includes at least a chip. A first electrode row is arranged along one of the sides, and second and third electrode rows are arranged obliquely inward from both ends of the first electrode row. It is characterized by being.

In the present invention, the bump electrode group of the driving IC has a first electrode array arranged along the chip side, and diagonally arranged inward from both ends of the first electrode array. Since the second and third electrode rows are configured, the electrode terminals on the substrate side on which the bump electrodes of the second and third electrode rows are mounted are also obliquely arranged. Therefore, since these electrode terminals are displaced from each other, when the wiring pattern drawn from the electrode terminals is drawn to the side opposite to the first electrode row, the wiring pattern is drawn straight toward the side and then at a right angle. The first electrode row can be directly pulled out without being bent. That is, since it is not necessary to detour the wiring pattern, useless space can be reduced. Further, since the wiring pattern can be drawn so as to follow the shortest path, the electrical resistance of the wiring pattern can be reduced. Furthermore, the first, second, and third wiring patterns can all be pulled out substantially in parallel. With this arrangement, even if the mounting position of the driving IC is shifted in the drawing direction of the wiring pattern, the first wiring pattern can be drawn out. In addition, all the bump electrodes constituting the third electrode row are located on the electrode terminals (wiring patterns). Therefore, the driving I
The mounting position of C may be adjusted with high accuracy in a direction substantially orthogonal to the direction in which the wiring pattern is drawn, and high alignment accuracy is not required in the direction in which the wiring pattern is drawn. With such one-way alignment, even with the existing automatic crimping apparatus (mounting machine), high quality connection reliability can be ensured and alignment can be performed. Therefore, the mounting structure using the driving IC according to the present invention. Thus, it is possible to prevent the occurrence of a problem due to the displacement of the driving IC. Further, if high accuracy is ensured in a direction perpendicular to the direction in which the wiring patterns are drawn, the width and the interval between the electrode terminals and the wiring patterns can be reduced. In addition, since the wiring pattern on the substrate is simple and does not require complicated refraction in manufacturing, the wiring pattern can be easily formed, and the substrate on which the wiring pattern is formed and the driving IC can be downsized.

In this case, the mounting surface may have a substantially triangular planar shape, for example.
In this case, the first electrode row is arranged along a chip side corresponding to the base of the triangle, and both the second and third electrode rows are arranged along a chip side corresponding to the oblique side of the triangle. Will be done.

In the present invention, the bump electrode group includes:
Further, a fourth electrode row may be included that is arranged substantially in parallel with the first electrode row along a chip side opposite to the chip side along which the first electrode row extends. Since such a fourth electrode row is substantially parallel to the first electrode row, it is also possible to draw out all of the first, second, third and fourth wiring patterns substantially in parallel. Therefore, even if the mounting position of the driving IC is shifted in the drawing direction of the wiring pattern, all the bump electrodes forming the first to fourth electrode rows are located on the electrode terminals (wiring pattern). Therefore, the driving I
The mounting position of C may be adjusted with high accuracy in a direction substantially orthogonal to the direction in which the wiring pattern is drawn, and high alignment accuracy is not required in the direction in which the wiring pattern is drawn. With such one-way alignment, even with the existing automatic crimping apparatus (mounting machine), high quality connection reliability can be ensured and alignment can be performed. Therefore, the mounting structure using the driving IC according to the present invention. Thus, even if four electrode rows are formed, it is possible to prevent the occurrence of a problem due to the displacement of the driving IC. Also,
If high alignment accuracy is ensured in a direction substantially perpendicular to the drawing direction of the wiring pattern, the width and interval of the electrode terminals and the wiring pattern can be reduced.

In this case, the mounting surface may have a substantially trapezoidal planar shape, for example.
In this case, the first electrode row is arranged along the chip side corresponding to the base of the trapezoid, and both the second and third electrode rows are arranged along the chip side corresponding to the oblique side of the trapezoid. The fourth electrode row is arranged along the chip side corresponding to the upper side of the trapezoid.

In the present invention, the mounting surface may have a substantially rectangular plane shape. In this case,
Irrespective of the shape of the mounting surface, the first electrode row is arranged along the long side of the chip, and the second and third electrode rows are arranged obliquely inward from near the corner of the chip. Good.

In the present invention, among the bump electrodes of the second and third electrode rows, at least bump electrodes formed near both ends of the first electrode row are connected to the bump electrodes of the first electrode row. On the other hand, it is preferable that the first electrode row is shifted in the arrangement direction. With this configuration, even if the mounting position of the driving IC is shifted in the drawing direction of the wiring pattern, the bump electrodes of the second and third electrode rows are connected to the electrode terminals to which the bump electrodes of the first electrode row are to be connected. (Wiring pattern). Even if it is shifted in the opposite direction, the bump electrodes of the first electrode row
No bump electrode of the electrode row is positioned on the electrode terminal (wiring pattern) to be connected. Therefore, there is an advantage that a positional deviation margin in the direction in which the wiring is drawn can be increased, and a greater connection reliability can be ensured.

In the mounting structure using the IC having such a configuration, according to the present invention, the substrate on which the IC is mounted is connected to the electrode terminal on which the bump electrode of the first electrode row is mounted on the first electrode. A first wiring pattern drawn out in a direction substantially perpendicular to the arrangement direction of the rows, and an arrangement direction of the first electrode rows from the electrode terminals on which the bump electrodes of the second and third electrode rows are mounted. The second and third wiring patterns may be provided in a direction substantially perpendicular to the first wiring pattern and in a direction opposite to the first wiring pattern.

In the present invention, when the bump electrode group includes a fourth electrode array arranged substantially in parallel with the first electrode array, the substrate on which the IC is mounted is A first wiring pattern extending from the electrode terminal on which the bump electrode of the first electrode row is mounted in a direction substantially orthogonal to the arrangement direction of the first electrode row;
In a direction substantially orthogonal to the arrangement direction of the first electrode rows and in a direction opposite to the first wiring pattern, from the electrode terminals on which the bump electrodes of the third and fourth electrode rows are mounted. In some cases, the second, third, and fourth wiring patterns are provided.

Further, in the mounting structure using the IC according to the present invention, the direction in which the bump electrodes of the first electrode row are mounted is substantially perpendicular to the arrangement direction of the first electrode row. The drawn first wiring pattern and the second wiring pattern;
Of the second electrode row in a direction substantially perpendicular to the arrangement direction of the second electrode row and opposite to the first wiring pattern. And a direction substantially perpendicular to the arrangement direction of the third electrode row from the electrode terminal on which the bump electrode of the third electrode row is mounted, and opposite to the first wiring pattern. And a third wiring pattern drawn in the direction of the arrow. In other words, the second and third wiring patterns are drawn obliquely when viewed from the first wiring pattern. However, even in such a configuration, the second and third wiring patterns are replaced with the first wiring pattern. When the wiring pattern is pulled out in the opposite direction, the wiring pattern is not detoured as far away as compared with a configuration in which the second and third wiring patterns are drawn out straight toward the side and then bent at a right angle. Space can be reduced. Further, since the second and third wiring patterns can be drawn out so as to follow a short path, useless space can be reduced, and the electrical resistance of the second and third wiring patterns can be reduced. it can.

In the present invention, the substrate on which the IC is mounted is, for example, a glass substrate, a quartz substrate, or a plastic substrate in addition to a PCB substrate made of glass epoxy or the like which is generally used in a wide field. In this case, the substrate is a substrate for a liquid crystal panel that sandwiches liquid crystal between the substrate and a pair of substrates, and is mounted on the IC on the substrate for the liquid crystal panel, so that the substrate for the liquid crystal panel is formed. The IC for the transparent electrode formed on the substrate
A liquid crystal display device to which a predetermined signal is applied via the wiring pattern can be configured.

In the present invention, the substrate on which the IC is mounted may be, for example, TAB (Tape Automa).
TCP (Tape Carrier Package) formed by ted Bonding mounting technology
e), COF implementation (Chip On Flexibli)
printed circuit), COB implementation (C
hip On Board), COP implementation (Chip
(On Panel). In this case, the substrate has a mounting terminal formed at an end of the wiring pattern on the substrate, and the mounting terminal is mounted on at least one of the pair of liquid crystal panel substrates sandwiching the liquid crystal. Accordingly, a liquid crystal display device in which a predetermined signal is applied from the IC to the transparent electrode formed on the liquid crystal panel substrate via the wiring pattern and the mounting terminal can be configured.

[0031]

Embodiments of the present invention will be described with reference to the accompanying drawings. In each of the embodiments described below, the IC described in the prior art, the IC mounting structure,
The same reference numerals are given to portions having a common use with a liquid crystal display device using the same.

[First Embodiment] FIG. 1 is a plan view schematically showing a liquid crystal panel of a liquid crystal display device using a liquid crystal driving IC of the present embodiment and a mounting structure thereof. FIG. 2 is a bottom view of the liquid crystal driving IC of the present embodiment. FIG. 3 is a transparent plan view showing a positional relationship in a state where the mounting surface of the driving IC of the present embodiment on which the bump electrodes are formed, and the electrode terminals and the wiring patterns formed on the corresponding substrate side are overlaid. .

As described with reference to FIGS. 12 and 13, the liquid crystal panel 10 used in the liquid crystal display device includes a first transparent substrate 1 (liquid crystal panel substrate) made of, for example, transparent glass. A second transparent substrate 2 (liquid crystal panel substrate) also formed of transparent glass. An IC mounting area 9 is formed on the second transparent substrate 2, and also in this embodiment, as shown in FIG.
The driving IC 13 is subjected to face-down bonding by COG (ChipOn Glas
s) Implemented. On the second transparent substrate 2, from the IC mounting area 9 toward the edge of the substrate, a flexible printed (or heat seal connector) wiring substrate, a rubber connector, a pin connector and the like for input are electrically connected. The wiring pattern 6 (first wiring pattern 61) is drawn out. Output wiring patterns 6 (second to fourth wiring patterns 62, 63, 64) from the IC mounting area 9 to the stripe-shaped electrodes (see FIG. 13).
Has been pulled out. Also in this embodiment, the wiring pattern 6
Like the stripe-shaped electrode, it is formed of a transparent electrode such as an ITO film. Here, the sealant and the striped electrodes (6a, 6b) formed on the inner surface where the first transparent substrate 1 and the second transparent substrate 2 overlap are omitted.

In this embodiment, the driving IC 13 has its upper side directed to the side on which the striped electrodes are formed, and its bottom side directed to the side on which the input terminals 12 for the above-described flexible printed circuit board and connector are formed. It has a substantially trapezoidal planar shape. Therefore, the driving IC 1
As shown in FIG. 2, the mounting surface 130 of the third substrate also has a trapezoidal planar shape and an arrangement of the bump electrodes 50 along each side thereof.

On the mounting surface 130, a large number of bump electrodes 50 (bump electrode group) for face-down bonding are provided.
This bump electrode group includes a first electrode row 51 arranged along a chip side corresponding to a side corresponding to a base of a trapezoid among the sides of the chip, and a first electrode Second and third electrode rows 52 and 53 are arranged obliquely inward along chip sides corresponding to the oblique sides of the mounting surface 130 from both ends of the row 51. In addition, the bump electrode group has a first side along a chip side (a chip side corresponding to an upper side of a trapezoid) facing a chip side along which the first electrode row 51 extends.
A fourth electrode row 54 arranged in parallel with the electrode row 51 of FIG. Of these electrode rows, the first electrode row 51
The bump electrodes 50 are connected to the above-described flexible printed circuit board, connectors, and the like, and are input terminals for inputting signals. The second to fourth electrode rows 52, 53,
The bump electrode 50 is an output terminal that outputs a signal generated by the driving IC 13 to the striped electrode via the wiring pattern 6.

In the IC mounting area 9 of the second transparent substrate on which the driving IC 13 configured as described above is mounted, as shown in FIGS. 1 and 3, it corresponds to the arrangement of the bump electrode group of the driving IC 13. A large number of electrode terminals 60 are arranged along the chip side. Further, all the wiring patterns 6 are drawn out in parallel from the electrode terminals 60. That is, from the electrode terminal 60 to which the bump electrode 50 of the first electrode row 51 is connected, the first wiring pattern 61 is formed in a direction orthogonal to the arrangement direction of the first electrode row 51 by the above-described flexible printed wiring board or the like. It extends straight toward the mounting area with the connector and the like. Also, from the electrode terminal 60 to which the bump electrode 50 of the fourth electrode row 54 is connected, a direction perpendicular to the fourth electrode row 54 and the first electrode row 51 and the first wiring pattern 61 The direction opposite to the drawing direction (the direction in which the striped electrodes are formed)
The fourth wiring pattern 64 is drawn straight out.

Further, the second and third electrode rows 52, 5
Although the wiring pattern 6 is also drawn out from the electrode terminal 60 to which the third bump electrode 50 is connected, in the present embodiment, the second and third electrode rows 52 and 53 are arranged diagonally, so that , The bump electrodes 50 are slightly shifted laterally. Therefore, the second and third wiring patterns 63 are not detoured to the side and are kept in the direction orthogonal to the arrangement direction of the first and fourth electrode rows 51 and 54, and
The first wiring pattern 61 is drawn straight out in a direction opposite to the drawing direction. Therefore, in the present embodiment, the first to fourth wiring patterns 61, 62, 6
3, 64 are all drawn out in parallel.

As described above, in the IC 13 according to the present embodiment, the bump electrode group of the driving IC 13 is arranged along the chip side as the first to fourth electrode rows 51, 52, 53, 54 so as to draw a trapezoid. And the second and third electrode rows 52, 5 arranged so as to draw a trapezoidal hypotenuse.
The electrode terminals 60 to which the three bump electrodes 50 are connected are also arranged so as to draw trapezoidal oblique sides. Therefore, the second and third wiring patterns 62, 6 are connected to the electrode terminals 60 to which the bump electrodes 50 of the second and third electrode rows 52, 53 are connected.
When pulling out the third wiring pattern 61 in the direction opposite to the first wiring pattern 61, the second and third wiring patterns 61 are directed to the striped electrodes so as to follow the shortest path straight without changing to the side. Can be extended. Therefore,
Since it is not necessary to make the second and third wiring patterns 62 and 63 detour and connect to the striped electrodes, even if the wiring pattern 6 is made of a material having a high specific resistance, such as an ITO film, the driving pattern The electric resistance between the IC 13 and the stripe-shaped electrode is small. Therefore, the display quality can be improved. Further, the electrode terminals corresponding to the conductive connection with the bump electrodes and the stripe electrodes can be linearly connected at the same pitch as they are.

Also, the bump electrodes 50 of the driving IC 13 are arranged along the chip side along the first to fourth electrode rows 61, 62,
First to fourth wiring patterns 61, 62, 63
63 and 64 are all drawn out in parallel. Therefore,
When the mounting position of the driving IC 13 is shifted from the state shown in FIG. 3 in a direction (direction indicated by an arrow Y) orthogonal to the drawing direction of the first to fourth wiring patterns 61, 62, 63, 64, First to fourth electrode rows 51, 52, 5
All the bump electrodes 50 of 3 and 54 are shifted from above the electrode terminal 60 (wiring pattern 6).
Even if the mounting position of C13 is shifted from the state shown in FIG. 3 in the direction in which the first to fourth wiring patterns 61, 62, 63, and 64 are pulled out (the direction indicated by arrow X), as shown in FIG. , The first to fourth electrode rows 51, 52, 53,
All the 54 bump electrodes 50 are located on the electrode terminals 60 (wiring pattern 6). Therefore, the mounting position of the driving IC 13 is determined by the first to fourth wiring patterns 6.
High accuracy may be ensured in a direction (direction indicated by arrow Y) orthogonal to the pull-out direction of 1, 62, 63, 64, and the first to fourth wiring patterns 61, 62, 6 may be provided.
High alignment accuracy is not required in the pull-out direction of 3, 64 (direction indicated by arrow X). With such high-precision alignment in one direction, high connection reliability in quality can be obtained even with existing crimping machines (automatic mounting machines). Therefore, in the mounting structure using the driving IC 13 according to the present embodiment, it is possible to prevent the occurrence of a problem due to the displacement of the driving IC 13. In addition, if high accuracy is ensured in a direction perpendicular to the drawing direction of the wiring pattern, the width and the interval between the electrode terminal 60 and the first to fourth wiring patterns 51, 52, 53, 54 are reduced. Can also reduce wasteful space.

In the driving IC 13, among the bump electrodes 50 of the second and third electrode rows 52 and 53, the bump electrode 50 adjacent to the first electrode row 51 is the first one as shown in FIG. If the bump electrode 50 of the electrode row 51 is displaced from the bump electrode 50 in the direction indicated by the arrow Y, the driving IC in the lead-out direction of the wiring pattern 6 (the direction indicated by the arrow X)
13 can expand the allowable error range of the mounting position.
That is, in the proximity part, the bump electrodes of the respective electrode rows are extended in the extending direction of the corresponding wiring patterns of the first electrode row 51 and the second electrode row 52 and the first electrode row 51 and the third electrode row 53. Since the positions of 50 do not overlap, it is not necessary to perform high-precision alignment in the direction in which the wiring pattern 6 is drawn out (the direction indicated by the arrow X), and it is possible to prevent short-circuiting due to misalignment in an adjacent portion in that direction, and to further improve quality Thus, high reliability in connection can be ensured.

The configuration of the present embodiment can be applied not only to the case where the driving IC 13 is mounted on a flexible film substrate such as a quartz substrate or a plastic substrate but also on a glass substrate. Further, the present invention can be applied not only to the field of liquid crystal display devices but also to various devices, for example, when an IC is mounted on a glass epoxy substrate.

[Second Embodiment] FIG. 5 is a bottom view of an IC according to this embodiment.

In the first embodiment, the driving IC 13 has a trapezoidal planar shape. However, in the present embodiment, as shown in FIG. 5, the driving IC 13 has a triangular planar shape. I have. In the driving IC 13, a large number of face-down bonding bump electrodes 50 (bump electrode group) formed on the triangular mounting surface 130 include:
Among the sides of the chip, a first electrode row 51 arranged along the chip side corresponding to the bottom side of the triangle, and a chip side corresponding to the hypotenuse of the triangle from both ends of the first electrode row 51. Second and third electrode rows 5 arranged diagonally inside
2, 53 are included. The first electrode row 51 includes a flexible printed (heat seal connector) wiring board,
Or an input terminal for inputting a signal from a rubber connector, a pin connector, or the like;
Output terminals 2 and 53 output signals generated by the driving IC 13. The other configuration is the same as that of the first embodiment, and the driving IC 13 is COG mounted by face-down bonding by thermocompression bonding using ACF or the like.

In the driving IC 13 thus configured,
Similar to the embodiment described with reference to FIGS. 1 and 3, the electrode terminal 60 to which the bump electrode 50 of the first electrode row 51 connects is connected in a direction orthogonal to the arrangement direction of the first electrode row 51. One wiring pattern 61 extends straight toward a mounting area for the above-described flexible printed wiring board, connector, and the like. Also, the second and third electrode rows 52,
From the electrode terminals 60 to which the bump electrodes 50 belonging to 53 are connected, the second and third wiring patterns 62 and 63
In the direction orthogonal to the arrangement direction of the electrode rows 51 and
The wiring pattern 61 is drawn straight out in the direction opposite to the drawing direction.

As described above, in the IC 13 according to the present embodiment,
When the bump electrode group of the driving IC 13 is
Since the third and third electrode rows 51, 52 and 53 are arranged in a triangular shape, the electrode terminals 60 to which the bump electrodes 50 of the second and third electrode rows 52 and 53 are connected are shown in FIGS. As in the embodiment described with reference to FIG.
The second and third wiring patterns 62 and 63 can be drawn straight toward the stripe-shaped electrode so as to follow the shortest path. Therefore, since it is not necessary to make the second and third wiring patterns 62 and 63 detour and connect to the striped electrodes, even if the wiring pattern 6 is made of a material having a high specific resistance such as an ITO film, the driving IC1
The electrical resistance between the electrode 3 and the stripe electrode is small. Therefore, the display quality can be improved. Further, since the bump electrodes 50 of the driving IC 13 are arranged along the chip side as the first to third electrode rows 51, 52, 53 so as to draw a triangle, a description will be given with reference to FIGS. As in the embodiment described above, the first to third wiring patterns 61, 62, 63 can all be drawn out in parallel. Therefore, as described with reference to FIGS. 3 and 4, even if the mounting position of the driving IC 13 is shifted in the drawing direction of the wiring pattern 6, the first to third electrode rows 51,
All of the bump electrodes 50 of 52 and 53 are electrode terminals 60.
(Wiring pattern 6). Therefore, the driving I
With respect to the mounting position of C13, the same effect as that of the first embodiment can be obtained, for example, it is only necessary to perform positioning with high accuracy only in the direction perpendicular to the drawing direction of the wiring pattern 6.

[Modifications of Embodiments 1 and 2]
The arrangement of the bump electrodes 50 of the driving IC 13 is characteristic to the last, and is not affected by the outer shape of the driving IC 13.

That is, as shown in FIG. 6A, the planar shape of the driving IC 13 may be rectangular or may not be along each side of the external shape of the driving IC 13. If they are arranged in a trapezoidal shape,
An effect similar to that of the first embodiment is obtained. FIG. 6 (B)
As shown in the figure, the planar shape of the driving IC 13 may be rectangular or may not be along each side of the outer shape of the driving IC 13, and the bump electrodes 50 are arranged so as to draw a triangular shape. For example, the same effect as in the second embodiment can be obtained.

[Embodiment 3] FIG. 7 is a plan view showing an arrangement of a driving IC according to the present embodiment and wiring patterns drawn out from electrode terminals to which bump electrodes are connected.

In the first and second embodiments and the modifications thereof,
Although one drive IC 13 has been described, as shown in FIG. 7, two drive ICs 13 are arranged side by side and AC
Similar effects can be obtained even when the driving IC 13 is COG-mounted by face-down bonding by thermocompression bonding using F or the like. That is, even when the two driving ICs 13 described in the first embodiment are arranged side by side, the face-down bonding bump electrode group formed on the trapezoidal mounting surface 130 in each driving IC 13 Among the sides of the chip, a first electrode row 51 arranged along the chip side corresponding to the base of the trapezoid, and chip sides corresponding to the oblique sides of the mounting surface 130 from both ends of the first electrode row 51, respectively. And the fourth electrode row 54 formed along the chip side corresponding to the upper side of the trapezoid. To fourth electrode rows 51, 52, 53,
From the electrode terminal 60 to which the 54 bump electrodes 50 are connected,
All the wiring patterns 6 can be drawn out in parallel.
Therefore, the second to fourth wiring patterns 62, 63, 64 can be drawn straight from any of the driving ICs 13 toward the stripe-shaped electrodes so as to follow the shortest path. In addition, the first to fourth wiring patterns 61,
62, 63 and 64 can all be pulled out in parallel. Therefore, even when a plurality of driving ICs 13 are arranged side by side, the same effect as in the first embodiment can be obtained.

[Embodiment 4] FIG. 8 is a plan view showing an arrangement of a driving IC according to the present embodiment and wiring patterns drawn out from electrode terminals to which bump electrodes are connected.

In any of the above embodiments, the bump electrodes 5 of the first to fourth electrode rows 51, 52, 53, 54
Although the configuration has been described in which the wiring patterns 6 can be all pulled out in parallel from the electrode terminals 60 to which 0 is connected, the second and third wiring patterns 62 and 6 are configured as in the present embodiment.
As for 3, there may be a part that is drawn obliquely.

That is, in the present embodiment, the configuration of the driving IC 13 is the same as that described with reference to FIG. 2, and is different from the bump IC group for face-down bonding formed on the trapezoidal mounting surface 130. Represents a first electrode row 51 arranged along the chip side corresponding to the bottom side of the trapezoid among the sides of the chip, and corresponds to the oblique sides of the mounting surface 130 from both ends of the first electrode row 51, respectively. The second and third electrode rows 53 that extend along the chip side and are arranged obliquely facing inward and the first electrode row 51 are formed along the chip side facing the chip side along the third electrode row 51. One electrode row 51 and a fourth electrode row 54 are configured in parallel. Therefore, the first and fourth wiring patterns 61 and 64 can be pulled out in parallel from the electrode terminals 60 to which the bump electrodes 50 of the first and fourth electrode rows 51 and 54 are connected.

In this embodiment, the second and third electrode rows 5
Second and third wiring patterns 62 and 63 drawn out from the electrode terminals 60 to which the bump electrodes 50 are connected.
In a direction perpendicular to the arrangement direction of the second and third electrode rows 52 and 53 (the first and fourth wiring patterns 61 and 64).
(Obliquely viewed from the viewpoint), it is bent at an obtuse angle and extends directly toward the striped electrode. The other configuration is the same as that of the first embodiment, and the driving IC 13 is COG-mounted by face-down bonding by thermocompression bonding using ACF or the like.

As described above, in the present embodiment, unlike the wiring pattern 6 described in the related art, after the second and third wiring patterns 62 and 63 are pulled out obliquely, they are bent at an obtuse angle to a predetermined angle. Pull out in the direction. Therefore, the second
Further, it is not necessary to perform a circuitous drawing, such as straightening the third wiring patterns 62 and 63 toward the side and then bending them at right angles. Therefore, even if the wiring pattern 6 is made of a material having a high specific resistance, such as an ITO film, the electrical resistance between the driving IC 13 and the stripe-shaped electrode is small, so that the display quality is improved. Can be.

[Fifth Embodiment] FIG. 9 is a plan view showing the arrangement of a driving IC according to the present embodiment and wiring patterns drawn out from electrode terminals to which bump electrodes are connected.

In this embodiment, the driving IC 1 shown in FIG.
The configuration of No. 3 is the same as that described with reference to FIG. 2. The bump electrode group for face-down bonding formed on the trapezoidal mounting surface 130 has a trapezoidal shape of each side of the chip. A first electrode row 51 arranged along a chip side corresponding to a bottom side, and a first electrode row 51 extending from both ends of the first electrode row 51 along a chip side corresponding to a trapezoidal oblique side and obliquely arranged inside. A second electrode row 53 and a fourth electrode row 54 formed along a chip side opposite to the chip side along which the first electrode row 51 extends and parallel to the first electrode row 51;
Are configured. The driving IC 13 is also face-down bonded by thermocompression bonding using an ACF.

In the present embodiment, the driving IC 13 is
Mounted on the IC mounting area 9 of the flexible board 3 for mounting B,
A mounting terminal 610 formed at an end of the first wiring pattern 61 extending from the IC mounting area 9 to the outside of the substrate is connected to an external device. Note that the tip of the first wiring pattern 61 is supported and reinforced by the plastic film 30. On the other hand, the mounting terminals 620 formed at the ends of the second to fourth wiring patterns 62, 63, 64 extending on the flexible substrate 3 toward the side opposite to the first wiring pattern 61. , 630, and 640 are mounted on one or both of a pair of liquid crystal panel substrates that sandwich liquid crystal.

Also in this case, the electrode terminals 60 correspond to the arrangement of the bump electrodes 50 of the driving IC 13 on the flexible substrate 3 as in the first embodiment described with reference to FIG. It is arranged to draw a trapezoid. Therefore, all of the first to fourth wiring patterns 61, 62, 63, and 64 drawn from the electrode terminals 60 can be drawn in parallel. Further, it is not necessary to route the second and third wiring patterns 62 and 63 on the flexible substrate 3 in a far-off direction. Therefore, useless space can be reduced from the flexible substrate 7. Further, since the first to fourth wiring patterns 61, 62, 63, and 64 can all be pulled out in parallel on the flexible substrate 7, the first embodiment will be described with reference to FIGS. As described above, even if the mounting position of the driving IC 13 is slightly shifted in the drawing direction of the wiring pattern 6, the bump electrodes 50 of the first to fourth electrode rows 51, 52, 53, and 54 all have the electrode terminals 60 (wiring). It will be located on the pattern 6). Therefore, the driving IC 1
The mounting position 3 may be positioned with high accuracy in a direction orthogonal to the direction in which the wiring pattern 6 is pulled out. Since a defect due to a shift in the mounting position of the IC 13 can be prevented and high reliability in quality can be realized, the same effect as in the first embodiment can be obtained.

The structure according to the fifth embodiment is based on the TAB
Not only for (TCP) mounting, but for COF mounting, COB mounting,
It is also applicable to COP mounting.

[Other Embodiments] In the third, fourth, and fifth embodiments, the driving IC shown in FIG.
It is sufficient that the bump electrodes are arranged as shown in (B), and the bump electrodes need not be formed along the chip side.

Further, even if the bump electrode group is arranged so as to draw a triangular or trapezoidal shape,
As shown in FIG. 10, the second and third electrode rows 52, 5
Of the three bump electrodes 50, at least the first electrode row 5
Preferably, the bump electrodes 50 formed near both ends of the first electrode row 51 are shifted from the bump electrodes 50 of the first electrode row 51 in the arrangement direction of the first electrode row 51 (Y direction). With this configuration, even if the mounting position of the driving IC 13 is slightly shifted in the wiring pattern drawing direction (X direction),
The bump electrodes of the second and third electrode rows 52 and 53 are not located above the electrode terminals (wiring patterns 61) to which the bump electrodes 50 of the first electrode row 51 are to be connected. Even if the bump electrodes 50 are shifted in the opposite direction, the bump electrodes 50 of the first electrode row 51 are connected to the electrode terminals (wiring patterns 62, 6) to which the bump electrodes 50 of the second and third electrode rows 52, 53 are to be connected.
3) It is not located above. Therefore, there is an advantage that a positional deviation margin in the wiring drawing direction can be increased.

Further, in each electrode row, the bump electrodes 50 may be linearly arranged, or may be arranged in a staggered pattern as shown in FIG.

[0063]

As described above, according to the present invention, the bump electrode group of the driving IC includes the first electrode row arranged along the chip side, and the first electrode row from both ends of the first electrode row. Since the second and third electrode rows are arranged obliquely inward, the electrode terminals on the substrate side on which the bump electrodes of the second and third electrode rows are mounted are also obliquely arranged. ing. Therefore, when the wiring pattern drawn from these electrode terminals is drawn to the side opposite to the first electrode row,
It is not necessary to bend at a right angle after being drawn straight out to the side, and to extend to the side opposite to the first electrode row. That is, since it is not necessary to detour the wiring pattern far away, useless space can be reduced. Also, since it is possible to draw the wiring pattern so as to follow the shortest path,
The electrical resistance of the wiring pattern can be reduced.
Furthermore, it is also possible to draw out the first, second, and third wiring patterns all in parallel. With this arrangement, when the driving IC is mounted on the board, the mounting position is set in the drawing direction of the wiring pattern. , All the bump electrodes constituting the first to third electrode rows are located on the electrode terminals (wiring patterns). Therefore, the mounting position of the driving IC may be adjusted with high accuracy in the direction orthogonal to the direction in which the wiring pattern is drawn, and high positioning accuracy is not required in the direction in which the wiring pattern is drawn. With such one-way alignment, even with the existing automatic crimping apparatus, it is possible to prevent a problem caused by a shift in the mounting position of the driving IC, and to realize high reliability in quality. Further, if high accuracy is ensured in a direction perpendicular to the direction in which the wiring patterns are drawn, the width and the interval between the electrode terminals and the wiring patterns can be reduced.

[Brief description of the drawings]

FIG. 1 is an I for mounting COG according to a first embodiment of the present invention.
FIG. 4C is a plan view showing C and its mounting structure.

FIG. 2 is a bottom view of the COG mounting IC shown in FIG. 2;

FIG. 3 shows a driving I in the COG mounting structure shown in FIG.
FIG. 7 is a transparent plan view showing a positional relationship in a state where a mounting surface on which a bump electrode of C is formed, and an electrode terminal and a wiring pattern formed on a corresponding substrate side are overlaid.

FIG. 4 is a plan view showing a state where the mounting position of the IC is shifted from the state shown in FIG. 3;

FIG. 5 is a diagram illustrating a COG mounting I according to a second embodiment of the present invention;
It is a bottom view of C.

FIGS. 6A and 6B are a bottom view of a COG mounting IC according to a modification of the first embodiment of the present invention, and a COG mounting according to a modification of the second embodiment of the present invention, respectively. FIG.

FIG. 7 shows an I for mounting COG according to Embodiment 3 of the present invention.
FIG. 4C is a plan view showing C and its mounting structure.

FIG. 8 shows an I for COG mounting according to the fourth embodiment of the present invention.
FIG. 4C is a plan view showing C and its mounting structure.

FIG. 9 is a plan view showing a TAB mounting structure according to a fifth embodiment of the present invention.

FIG. 10 is a plan view showing an arrangement of bump electrodes according to another embodiment of the present invention.

FIG. 11 is a plan view showing an arrangement of bump electrodes according to still another embodiment of the present invention.

FIG. 12 is a perspective view illustrating an appearance of a liquid crystal display device.

13 is an exploded perspective view of the liquid crystal display device shown in FIG.

FIG. 14 is a plan view showing a conventional COG mounting IC and its mounting structure.

FIG. 15 is a bottom view of the conventional COG mounting IC shown in FIG.

FIG. 16 shows a driving IC in a conventional COG mounting structure.
FIG. 6 is a transparent plan view showing a positional relationship in a state where the mounting surface on which the bump electrode is formed and the electrode terminal and the wiring pattern formed on the corresponding substrate side are overlaid.

FIG. 17 is a plan view showing a state where the mounting position of the IC is shifted from the state shown in FIG. 16;

FIG. 18 is a plan view showing a mounting structure when two conventional ICs for COG mounting are arranged side by side.

FIG. 19 is a plan view showing a conventional TAB mounting structure.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 1st transparent substrate 2 2nd transparent substrate 3 Sealing agent 6a, 6b Stripe electrode 9 IC mounting area 10 Liquid crystal panel 13 Driving IC 30 Plastic film 50 Bump electrode 51 First electrode row 52 Second electrode row 53 third electrode row 54 fourth electrode row 60 electrode terminal 61 first wiring pattern 62 second wiring pattern 63 third wiring pattern 64 fourth wiring pattern 130 mounting surface of driving IC

Claims (13)

[Claims] 1. A semiconductor chip having a bump electrode group for face-down bonding on a mounting surface with a substrate, wherein the bump electrode group has at least a first electrode arranged along one of chip sides. A semiconductor chip comprising: a row; and second and third electrode rows that are obliquely arranged inward from both ends of the first electrode row. 2. The device according to claim 1, wherein the mounting surface has a substantially triangular planar shape, and the first electrode row is arranged along a chip side corresponding to a bottom side of the triangle. A semiconductor chip, wherein each of the three electrode rows is arranged along a chip side corresponding to a hypotenuse of a triangle. 3. The bump electrode group according to claim 1, wherein the bump electrode group is further arranged substantially in parallel with the first electrode row along a chip side opposite to a chip side along which the first electrode row extends. A semiconductor chip including a fourth electrode row. 4. The device according to claim 3, wherein the mounting surface has a substantially trapezoidal planar shape, the first electrode row is arranged along a chip side corresponding to a bottom side of the trapezoid, and A semiconductor chip, wherein the third electrode row is arranged along a chip side corresponding to a trapezoidal oblique side, and the fourth electrode row is arranged along a chip side corresponding to an upper side of a trapezoid. . 5. The device according to claim 1, wherein the mounting surface has a substantially rectangular planar shape, the first electrode row is arranged along a long side of the chip, and the second and third electrodes are arranged along a long side of the chip. A semiconductor chip, wherein the rows are arranged from the vicinity of the corner of the chip to the oblique inside. 6. The method according to claim 1, wherein
Among the bump electrodes of the second and third electrode rows, the bump electrodes formed at least near both ends of the first electrode row are the first electrodes with respect to the bump electrodes of the first electrode row. A semiconductor chip, which is displaced in a column arrangement direction. 7. A mounting structure using the semiconductor chip defined in any one of claims 1 to 6, wherein the substrate on which the semiconductor chip is mounted has the bump electrodes of the first electrode row mounted thereon. A first wiring pattern extending from the electrode terminal in a direction substantially orthogonal to the arrangement direction of the first electrode row; and an electrode terminal on which the bump electrodes of the second and third electrode rows are mounted. A second wiring pattern extending in a direction substantially perpendicular to the arrangement direction of the first electrode rows and opposite to the first wiring pattern; Semiconductor chip mounting structure. 8. A mounting structure using the semiconductor chip defined in claim 3 or 4, wherein the substrate on which the semiconductor chip is mounted is connected to the electrode terminal on which the bump electrode of the first electrode row is mounted. A first wiring pattern drawn in a direction substantially orthogonal to the arrangement direction of the first electrode row;
The direction from the electrode terminal on which the bump electrodes of the second, third and fourth electrode rows are mounted to the direction substantially orthogonal to the arrangement direction of the first electrode row, and the first wiring pattern A semiconductor chip mounting structure comprising: second, third, and fourth wiring patterns drawn in opposite directions. 9. A mounting structure using the semiconductor chip defined in any one of claims 1 to 5, wherein the substrate on which the semiconductor chip is mounted has the bump electrodes of the first electrode row mounted thereon. A first wiring pattern extending from the electrode terminal in a direction substantially orthogonal to the arrangement direction of the first electrode row; and a second wiring pattern extending from the electrode terminal on which the bump electrode of the second electrode row is mounted. A second wiring pattern drawn out in a direction substantially perpendicular to the arrangement direction of the electrode rows and in a direction opposite to the first wiring pattern;
Of the third electrode row from the electrode terminal on which the bump electrode of the third electrode row is mounted in a direction substantially orthogonal to the arrangement direction of the third electrode row and in a direction opposite to the first wiring pattern. A mounting structure of a semiconductor chip, comprising: 10. The mounting structure of a semiconductor chip according to claim 7, wherein the substrate on which the semiconductor chip is mounted is a glass substrate, a quartz substrate, or a plastic substrate. 11. The semiconductor chip mounting structure according to claim 7, wherein the substrate on which the semiconductor chip is mounted is a flexible substrate. 12. A liquid crystal display device using the semiconductor chip mounting structure defined in claim 10, wherein the substrate comprises:
A liquid crystal panel substrate for holding liquid crystal between the substrate and a mating substrate, and a transparent electrode formed on the liquid crystal panel substrate by being mounted on the semiconductor chip on the liquid crystal panel substrate. Wherein a predetermined signal is applied from the semiconductor chip through the wiring pattern. 13. A liquid crystal display device using the semiconductor chip mounting structure defined in claim 11, wherein the substrate comprises:
A mounting terminal formed at an end of the wiring pattern on the substrate is mounted on at least one liquid crystal panel substrate of a pair of liquid crystal panel substrates sandwiching liquid crystal, so that the liquid crystal panel A liquid crystal display device, wherein a predetermined signal is applied from the semiconductor chip to a transparent electrode formed on a substrate via the wiring pattern and the mounting terminal.