JPH1126638A - Ceramic package for flip chip mounting - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress the solder bridge and solder migration and improve the yield by forming ceramic dielectric dams between outer terminals which are distant from solder zones also after the flip chip mounting. SOLUTION: A multilayer ceramic PGA 1 has a cavity-up structure having pins 3-5 located on the opposite surface to an LSI 2 mounting surface. Outer terminals of an LSI 2 are mounted with PGI 1 and solders 6-8. On a surface layer of PGA 1 wirings 9-11 and ceramic dams 12-14 are formed. The internal structure of PGA 1 is composed of a signal layer having wired signal lines 15, ground layer 16 and power layer 17 connected through vias 18-20. This avoids reducing the yield due to the solder bridge and solder migration.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a ceramic package mounted on a flip chip, and more particularly, to a PGA used for mounting a high-speed logic LSI or the like.
(Pin Grid Array), BGA (Ball
Grid Array) and MCM (Multi C)
The present invention relates to a high-density multi-terminal ceramic package such as a hip module.

[0002]

2. Description of the Related Art In recent years, ICs have been highly integrated and more than 1,000 external terminals have appeared. At the same time, the miniaturization of the IC manufacturing process is progressing.
In comparison with the increase in the number of external terminals, the size of the IC is gradually increased. This reduces the pitch (interval) of the external terminals of the IC.

[0003] Wire bonding, which is a method of mounting ICs that has been widely used, requires external terminals to be arranged on the outer periphery of the IC. For example, 100mm for a 10mm square IC
When external terminals are formed at a pitch of μm, about 400 external terminals can be formed. The lower limit of the terminal pitch in this method is 10
It is slightly less than 0 μm, so that there is a drawback that too many external terminals cannot be taken out.

In recent years, flip-chip mounting in which external terminals are arranged in an array has begun to be used as a method for solving this problem. For example, when external terminals are formed on a 10 mm square IC at a pitch of 250 μm using the entire surface of the IC, about 1600 external terminals can be formed. As described above, flip chip mounting has a feature that a large number of external terminals can be formed in spite of a wider external terminal pitch than wire bonding. However, in order to form more external terminals, it is necessary to reduce the external terminal pitch.

Although various connection materials are used for flip chip connection, solder balls are generally used in many cases. Solder bumps are formed on opposing external terminals of an IC or a package, temporarily connected, and solder is melted and connected through a reflow furnace.

In this case, a phenomenon called a solder bridge, in which the molten solder splashes and short-circuits with adjacent external terminals or wiring drawn between the external terminals, causes a reduction in mounting yield. In addition, there is a possibility that solder migration may occur during use while applying a voltage, resulting in a short circuit failure. Therefore, there is a problem that the external terminal pitch cannot be reduced too much. In order to solve these problems, generally, only external terminals for flip-chip mounting are formed on the package surface layer, and all wirings are generally formed internally. However, this method increases the number of stacked ceramic layers in which a large number of vias are formed, resulting in an increase in cost.

[0007]

As described above, conventionally, there has been no appropriate solution to the demand for narrowing the external terminal pitch in a flip-chip mounting ceramic package. The present invention has been made in view of the above problems, and has as its object to provide a narrow-pitch flip-chip mounting ceramic package that suppresses solder bridges and solder migration by an inexpensive method and does not reduce yield. .

[0008]

The probability of the occurrence of the above-mentioned solder bridge and solder migration increases as the distance between the conductors decreases. Therefore, to suppress this, the distance between conductors must be increased. On the other hand, there is also a demand for a narrow pitch of the external terminals. Reducing the pitch of the external terminals and increasing the distance between conductors is a solution to this problem. The method is to increase the distance on the package surface (distance between conductors) between external terminals rather than the planar distance (external terminal pitch). That is, three-dimensional irregularities are formed on the package surface.

Accordingly, the present invention provides a ceramic package in which semiconductor elements having external terminals arranged in an array are flip-chip mounted, and a ceramic dielectric dam which is separated from the solder portion even after flip-chip mounting between the external terminals. And a ceramic package for flip chip mounting. The ceramic dielectric dam is formed by a printing technique or a green sheet laminating technique. Also, the dam can be provided with an inner layer of wiring.

[0010]

According to the ceramic package for flip-chip mounting of the present invention having the above structure, the occurrence of solder bridge and migration is prevented by the dam.
The pitch between external terminals can be reduced, and a large number of external terminals can be taken out without lowering the yield due to solder bridges and migration.

The height of a solder bump usually used for flip-chip mounting is about 100 μm, and a ceramic dam having a height less than 100 μm is formed. The ceramic dam is formed in a portion other than the external terminals. As a method for forming the ceramic dam, a printing method and a green sheet laminating method can be used. Either method is inexpensive and can be easily formed.

Usually, only external terminal pads are formed on the IC connection side surface of a multilayer ceramic package mounted by flip chip mounting, and there is no wiring. The wiring is all performed in the inner layer connected by the via. This is to prevent a short circuit between the solder and the wiring. However, in this method, the number of layers increases by one layer as compared with the case where the wiring is also formed on the surface layer.
In addition, a large number of vias are formed in the increased layer, which increases the cost. According to the present invention, wiring can be formed between external terminals on the surface layer, and the number of layers can be reduced by one. Also, since the wiring on the surface is masked by a ceramic dam, there is no fear of failure.

[0013]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below with reference to a manufacturing method using a multilayer ceramic PGA for flip chip mounting as an example. First, a slurry is prepared by mixing alumina powder, a sintering aid, a binder resin, a solvent such as xylene, and other additives. Next, the slurry is applied in a sheet shape on a polyester sheet or the like by a doctor blade method, and dried to produce a ceramic green sheet.

Next, the ceramic green sheet is cut into a predetermined size, and a punching process is performed in accordance with each layer of the package. Then, a conductor paste mainly containing a high melting point metal such as tungsten is printed in a predetermined pattern. At the same time, the conductive paste is filled into a through hole serving as a via hole,
Several to several tens of ceramic green sheets subjected to such treatment are laminated. When the ceramic dams are laminated by the green sheet method, they are laminated at this time. When forming by a printing method, printing is performed after lamination.

Next, by heating in an inert gas atmosphere, organic components such as a resin and a plasticizer in the ceramic green sheet are decomposed and eliminated, and then fired to produce a multilayer ceramic substrate. On the ceramic substrate, conductor layers such as a signal layer, a power supply layer, and a ground layer are formed, and via holes are also formed. Next, pins serving as external connection terminals are joined to the multilayer ceramic substrate, and then Ni and gold plating are performed. FIG. 1 is a cross-sectional view schematically showing a cross section of the multilayer ceramic PGA according to the example manufactured in this way.

The multilayer ceramic PGA 1 is a package having a structure called “cavity up” in which the mounting surface of the LSI 2 and the pins 3, 4, and 5 are on opposite sides. LSI2
Are mounted with PGA1 and solders 6, 7, and 8. Wirings (signal lines) 9, 10,
11 and the ceramic dams 12, 13, 14 covering them
Are formed. The internal structure of the PGA 1 includes a signal layer on which the signal line 15 is wired, a ground layer 16 and a power supply layer 17, and necessary connections are made by vias 18, 19, and 20.

As shown, ceramic dams 12, 1
Since the layers 3 and 14 are formed, the structure is such that solder bridges and migration hardly occur, and the pitch of the external terminals can be narrowed. Further, wirings (signal lines) 9, 10, and 11 can be formed on the surface layer below the dam.

Next, a comparative example is shown in FIG. A conventional method of forming only external terminals on the surface of PGA1 is shown.
As shown in the figure, in the embodiment, signal lines 9, 10, and 11 that can be wired on the surface layer of PGA1 are formed in inner layers. Specifically, a signal layer for wiring the signal lines 21 and a signal layer for wiring the signal lines 22. For this reason, it is increased by one layer. In addition, the increased one layer needs to form a large number of vias 23, 24, etc., which increases the cost. Further, the thickness of PGA1 also increases. In FIG. 2, the same parts as those in FIG. 1 are denoted by the same reference numerals. As is apparent from the above results, in the case of the ceramic PGA1 for flip-chip mounting according to the embodiment, the pitch of external terminals can be reduced while preventing solder bridges and migration, and can be provided at a low cost.

[0019]

As described in detail above, in the ceramic package for flip-chip mounting according to the present invention, the solder bridge and the migration are formed by forming a ceramic dam between the external terminals by a green sheet method or a printing method. As a result, it is possible to prevent a decrease in yield and to form a signal line on the surface layer, which contributes to a reduction in the number of stacked layers. Moreover, it is inexpensive because it uses a mature process.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view schematically showing a cross section of a flip-chip mounting ceramic PGA according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view schematically showing a cross section of a flip-chip mounting ceramic PGA according to a comparative example.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 PGA 2 LSI 3,4,5 Pin 6,7,8 Solder 9,10,11 Wiring (signal line) 12,13,14 (Ceramic) dam 15 Signal line 16 Ground line 17 Power supply layer 18,19,20 Via

Claims (4)

[Claims] In a ceramic package in which semiconductor elements having external terminals arranged in an array are flip-chip mounted, a ceramic dielectric dam which is separated from a solder portion even after flip-chip mounting is formed between the external terminals. A flip-chip mounting ceramic package characterized by being formed. 2. The flip chip mounting ceramic package according to claim 1, wherein the ceramic dielectric dam is formed by a printing technique. 3. The ceramic package for flip chip mounting according to claim 1, wherein the ceramic dielectric dam is formed by a green sheet laminating technique. 4. The ceramic package for flip-chip mounting according to claim 1, wherein a wiring is formed in the dam of the ceramic dielectric in an inner layer.