JPH11258575A - Method and device for driving liquid crystal display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To shorten the time required for one sequence by adopting an orthogonal function as a row electrode selection pattern and determining column voltage by using data required to be displayed and the row electrode selection pattern. SOLUTION: The orthogonal function is used as the row electrode selection pattern (row voltage pattern). A column voltage pattern is determined from the row electrode selection pattern and each display data (display pattern). In the low electrode selection pattern, a value corresponding to low selection voltage and a value corresponding to high selection voltage are respectively expressed as '-1' and '1' and an ON pixel and an OFF pixel to be displayed on display data are respectively set up as '1' and '-1'. Products between the row electrode selection pattern and respective bits of 3-bit data are found out. Three bits obtained by these products are arithmetically added. When an added value is positive, '-1' is impressed as column voltage, and when the added value is negative, '1' is impresed as the column voltage.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a driving method and a driving device for multiplex driving of a simple matrix type liquid crystal display device, and more particularly, to a gradation display by controlling a voltage applied to a liquid crystal element. The present invention relates to a driving method and a driving device for a liquid crystal display device.

[0002]

2. Description of the Related Art Binary Addressing Technique (BA) is a driving method for multiplex driving a liquid crystal display device.
T method). Assuming that the number of row electrodes to be selected simultaneously is N, there are a maximum of 2 ^N row electrode selection patterns. In the BAT method, a scanning voltage based on the 2 ^N patterns is sequentially applied to each row electrode to obtain 1 ^N. The sequence is displayed.

Further, there are 2 ^N types of data patterns that can be binary-displayed by a display element of N rows and 1 column, corresponding to the types of patterns that can be expressed by N bits. In the BAT method, a column voltage is applied to each column electrode according to N-bit data that can be displayed on the display elements in N rows and a row electrode selection pattern. The column voltage is determined as follows. In addition,
The display data when applying a high effective voltage to turn on the display element is “1”, and the display data when applying a low effective voltage to turn off the display element is “0”.
And

(1) When a value corresponding to a low selection voltage in a row electrode selection pattern is expressed as “0” and a value corresponding to a high selection voltage is expressed as “1”, an N-bit row electrode selection pattern and N-bit data are expressed. The exclusive OR is calculated for each bit between (2) The N bits obtained by the exclusive OR are arithmetically added. (3) If the sum is greater than N / 2 gives the V _C as a column voltage, it is smaller than N / 2 gives 0 as the column voltage.

In the selection pattern, a value corresponding to a low selection voltage is expressed as "-1", a value corresponding to a high selection voltage is expressed as "1", and ON data is expressed as "1" and OFF data is expressed as "-". When “1” is set, multiplication is performed instead of exclusive OR. Then, “0” is used instead of N / 2 as the judgment value for determining the column voltage. When the added value is larger than 0, 0 is given as the column voltage. _C will be given.

FIG. 13 is an explanatory diagram showing a column voltage pattern when N = 3. The row electrodes R0, R1, R2 are sequentially provided with row electrode selection patterns a3, a2, a1 =
"0, 0, 0", "0, 0, 1", ..., "1, 1,
1 ". In FIG. 13, " _Vr " is described instead of "1". For example, if the data d3, d2, and d1 to be displayed in the first column of the display device are "0, 0, 0" (= D0), each bit between (D0) and (P0) The arithmetic addition value of the exclusive OR is “0”. In this case, since N / 2 = 3/2, the column voltage when the scanning voltage according to the row electrode selection pattern of “0,0,0” is applied to the three row electrodes is “0”. Decided. The arithmetic addition value of the exclusive OR for each bit between (D0) and (P1) is “1”.

Therefore, the column voltage when the scanning voltage according to the row electrode selection pattern of “0, 0, 1” is applied to the row electrode is determined to be “0”. Then, (D0) and (P
The arithmetic addition value of the exclusive OR for each bit between 7) and “7” is “3”. Therefore, the column voltage when the “1,1,1” row electrode selection pattern is applied to the row electrode is determined to be “1”. In FIG. 13, the column voltage corresponding to “1” is expressed as “V _C ”.

A voltage corresponding to each pattern is applied to the row electrodes R0, R1, R2 at predetermined time intervals, and "0, 0, 0, 0," in the first column of the column voltage pattern in FIG. When a voltage corresponding to each bit of “1, 0, 1, 1, 1” is applied, “0,
0,0 "is displayed.

FIG. 14 shows the on / off state of the display element.
(A) Row electrode voltage, B) Column electrode voltage and (C)
FIG. 3 is an explanatory diagram showing a voltage applied to each element in a first row corresponding to a row electrode R0. For simplicity, V _r = V _C
= V. In addition, the first to eighth columns corresponding to the column electrodes C0 to C7 respectively have (D0) to (D0) to
It is assumed that the data of (D7) is displayed.

For example, from FIG. 13, the row electrode R0 has:
It can be seen that voltages corresponding to the patterns “0, 1, 0, 1, 0, 1, 0, 1” are sequentially applied. Further, the pattern “0, 0, 0, 1, 0, 1, 1, 1,” is applied to the column electrode C0.
1 indicates that the corresponding voltages are sequentially applied. Because each display element voltage (V _r -V _C) are applied, the display element at the intersection of the first row and each column, a voltage as shown in FIG. 14 (C) is applied. In FIG. 14, black circles indicate ON pixels, and white circles indicate OFF pixels.

FIGS. 15 and 16 show row voltage selection patterns (A), display data (B), column voltage patterns (C), and effective voltages applied to the respective elements when the number of row electrodes is five. FIG. 4 is an explanatory diagram showing a value (D) (per 1 V of applied voltage). Each row shown in FIG. 16 corresponds to FIG.
Corresponds to each line in. Each value in the column voltage pattern is determined by the method described above. Each row in the column voltage pattern indicates a value corresponding to the voltage value sequentially applied to the column electrode when each data is to be displayed.

Unlike FIG. 13, a row electrode selection pattern is shown above the column voltage pattern, and data is shown on the left side of the column voltage pattern. Also,
Unlike FIG. 13, in the row electrode selection pattern and the column voltage pattern, the voltage applied state is indicated by “1”, the 0 V applied state is indicated by “−1”,
ON data is represented by "1", and OFF data is represented by "-1".

For example, consider a case where "-1,1,1,1,1" shown in the second row of FIG. 15B is displayed in a certain column. 15 are sequentially applied to the row electrodes R0 to R4.
Voltage application in cycles # 1 to # 32 is performed according to the row voltage pattern as shown in FIG. Then, in each cycle # 1 to # 32, a voltage corresponding to the value indicated in the second row (row indicated by the broken line underline) in the column voltage pattern is applied to the column electrode.

Here, the effective voltage value applied to the display element at the intersection of a certain row electrode and a certain column electrode is expressed as follows. Sigma ₁ ³² is in the cycle _{# 1 ((V r -V C} ) /
2) in ² to cycle _{# 32 ((V r -V C} ) /
2) Indicates the sum of ² . Here, V _r and V _C are “1”,
It is one of "-1". It is clear that this value is equal to the effective voltage value (root means square) when a voltage of 1 V is applied.

The display element at the intersection of the row electrode R0 and the column electrode of interest (the electrode of the column where "-1,1,1,1,1" is to be displayed) is shown in FIG. ) Is applied as the effective voltage value (relative value) in one sequence for each value of the first row and each value of the second row in the column voltage pattern. Is done. The calculation result is “0.559”, which is shown in the second row of the D0 column in FIG. Other row electrode R
Each of the display elements at the intersections between 1 to R4 and the column electrode of interest is provided with each value in the second to fifth rows in FIG. 15A and each value in the second row in the column voltage value matrix. With respect to the value, the result of performing the calculation of the expression (1) is applied as an effective voltage value (relative value) in one sequence.
Each calculation result is “0.829”, and (D)
This is shown in the second row of columns D1 to D4.

The result is that the effective voltage values applied to the five display elements on the column electrode of interest have data "-"
1, 1, 1, 1, 1 ". That is, it indicates that a desired display is performed. Each value shown in the other rows in FIG. 15C is a result of performing the same operation on the other data shown in FIG. In FIG. 16D, “0.559” and “0.829” appear as values,
A display element to which an effective voltage corresponding to “0.559” is applied is an off pixel, and a display element to which an effective voltage corresponding to “0.829” is applied is an on pixel.

As can be seen from the examples shown in FIGS. 14C and 16D, in the BAT method, the effective voltage value applied to each ON pixel is the same, and The applied effective voltage values are the same. That is, the voltage averaging method is established. Further, the value required as the voltage applied to the column electrode is only V _C , and the driving circuit based on the BAT method may have a simple configuration.

Next, a super-reflective device capable of color display without a color filter to which the present invention can be applied.
A color liquid crystal display device (hereinafter, also referred to as SRC-LCD) will be described. The SRC-LCD performs color display by controlling a retardation value of a liquid crystal layer without using a color filter.
No. 2434 and JP-A-9-152596. More specifically, a liquid crystal layer, one or two polarizing plates, and a birefringent plate are combined, and a birefringent action is used to generate a multi-color that is sufficiently visible without a color filter. Although the SRC-LCD can be operated even in a transmission type, a great effect in practical use is obtained by providing a reflection plate and using it in a reflection type operation mode using external light.

FIG. 17A is a perspective view schematically showing an SRC-LCD. As shown in the figure, SRC-LCD
, The refractive index anisotropy [Delta] n ₁ and the product of the thickness d _{1 Δn 1} · d ₁
A liquid crystal layer 23 having a thickness of 1.2 to 2.5 μm and a pair of polarizing plates 2
1 and 22 and a birefringent plate 24 having a Δn ₂ · d ₂ of 1.2 to 2.5 μm and laminated on the liquid crystal layer 23. Here, the in-plane refractive index of the birefringent plate 24 is n
_x, if n _y, the refractive index in the thickness direction is n _z, n _x ≧
a n _y ≧ n _z, a Δn ₂ = n _x -n _y. d ₂ is the thickness of the birefringent plate 24.

In the drawing, reference numeral 25 denotes the upper polarizing plate 2.
1 is an absorption axis, 26 is an absorption axis of the lower polarizing plate 22, 27 is a major axis direction (substantially one orientation direction) of liquid crystal molecules on the upper side of the liquid crystal layer 23, and 28 is a lower axis of the liquid crystal layer 23. The long axis direction of the liquid crystal molecules (one remaining alignment direction) and 29 indicate the axial direction (slow axis) of the birefringent plate 24.

FIG. 17B shows the polarizing plate 21 viewed from above.
FIG. 3 is an explanatory diagram showing a relative relationship between the absorption axis direction, the slow axis direction of a plurality of birefringent plates 24, and the long axis direction of liquid crystal molecules above the liquid crystal layer 23. FIG. 17C shows the relative directions of the absorption axis of the polarizing plate 22, the slow axis of the plurality of birefringent plates 24, and the long axis of the liquid crystal molecules below the liquid crystal layer 23 when viewed from above. It is explanatory drawing which shows a relationship. FIG. 17 (B),
As shown in (C), the intersection angle between the major axis direction 27 of the liquid crystal molecules above the liquid crystal layer 23 and the direction of the absorption axis 25 of the polarizing plate 21 is θ ₁ , and the major axis of the liquid crystal molecules above the liquid crystal layer 23 is Direction 27
Is the intersection angle between the axis of the birefringent plate 24 and θ ₂ , and the intersection angle between the major axis direction 28 of the liquid crystal molecules below the liquid crystal layer 23 and the direction of the absorption axis 26 of the polarizing plate 22 is θ ₃ . .

The SRC-LCD uses the intersection angles θ ₁ , θ ₂ ,
Since θ ₃ is set to a predetermined angle and multiplex driving of three or more values is performed, almost achromatic color is displayed when no voltage is applied, and red and red are displayed when voltage is applied.
This is an STN liquid crystal display device that performs multi-color display that emits blue and green colors. Basically, a desired color is obtained by voltage-controlling the retardation value of the liquid crystal layer 23. As disclosed in Japanese Patent Application Laid-Open No. 9-269471, multi-color display is possible even with one polarizing plate and zero birefringent plate. In addition, products of liquid crystal display devices using SRC-LCD technology are already on the market.

[0023]

In the BAT method described above, 2 ^N types of patterns must be applied to the row electrodes in one sequence, and the column voltage must be changed accordingly. Therefore, in the driving circuit of the liquid crystal display device, in order to complete one sequence, 2 ^N pulse signals must be output, and the time required for one sequence becomes longer. Further, when driving an LCD panel capable of performing color display by applying an intermediate voltage, the degree of freedom of color selection can be increased by increasing the number of effective voltages that can be applied, that is, by increasing the number of gradations. There is a demand for a driving method that can be increased.

Accordingly, an object of the present invention is to provide a method of driving a liquid crystal display device which can reduce the time required for one sequence and can perform multi-level gradation display.

[0025]

A driving method of a liquid crystal display device according to the present invention employs an orthogonal function as a row electrode selection pattern and applies one of binary voltages to all row electrodes based on the orthogonal function. Simultaneously output and determine the column voltage which takes one of the two voltages using the data to be displayed and the row electrode selection pattern, divide the column voltage within one selection period by a certain ratio, and display the data to be displayed. Is changed within that period to perform gradation control.

The driving method of the liquid crystal display device may be a method in which the time when one display cycle ends is one frame, and frame modulation for performing gradation display using a plurality of frames is also used. When performing frame modulation, each frame may be configured at a different time.

Another driving method according to the present invention employs an orthogonal function as a row electrode selection pattern, and simultaneously outputs any one of binary voltages to all the row electrodes based on the orthogonal function to display. The column voltage which takes one of the binary voltages is determined using the desired data and the row electrode selection pattern, and the time when one display cycle ends is defined as one frame, and gradation display is performed using a plurality of frames. Sometimes, each frame is composed of different times.

A driving device for a liquid crystal display device according to the present invention
A driving device for driving an LCD that emits multi-colors without a color filter, employing an orthogonal function as a row electrode selection pattern, and simultaneously outputting one of binary voltages to three row electrodes based on the orthogonal function. It is configured to Here, the driving device may be a one-chip integrated circuit.

[0029]

DESCRIPTION OF THE PREFERRED EMBODIMENTS In the BAT method, a simple binary function as illustrated in FIGS. 13 and 15 is used as a row electrode selection pattern. The inventor of the present invention has found that when an appropriate orthogonal function is used as a row electrode selection pattern, display on a liquid crystal display device is completed in a short sequence.

FIG. 1 shows (A) a row electrode selection pattern when the number of row electrodes is 3, (B) display data of 3 bits to be displayed, (C) a column voltage pattern corresponding to the data, and (D) Effective voltage value applied to the element (applied voltage 1
FIG. Each row in the column voltage pattern indicates a value corresponding to a voltage value sequentially applied to the column electrode when each display pattern is to be displayed. Here, what is characteristic is that an appropriate orthogonal function is used as a row electrode selection pattern. In this example,
A 4 × 4 Hadamard function is used. However, since the number of row electrodes is 3, three rows out of four rows and four columns are used.

Based on the row electrode selection pattern shown in FIG. 1A and each display data shown in FIG.
As in the case of the method, the column voltage shown in FIG. 1C is determined. That is, the column voltage is determined as follows. (1) In the row electrode selection pattern, a value corresponding to a low selection voltage is expressed as “−1”, and a value corresponding to a high selection voltage is expressed as “1”. Assuming that the pixel is “−1”, the product of each bit is obtained between the column (3 bits) and the 3-bit data in the row electrode selection pattern. (2) The three bits obtained by the product are arithmetically added. (3) When the added value is positive, the column voltage is set to “−”.
1 ", and in the case of a negative value," 1 "is given as the column voltage.

In this case, since the number of data is odd, the arithmetic addition value does not become zero. When the row electrode selection pattern and the display data are represented by "1" and "0", an exclusive OR is obtained for each bit instead of a product for each bit. The column voltage is determined using (the number of data bits / 2) as a determination value. That is, here, it is determined whether or not the value matches for each bit between 3 bits in the row of the row electrode selection pattern and the 3 data bits, and is different from the number of bits having matching values. The value corresponding to the column voltage is determined according to the magnitude of the number of bits, that is, according to majority logic.

Next, the validity of the column voltage thus determined will be considered. The values shown in FIG. 1D are values obtained in the same manner as when the values shown in FIG. 16D are obtained. That is, a voltage is sequentially applied to each of the row electrodes R1 to R3 according to the row electrode selection pattern shown in FIG. 1A, and accordingly, each value of each row of the column voltage pattern shown in FIG. FIG. 1D shows an effective voltage value (per 1 V of applied voltage) applied to each display element in one sequence when applied to the column electrode. Note that each value shown in FIG.
This is a value calculated by the equation (1).

The value shown in FIG. 1E indicates a value corresponding to the effective voltage value applied to each display element (each pixel) at the intersection of the row electrode and the column electrode. The value corresponding to the effective voltage value is a value calculated by the following equation. Values shown in ^{_{Σ 1 4 ((V r -V}} C) / 2) 2 ··· (2) Fig. 1 (E), each of the rows in the column voltage pattern shown in FIG. 1 (B) It is also the number of values that do not match between the value and each value in each row in FIG. The number of mismatched values
"0" to "4" may appear.

In this case, if a display element to which a high effective voltage is applied is defined as an ON pixel, and a pixel to which a low effective voltage is applied is defined as an OFF pixel, an ON pixel is defined at (4-0) / 2 = 2. It is reasonable to distinguish between a pixel and an off pixel. In other words, an effective voltage corresponding to a value exceeding “2” should be applied to the ON pixel, and an effective voltage corresponding to a value less than “2” should be applied to the OFF pixel. .
1D and 1E, according to the driving method of the present invention, the value corresponding to the effective voltage value is “2”.
When the applied voltage is 1 V, 0.866 V is always applied when the applied voltage is 1 V, and when the value corresponding to the effective voltage value is less than “2”, 0.500 V is always applied. . Therefore, when the applied voltage is 1 V, the same voltage of 0.866 V is applied to all the ON pixels, and the same voltage of 0.500 V is applied to all the OFF pixels, so that the voltage averaging method is established. . This driving method is referred to as BLA3
(Bi-Level Addressing 3) method.

From the above, it can be understood that a desired display can be performed in the liquid crystal display device by using an appropriate orthogonal function as a row electrode selection pattern and using each column voltage value in the same manner as in the BAT method. . In the BAT method, one sequence is completed in 2 ³ = 8 cycles when the number of row electrodes is 3, whereas in the BLA3 method, one sequence is completed in four cycles. That is, according to the BLA3 method, a driving method with a shorter display completion sequence than the BAT method is realized.

Next, the effect of the BLA3 method will be examined. FIG. 2 is an explanatory diagram showing a comparison of characteristics between the conventional driving method, the IAPT method, the BAT method, and the BLA3 method of the present invention. Here, comparison is made for a case where there are three row electrodes. First, when comparing the ratio between V _on (high effective voltage) and V _off (low effective voltage), the ratio is 1.732 when the duty is 1/3 in the IAPT method and is equal to that in the BLA3 method when the bias is 1/4. However, when the duty is 1/3 and the bias is 1/3 in the IAPT method, there is 1.915.
Superior to LA3 method.

Next, the applied voltages at which the same V _on is obtained in each driving method are compared. For example, V _on = 2.338V
In this case, the applied voltage is 2.700 V in the BLA3 method.
However, the 1/3 duty of the IAPT method, 3.818 V for the 1/4 bias, the 1/3 duty of the IAPT method, and the 3.663 V for the 1/3 bias, which are 1.41 times as large as those of the BLA3 method, respectively. A voltage 36 times higher must be supplied. As described above, the number of levels of the row output and the column output may be two in the BLA3 method, whereas four levels are required in the IAPT method.

The number of cycles per frame is I
It is 3 in the APT method and 4 in the BLA3 method.
In the BLA3 method, the alternating current is performed in one frame, that is, four cycles, while the alternating current is performed in two frames, that is, six cycles in the method. Therefore, the time required for one sequence is reduced to 2/3.

As described above, in the BLA3 method, the time required for one sequence is short, which is advantageous for performing gradation display. For example, it is necessary to apply an intermediate voltage in order to perform color display on an SRC-LCD that can realize color display without using a color filter. That is, it is necessary to adopt a gradation driving method. When frame modulation is used as the gradation driving method, the number of gradations can be increased by increasing the number of frames. However, (frame frequency) /
A number of low frequency components equal to (the number of frames) are generated, and they appear as flicker due to the frame response of the liquid crystal. In particular, when the number of frames is increased, the time until display is completed becomes longer, so that flicker becomes remarkable. However, according to the BLA3 method, the time until display is completed can be shortened, and flicker can be reduced.

Hereinafter, a specific gradation driving method will be described. (Example 1) FIG. 3 shows ON and OFF in BLA3 driving.
FIG. 9 is an explanatory diagram showing an example of so-called frame modulation for realizing a gradation using four frames of two-level display. FIG. 3 (A)
Indicates the frame times of the first to fourth frames, the effective voltage (per 1 V of the applied voltage), and the gradation levels, and FIG. 3B is a graph showing the obtained gradation levels.

"0" and "1" described in each frame time are low effective voltages (V _off : FIG. 1).
Are applied, and a period during which a high effective voltage (V _on : 0.866 V shown in FIG. 1) is applied. Note that the effective voltage shown in FIG. 3 is calculated by the equation (3). In equation (3), V *
Is V _off or V _on .

[0043]

(Equation 1)

In normal frame modulation, the number of gradations is
Assuming that the number of frames in one sequence is F, gradation is (F + 1). That is, although five gradations can be realized in four frames, in the example shown in FIG. 3, the number of gradations is increased using two types of frame times. In this example, assuming that the time of the first and third frames is T1, and the time of the second and fourth frames is T2, when T1 / T2 is 0.65, each time as shown in FIG. An effective voltage is applied to the liquid crystal element. Therefore, as shown in FIG.
A gradation is obtained. The gradation linearity can be variously changed by changing the values of T1 and T2.

Originally, the voltage-transmittance curve of the liquid crystal panel is not linear, but has an S-shaped curve opposite to the graph shown in FIG. Therefore, the gradation level curve in this example tends to compensate for this, and a gradation that is linear for human eyes is realized.

(Example 2) FIG. 4 also shows that the BLA3 method drive is ON,
It is explanatory drawing which shows what is called frame modulation which implement | achieves a gradation using four frames of OFF 2-level display. But,
In this example, all four frame times are different, T2 / T1 = 0.88, T3 / T1 = 0.72, T
4 / T1 = 0.44. FIG.
The fourth frame time, the effective voltage, and the gray level are shown, and FIG. 4B is a graph showing the gray level. In this example, 16 gradations are obtained at gradation levels as shown in the graph of FIG. Note that the gradation linearity can be changed by changing the values of T1, T2, and T3, as in the case of Example 1.

(Example 3) As a method of obtaining a large number of gradations with a smaller number of frames, there is a pulse width modulation method (PWM). FIG. 5 shows an example of a method in which PWM is applied to BLA3 driving. In this example, the display pattern is displayed in order from the upper pixel.
OFF (gray level 0%), gray level 25%, and ON (gray level 100%). Then, assuming that the level of the column voltage is changed at most once within one selection time, the gradation control is performed by mixing the ON time and the OFF time of the dot for performing the gradation display at a certain ratio. FIG. 5A is a timing chart showing the column voltage and the row voltage, and FIG. 5B is a diagram showing the g (the ratio of the period t during which the column voltage is low to the one selection period RST), the effective voltage, and the gradation in the column C2. FIG. 5C is a graph showing the relationship between the gray level and the gray level. Note that the effective voltage is calculated by the equation (4).

[0048]

(Equation 2)

When row voltages as indicated by R1, R2, and R3 are applied to FIG. 5A and the above-described column voltage calculation is performed in each section within the four selection times, FIG.
The column waveform shown in FIG. The calculated effective voltage applied to C2 is shown in FIG. 5B, and the graph is shown in FIG. 5C. When one selection time is equally divided into ten as in this example, 11 gradations are obtained at gradation levels as shown in FIG. At the time of low duty driving, a linear gradation cannot be obtained, but an arbitrary linear gradation level can be obtained by controlling the time for dividing the pulse in this manner.

(Example 4) Next, a combination of pulse width modulation (PWM) and frame modulation (FRC) will be considered. FIG.
As shown in (A), one selection time is set to a =
0.22 (ON period) and b = 0.68 (ON period)
When the image data is divided into two in two types of time, two-level gray scale display can be performed per frame. Further, when off (0) and on (1) are added, gray scale display of four gray scales can be performed. Also, as shown in the lower part of FIG.
A method in which each frame time that is usually performed is equal is employed. Then, an effective voltage and a gradation level as shown in FIG. 6B can be realized. Therefore, FIG.
10 gradations are obtained at the gradation levels shown in FIG. In addition,
The meaning of t shown in FIG. 6A is the same as in the case of Example 3.

(Example 5) Next, a method of further increasing the gradation level by combining PWM and FRC will be described. FIG.
As shown in (A), one selection time is set to a =
It is divided into two by two types of time of 0.21 and b = 0.81, and further, off and on are added to realize four gradations. On the other hand, in the FRC, as shown in the lower part of FIG. 7A, each frame time is changed as T2 / T1 = 0.52. Then, an effective voltage and a gradation level as shown in FIG. 7B can be realized. Therefore, 16 gradations can be obtained at gradation levels as shown in FIG.

(Example 6) FIG. 8 is an explanatory diagram showing a driving method in which the number of frames is increased to 3 and the number of gradations is set to 64. As shown in FIG. 8A, one selection time is set to a by PWM.
= 0.333 and b = 0.666 are divided into two times, and off and on are added to realize four gradations.
Further, as shown in the lower part of FIG.
, T2 / T1 = 0.75, T
Change as 3 / T1 = 0.61. Then, FIG.
64 gradations are obtained at the gradation levels shown in FIG. 9B and FIG.

Table 1 shows the F used in Examples 1 to 6.
It is a summary of the number of RC frames, the length of one frame, the number of gradations by PWM, and the number of gradations realized. As shown in Table 1, according to each of the above examples, display of 4 to 64 gradations is realized, and when an SRC-LCD panel is driven, 4- to 64-color display is possible.

[0054]

[Table 1]

FIG. 10 is a block diagram showing an example of a driving circuit for realizing the BLA3 method. As shown in the figure, a drive circuit 10 generates a column data from a display memory 1 for storing display data, a row selection pattern generator 2 for generating a row selection pattern, and data from the display memory 1 and a row selection pattern. A column voltage generator 3, a column driver 4 for applying a column voltage to the LCD panel 6 based on column data, a row driver 5 for applying a row voltage based on a row selection pattern to the LCD panel 6, timing and gradation control, etc. And a controller 7 for performing the above. Here, the column voltage generator 3 and the column driver 4 correspond to a column voltage generator, and the row selection pattern generator 2 and the row driver 5 correspond to a row voltage generator. Further, the controller 7 corresponds to a control unit.

Display data necessary for ON / OFF binary or gradation display and a control signal for reading and writing these data from / to the display memory 1 are input to the drive circuit 10 from an external circuit. The display data is stored in the display memory 1.
Here, as the LCD panel 6, an SRC-displaying m icons such as indicators in an electronic device is performed.
Take an LCD as an example.

The 3-bit data from the display memory 1 and an appropriate orthogonal function (3-bit row selection pattern) from the row selection pattern generator 2 are input to the column voltage generator 3. The column voltage generator 3 calculates an exclusive OR of the display data and the row selection pattern, and compares the arithmetic sum with a predetermined threshold to generate binary column data. The column data is transferred to the column driver 4. The column driver 4 outputs a two-level voltage, and applies a voltage to a column electrode according to column data.

When performing the PWM gradation display, the controller 7 controls the ratio of the ON data display and the OFF data display within one selection time. On the other hand, the row selection pattern is sent to the row driver 5. The row driver 5 outputs a two-level voltage, and applies a voltage to a row electrode according to a row selection pattern. As described above, the respective binary drive waveforms are applied to the LCD panel 6 to realize a desired display.

If the number of frames is increased, the number of gradations can be increased, but a number of low-frequency components equal to (frame frequency) / (number of frames) is generated, and these appear as flicker due to the frame response of the liquid crystal. The disadvantages have already been mentioned. To eliminate such disadvantages,
There is known a phase modulation method in which the timing of on-data and off-data transferred to an LCD panel is changed depending on a location on a display. However, when icons of various sizes are arbitrarily arranged like the LCD panel 6, it is difficult to apply the phase modulation method. Therefore, it is desirable to limit the maximum number of frames to about four.

Under such a restriction, it is conceivable to employ PWM to increase the number of gradations. And example 3
~ Column output goes from on level to off level at any time within one selection time as used in Example 6, or
Preferably, the number of displacements from the off level to the on level is at most one. As the number of displacements increases, the number of gradations increases, but the high-frequency component of the drive waveform increases, and crosstalk in display increases. Further, since the clock frequency of the circuit must be increased, the current consumption of the entire device increases.

When the PWM control is performed in combination with PWM and FRC, if the number of PWM gradations is increased, the total number of gradations increases, but the number of bits of display data transferred for each frame increases. Therefore, the amount of information transferred between specific blocks on the circuit increases, resulting in an increase in cost and current consumption. Therefore, it is preferable that the number of bits of the display data transferred between one frame is set to 2 bits and four gradations are realized by PWM as used in Examples 4 to 6.

To realize low power consumption, the driving circuit 1
Although 0 is desirably constituted by an IC of one or two chips, it can be realized by one chip. Such a BL
The number of output levels of a chip that realizes A3 driving is reduced to two levels, compared to six levels in the conventional driving method. Further, the supply voltage may be as low as about 3 V as compared with the conventional driving method. Therefore, a DC-DC converter for boosting becomes unnecessary. Further, since the drive is time-division driven (corresponding to 1/3 duty), the number of terminals and the circuit size of the IC body can be reduced.

As a method of combining such an IC with an LCD panel, as conventionally used, an IC is used.
Into TCP or TAB, and connect A
Thermocompression bonding with CF (anisotropic conductive film) is also possible. To mount the IC more compactly and cheaply,
As shown in FIG. 11, a COG (chip-on-glass) for mounting the IC chip 11 directly on the LCD panel 6 is preferably used. In that case, the IC chip 11 is subjected to a terminal treatment suitable for COG. Then, the IC chip 11 is thermocompression-bonded to the LCD panel 6 using a dedicated ACF or the like.

Note that the LCD panel 6 illustrated in FIG.
Is an SRC-LCD that displays thirteen icons, and each icon is, for example, red, green, purple, blue,
Suppose it is displayed in yellow. The background color is white. SR
In order to make the C-LCD perform such display, an intermediate voltage corresponding to each color may be applied. That is, the drive circuit 10 integrated in the IC chip 11 performs the above-described gradation display control. In this example, if the number of column outputs is m, m = 6, but practically the value of m is 3 or more,
The upper limit is a value restricted by the number of pins of the IC chip 11, but preferably m is about 4 to 10.

An interface cable 12 is used to connect the IC chip 11 to an external circuit. Then, it is thermocompression-bonded directly to the terminals of the LCD panel 6 using a flexible printed circuit board or a heat seal. The other end of the interface cable 12 is connected to a board on which an external circuit is mounted by soldering or a connector. According to such a configuration, the dedicated IC chip 11 and the LCD panel 6
Are integrated, so that there is an advantage that the number of connection signals with an external circuit is reduced.

When m = 6, 19 signal lines having 18 segments + 1 common are required in the case of static driving, and 18/3 + 3 commons are required even in 1/3 duty driving. 9 signal lines are required.
However, according to the COG connection as described above, only four signal lines of the supply voltage to the IC chip 11, the common voltage (0 V), the serial data line and the clock line are required, and the mounting can be simplified. .

FIG. 12 is an explanatory diagram showing an example of pattern routing on a glass substrate for coloring the icons of each color shown in FIG. FIG. 12A shows an example of wiring on the front side of the substrate. In this example, six column electrodes C1 to C6 are provided.
Is arranged. FIG. 12B shows an example of wiring on the back side of the substrate. In this example, three row electrodes R1 to R3 are arranged.

[0068]

As described above, according to the present invention, the driving method and the driving device for a liquid crystal display device simultaneously output one of the binary voltages to all the row electrodes based on the orthogonal function, and perform the display. The column voltage which takes one of the binary voltages is determined by using the data to be made and the row electrode selection pattern, and the column voltage in one selection period is divided by a certain ratio, and the data to be displayed is divided into the period. The driving circuit is configured to perform gradation control by changing the
The column output is simple with two levels each, and the applied voltage can be reduced. In addition, a color display with excellent color reproducibility in which gradation display with a short time required for one sequence can be performed and V _on / V _off is constant. A display device can be realized. As a result, a driving method and a driving device suitable for driving the SRC-LCD can be provided.

In addition to the above-described steps, when the time when one display cycle is completed is set to one frame, and the frame modulation for performing the gray scale display using a plurality of frames is used, the same method is used. When realizing the number of gradations,
It can be realized with a shorter sequence. When performing frame modulation, if each frame is configured with different time, when realizing the same number of gradations,
It can be realized with a shorter sequence.

Further, one of the binary voltages is simultaneously output to all the row electrodes based on the orthogonal function, and the column to take any of the binary voltages using the data to be displayed and the row electrode selection pattern. When the voltage is determined, the time when one display cycle ends is defined as one frame, and when gradation display is performed using a plurality of frames, each frame is configured with a different time. The column output is simple with two levels each, and the applied voltage can be reduced. In addition, a color display with excellent color reproducibility in which gradation display with a short time required for one sequence can be performed and V _on / V _off is constant. A display device can be realized.

The driving device for the liquid crystal display device according to the present invention is
If a chip integrated circuit is used, low-voltage drive 1
A chip driving device can be realized, and the number of output levels of the chip can be reduced to two levels from six levels in the conventional driving method, and downsizing of the driving device can be realized.

[Brief description of the drawings]

FIG. 1 is an explanatory diagram for explaining a BLA3 method. (A)
Is a row electrode selection pattern when the number of row electrodes is 3,
(B) shows 3-bit display data to be displayed, (C) shows a column voltage pattern according to the data, and (D) shows an effective voltage value (per 1 V of applied voltage) applied to each element.

FIG. 2. BLA3 method and conventional IAPT method and BAT
Explanatory drawing for comparing methods.

FIG. 3 is an explanatory diagram showing an example of frame modulation for realizing a gray scale using four frames in BLA3 driving. (A) shows the frame time of the first to fourth frames, the effective voltage (per 1 V of applied voltage), and the gray level, and (B) shows the obtained gray level in a graph.

FIG. 4 is an explanatory diagram showing another example of frame modulation for realizing a gradation using four frames. (A) shows the frame time of the first to fourth frames, the effective voltage (per 1 V of applied voltage), and the gray level, and (B) shows the obtained gray level in a graph.

FIG. 5 is an explanatory diagram showing an example of a method in which PWM is applied to the BLA3 method. (A) is a timing chart showing the column voltage and the row voltage, (B) shows the relationship between g in column C2, the effective voltage and the gradation level, and (C) shows a graph of the gradation level.

FIG. 6 is an explanatory diagram showing an example of a method in which frame modulation and PWM are applied to the BLA3 method. (A) is an example of division of one selection time by PWM, (B) is an effective voltage and a gradation level,
(C) shows a graph of gradation levels.

FIG. 7 is an explanatory diagram showing another example of a method using frame modulation and PWM. (A) shows an example of division of one selection time by PWM, (B) shows an effective voltage and a gradation level, and (C) shows a graph of the gradation level.

FIG. 8 is an explanatory view showing still another example of a method using frame modulation and PWM. (A) shows an example of division of one selection time by PWM, and (B) shows an effective voltage and a gradation level.

FIG. 9 is an explanatory diagram showing the gradation levels shown in FIG. 8 in a graph.

FIG. 10 is a block diagram illustrating an example of a driver circuit for implementing the BLA3 method.

FIG. 11 is an explanatory diagram showing a configuration in which a one-chip drive circuit and an SRC-LCD are integrated.

FIG. 12 is an explanatory diagram showing an example of pattern routing on a glass substrate for coloring icons of each color shown in FIG. 11; (A) shows an example of wiring on the front side of the substrate, and (B) shows an example of wiring on the back side of the substrate.

FIG. 13 is an explanatory diagram showing a column voltage pattern by the BAT method when N = 3.

FIG. 14 shows the on / off state of the display element according to the BAT method, in which (A) the row electrode voltage, (B) the column electrode voltage, and (C) the voltage applied to each element in the first row corresponding to the row electrode R0. FIG.

FIG. 15 is an explanatory diagram showing a column voltage pattern by the BAT method when N = 5. (A) is a row voltage selection pattern,
(B) shows the display data of five rows, and (C) shows the column voltage pattern.

FIG. 16 is an explanatory diagram showing the value of the effective voltage applied to each element when N = 5.

17A is a perspective view schematically showing an SRC-LCD, and FIG. 17B is a view showing an absorption axis direction of a polarizing plate, a slow axis direction of a birefringent plate, and liquid crystal molecules above a liquid crystal layer as viewed from above. FIG. 3 (C) is an explanatory view showing the relative relationship in the major axis direction of the liquid crystal molecules viewed from above, the absorption axis direction of the polarizing plate, the slow axis direction of the birefringent plate, and the major axis direction of the liquid crystal molecules below the liquid crystal layer. FIG.

[Explanation of symbols]

 Reference Signs List 1 display memory 2 row selection pattern generator 3 column voltage generator 4 column driver 5 row driver 6 LCD panel 7 controller 10 drive circuit 11 IC chip (1 chip)

Claims (6)

[Claims] 1. An orthogonal function is adopted as a row electrode selection pattern, and one of binary voltages is simultaneously output to all row electrodes based on the orthogonal function, and data to be displayed and the row electrode selection pattern are used. A liquid crystal display device that determines a column voltage that takes one of binary voltages, and divides a column voltage within one selection period by a certain ratio, and changes data to be displayed within that period to perform gradation control. Drive method. 2. The time when one display cycle ends is set to one.
2. The method for driving a liquid crystal display device according to claim 1, wherein gradation display is performed using a plurality of frames as frames. 3. The driving method of a liquid crystal display device according to claim 2, wherein when performing gradation display using a plurality of frames, each frame is formed at a different time. 4. An orthogonal function is adopted as a row electrode selection pattern, and one of binary voltages is simultaneously output to all row electrodes based on the orthogonal function, and data to be displayed and the row electrode selection pattern are used. To determine a column voltage that takes one of the two values of voltage, and the time at which one display cycle ends is taken as one frame,
A method for driving a liquid crystal display device in which each frame is formed at a different time when gradation display is performed using a plurality of frames. 5. A driving device for driving an LCD that emits multi-colors without a color filter, wherein an orthogonal function is adopted as a row electrode selection pattern, and one of three binary voltages is selected based on the orthogonal function. A driving device for a liquid crystal display device, which outputs signals simultaneously to row electrodes. 6. A one-chip integrated circuit.
A driving device for a liquid crystal display device according to claim 1.