JPH11251180A - Multilayer capacitor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce the floating parasitic inductance due to the increase in the capacity of a multilayer capacitor and in the lengthening of inner electrodes. SOLUTION: Inner electrodes 301-304 are adjacent to dielectric substrates 401-403 and are laminated with dielectric layers of the dielectric substrates 401-403 among them to form a capacitor device having two electrode circuits. The inner electrodes 301 and 303 and the inner electrodes 302 and 304 are adjacent to each other with a dielectric layer sandwiched between them. Accordingly, a large electrostatic capacity which is proportional to the number of dielectric layers, their dielectric constants and the facing areas of the inner electrodes are obtained between the two electric circuits. The electric circuit are formed by serially connecting the inner electrodes 301-304 in sequence and in the direction of their length perpendicular to the lamination. The inner electrodes 301 and 303 and the inner electrodes 302 and 304 are adjacent to each other.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] The present invention relates to a multilayer capacitor. The multilayer capacitor according to the present invention is mainly used as a smoothing capacitor of a switching power supply or a power supply decoupling capacitor of a high-frequency electronic circuit.

[0002]

2. Description of the Related Art In recent years, switching power supplies that are lightweight and easily obtain large power have been mainly used as power supplies for electronic circuits. Conventionally, in switching power supplies, electrolytic capacitors have been mainly used as smoothing capacitors.
Recently, multilayer capacitors have been used frequently.
Multilayer ceramic capacitors are advantageous in that they are small in size, have a large capacity, and have low dielectric loss.

In addition, as a capacitor for power supply decoupling of a high-frequency electronic circuit, instead of an electrolytic capacitor,
Multilayer capacitors have come to be used frequently.

[0004] However, due to the increase in the switching frequency of the switching power supply and the increase in the clock frequency of the electronic circuit, inductance, which has not been much considered in the past, has become a problem. For example, in a high-frequency operating frequency region, self-resonance occurs due to inductance and capacitance, which may cause phase inversion. When such a self-resonance phenomenon occurs, a circuit using the multilayer capacitor abnormally oscillates, and it becomes impossible to secure a stable circuit operation.

In order to avoid such a problem due to the self-resonance phenomenon, the inductance may be reduced and the resonance frequency may be increased to, for example, several times or more the operating frequency. From such a viewpoint, Japanese Patent Publication No. 4-70764 can be cited as a prior art document aimed at reducing the inductance of the multilayer capacitor. However, in the technology described in this prior art document,
Since internal electrodes at different potentials are drawn out to the same end face of the dielectric substrate and connected to external electrodes formed on the same end face, as miniaturization progresses, between two external electrodes at different potentials Insufficient insulation distance cannot be secured. Further, when mounted on a circuit board, the external electrodes may be short-circuited by solder or the like.

[0006]

SUMMARY OF THE INVENTION An object of the present invention is to provide a multilayer capacitor in which the inductance is reduced and the self-resonant frequency can be significantly higher than the working frequency.

Another object of the present invention is to provide a multilayer capacitor having an inductance reduction structure that can sufficiently cope with miniaturization.

[0008]

In order to solve the above-mentioned problems, a multilayer capacitor according to the present invention includes a dielectric substrate and a plurality of internal electrodes. The internal electrode is buried inside the dielectric substrate and laminated with a dielectric layer of the dielectric substrate interposed therebetween to constitute a capacitor element having two electric circuits.

At least one of the electric circuits is constituted by connecting a plurality of the internal electrodes in series inside the dielectric substrate in a length direction orthogonal to the lamination direction. An internal electrode belonging to one of the electric circuits and an internal electrode belonging to the other of the electric circuit are adjacent to each other with the dielectric layer interposed therebetween.

As described above, in the multilayer capacitor according to the present invention, the plurality of internal electrodes are buried inside the dielectric substrate, laminated with the dielectric layer of the dielectric substrate interposed therebetween, and A capacitor element having a circuit is configured. Of the two electric circuits, an internal electrode belonging to one of the electric circuits and an internal electrode belonging to the other of the electric circuits are adjacent to each other with a dielectric layer interposed therebetween. Therefore, the number of dielectric layers, the layer thickness,
A large capacitance proportional to the dielectric constant and the facing area of the internal electrode is obtained.

In addition, at least one of the electric circuits is constituted by connecting a plurality of internal electrodes in series in a length direction orthogonal to the direction of lamination in series, and comprises an internal electrode belonging to one of the electric circuits; The internal electrodes belonging to the other side of the electric circuit are adjacent to each other. According to this structure, the electric polarity of the pair of adjacent internal electrodes is reversed, and the flowing current is in the opposite direction. Therefore, it is possible to reduce the inductance, set the self-resonant frequency to a frequency several times higher than the used frequency, for example, and obtain a multilayer capacitor that does not cause self-resonance in the used frequency band.

Further, since the plurality of internal electrodes are connected inside the dielectric substrate, sufficient electrical insulation by the dielectric substrate can be secured between the internal electrodes and the connection conductor. Moreover, the terminal electrodes are provided on both end surfaces facing each other in the length direction, and each of the electric circuits is led out to the both end surfaces facing each other in the length direction and connected to the terminal electrodes. In this case, sufficient electrical insulation can be ensured.

Therefore, it is possible to obtain a multilayer capacitor having an inductance reduction structure that can sufficiently cope with miniaturization.

Preferably, not only one of the electric circuits,
The other of the electric circuits also includes a plurality of internal electrodes, and is configured by connecting the plurality of internal electrodes sequentially in series in the length direction. According to such a configuration, the number of dielectric layers can be increased, and the acquisition capacity can be increased.

Also in this case, the internal electrode belonging to one of the electric circuits and the internal electrode belonging to the other of the electric circuit are:
Adjacent to each other, the adjacent pair of internal electrodes have opposite electric polarities and the flowing currents are in opposite directions. Therefore, in the adjacent pair of internal electrodes, the inductance generated in each of the internal electrodes is mutually different. Cancel each other out.
Therefore, the inductance is reduced and the self-resonant frequency is
Use frequency, for example, set to a high frequency several times or more,
In the working frequency band, a multilayer capacitor that does not cause self-resonance can be obtained.

In the present invention, the dielectric substrate is generally made of a dielectric ceramic. In addition, an organic dielectric can be used.

As an example of the connection mode of the internal electrodes, a structure in which the internal electrodes are connected in a zigzag manner in each of two electric circuits can be adopted. As another aspect, in each of the electric circuits, the internal electrodes may be connected in a spiral shape.

As a means for connecting the internal electrodes belonging to each of the two electric circuits in series, a structure in which the internal electrodes are connected by a through-hole conductor penetrating the dielectric layer is effective.

In the multilayer capacitor according to the present invention, one end of each of the electric circuits is led out to both end surfaces facing each other in the length direction and connected to terminal electrodes provided on both end surfaces. According to this structure, a planar mounting type multilayer capacitor can be obtained.

Further, as another aspect, the multilayer capacitor according to the present invention may include a plurality of capacitor elements. In this case, each of the capacitor elements is stacked,
They are electrically connected in parallel with each other. According to this structure,
In addition to simplifying the internal electrode structure of each capacitor element, it is possible to obtain a capacitance corresponding to the number of capacitor elements.

Other objects, configurations and advantages of the present invention will be described more specifically with reference to the accompanying drawings. The accompanying drawings merely show examples.

[0022]

FIG. 1 is an exploded perspective view of a multilayer capacitor according to the present invention, and FIG. 2 is a sectional view of the multilayer capacitor shown in FIG. As shown in the figure, the multilayer capacitor according to the present invention includes a dielectric substrate 1 and a plurality of internal electrodes 301 to 3.
04. The dielectric substrate 1 is generally made of a dielectric ceramic. In addition, an organic dielectric can be used.

The internal electrodes 301 to 304 are formed on the dielectric substrate 1
And a dielectric layer 401 of the dielectric substrate 1 embedded therein.
403 sandwiched between the two electric circuits A and B
Is formed. Electric circuit A
Is formed by connecting the internal electrodes 301 and 303 in series in the length direction X orthogonal to the stacking direction Z. The electric circuit B is also configured by connecting the internal electrodes 302 and 304 in series in the length direction X orthogonal to the stacking direction Z. Both ends in the width direction Y of the internal electrodes 301 to 304 are closed by the dielectric substrate 1.

The internal electrodes 301 and 30 belonging to the electric circuit A
3 and the internal electrodes 302 and 304 belonging to the electric circuit B are adjacent to each other with the dielectric layers 401, 402 and 403 interposed therebetween.

The internal electrodes 301 and 303 belonging to the electric circuit A are connected by through-hole conductors 51 penetrating the dielectric layers 401 and 402. The internal electrodes 302 and 304 belonging to the electric circuit B are
2, 403 are connected by a through-hole conductor 52 penetrating therethrough. The through-hole conductor 52 connects the internal electrodes 302 and 304 on the side opposite to the through-hole conductor 51 when viewed in the length direction X. Thus, an electric circuit A in which the internal electrodes 301 and 303 are connected in a zigzag and an electric circuit B in which the internal electrodes 302 and 304 are connected in a zigzag are obtained. One end of each of the internal electrodes 301 to 304 may be guided to the outside of the dielectric substrate 1 and connected to the outside. In the embodiment, three through-hole conductors 51 and 52 are provided, but the number is arbitrary.

As described above, in the multilayer capacitor according to the present invention, a plurality of internal electrodes 301 to 304 are provided.
Are embedded in the dielectric substrate 1 and are stacked with the dielectric layers 401 to 403 of the dielectric substrate 1 interposed therebetween, and constitute a capacitor element having two electric circuits A and B.
Of the two electric circuits A and B, the internal electrodes 301 and 303 belonging to the electric circuit A and the internal electrodes 3 belonging to the electric circuit B
02 and 304 are adjacent to each other with the dielectric layers 401 to 403 interposed therebetween. Therefore, two electric circuits A,
Between B, a large capacitance proportional to the number of the dielectric layers 401 to 403, the dielectric constant thereof, and the facing area of the internal electrodes 301 to 304 is obtained.

Moreover, the electric circuits A and B are connected to the internal electrodes 30.
The internal electrodes 301 and 303 belong to the electric circuit A and the internal electrodes 302 and 304 belong to the electric circuit B. Are adjacent to each other with the dielectric layers 401 to 403 interposed therebetween. According to this structure, for example, a pair of adjacent internal electrodes 301 and 302
Have opposite polarities, and the current directions of the flowing currents i11 and i12 are also the same.
Then, the direction is opposite as in the direction b. Therefore, in the pair of adjacent internal electrodes 301 and 302, the internal electrodes 301 and
The inductances that occur in each of the 302 cancel each other. A similar inductance canceling action occurs between the internal electrode 303 and the internal electrode 304. Therefore, the inductance can be reduced and the self-resonant frequency can be set to a high frequency, for example, several times higher than the operating frequency, and a multilayer capacitor that does not cause self-resonance in the operating frequency band can be obtained.

Since the plurality of internal electrodes 301 to 304 are connected by through-hole conductors 51 and 52 inside the dielectric substrate 1, the internal electrodes 301 to 304
And the through-hole conductors 51 and 52, sufficient electrical insulation by the dielectric substrate 1 can be secured. Moreover,
The terminal electrodes 21 and 22 are provided on both end surfaces facing each other in the length direction X, and the electric circuits A and B lead one end to both end surfaces facing each other in the length direction X and are provided on both end surfaces. Connected to the terminal electrodes 21 and 22. Specifically, one end of the internal electrode 301 located on the uppermost layer is made conductive to the terminal electrode 21, and one end of the internal electrode 304 located on the lowermost layer is made conductive to the terminal electrode 22. According to this structure, sufficient electrical insulation can be secured between the terminal electrodes 21 and 22 at different potentials outside the dielectric substrate 1. Therefore, it is possible to obtain a multilayer capacitor having an inductance reduction structure that can sufficiently cope with miniaturization.

Next, the effects of the present invention will be described with reference to specific data. A multilayer capacitor according to the present invention having the internal electrode structure shown in FIGS. 1 and 2 and a conventional multilayer capacitor having four internal electrodes connected alternately were prepared, and their characteristics were compared and evaluated. The dimensions and the shape of the multilayer capacitor are both a rectangular parallelepiped of 3.2 mm in length and 1.6 mm in width. The thickness of the dielectric layer, the shape of the internal electrode, and the number of layers are the same for both.

As a result of the measurement, the capacitance at 1 kHz was 33.1 nF for the multilayer capacitor according to the present invention, and was approximately the same at 35.7 nF for the conventional capacitor.

However, while the inductance at 1 GHz was 1270 PH in the conventional multilayer capacitor, it was 340 PH in the multilayer capacitor according to the present invention, and the inductance was reduced to about 1/4 of the conventional value.

FIG. 3 is a sectional view showing another embodiment of the multilayer capacitor according to the present invention. 1 and 2 are denoted by the same reference numerals, and description thereof will be omitted. In this embodiment, in comparison with the embodiment of FIGS. 1 and 2, the number of internal electrodes is increased,
It is designed to obtain a larger capacitance. The internal electrodes 301 to 308 have two zigzag electric circuits A,
B.

The internal electrodes 301 and 30 belonging to the electric circuit A
3, 305, 307 are through-hole conductors 51, 52,
By 53, they are sequentially connected in series (zigzag). The internal electrodes 304 and 306 belonging to the electric circuit B include:
A gap is provided at a portion that intersects with the through-hole conductors 52 and 53, thereby avoiding a short circuit between the through-hole conductors 52 and 53 and the internal electrodes 304 and 306.

The internal electrodes 301 and 30 belonging to the electric circuit A
3, 305 and 307 are internal electrodes 3 belonging to the electric circuit B.
02, 304, 306, 308 and dielectric layers 401 to 4
07 are interposed therebetween, and are serially connected (zigzag) by the through-hole conductors 54, 55, 56 sequentially.
Connected to

According to the above structure, the internal electrodes (301 and 302), (303 and
04), (305 and 306), and (307 and 308)
The electric polarities are reversed, and the currents (i11 and i1
2), (i13 and i14), (i15 and i16), (i
17 and i18) flow in the opposite direction of the a direction and the b direction in each pair. Therefore, in each of the adjacent pairs of the internal electrodes (301 and 302), (303 and 304), (305 and 306), and (307 and 308), the inductance generated in each of the internal electrodes cancels each other. Therefore, it is possible to reduce the inductance, set the self-resonance frequency to a frequency several times higher than the used frequency, for example, and obtain a multilayer capacitor that does not cause self-resonance in the used frequency band.

FIG. 4 is a view showing another embodiment of the multilayer capacitor according to the present invention. The same components as those shown in FIGS. 1 to 3 are denoted by the same reference numerals, and description thereof will be omitted. In this embodiment, the electric circuits A and B
In each of the above, the internal electrodes 301 to 308 are spirally connected. More specifically, the internal electrodes 301, 307, 303, and 305 belonging to the electric circuit A are sequentially spirally connected by the through-hole conductors 51, 52, and 53, and the internal electrodes 308 and 30 belonging to the electric circuit B are connected.
2, 306, 304, through-hole conductors 54, 55,
By 56, they are sequentially connected in a spiral shape.

The internal electrodes 301 and 30 belonging to the electric circuit A
7, 303, 305 and the internal electrodes 3 belonging to the electric circuit B
08, 302, 306, 304 are the dielectric layers 401 to
407 are sandwiched between them.

According to this structure, the adjacent internal electrodes (3
01 and 302), (303 and 304), (305 and 30)
6) and (307 and 308) have opposite electric polarities, and currents (i11 and i12), (i13 and i14),
(I15 and i16), (i17 and i18) are in the a direction and b
Flow in the opposite direction. Therefore, adjacent pairs of internal electrodes (301 and 302), (303 and 304), and (30)
5 and 306) and (307 and 308), the inductance generated in each of the internal electrodes cancels each other. Therefore, it is possible to reduce the inductance, set the self-resonant frequency to a frequency several times higher than the used frequency, for example, and obtain a multilayer capacitor that does not cause self-resonance in the used frequency band. Here, the internal electrode belonging to one side is connected to the terminal 21, and the internal electrode belonging to the other side is connected to the terminal 22.

FIG. 5 is a view showing another embodiment of the multilayer capacitor according to the present invention. In the figure, the same components as those shown in FIG. 1 are denoted by the same reference numerals, and description thereof will be omitted. In this embodiment, a plurality of capacitor elements C1 and C2 are included. Capacitor element C
1 and C2 each have the electrode structure shown in FIG. Therefore, the operation and effect described with reference to the embodiment of FIG. 1 are achieved. In the embodiment, two capacitor elements C1,
Only C2 is illustrated, but the number is arbitrary.

In addition, each of the capacitor elements C1 and C2 is stacked and electrically connected in parallel with each other. Therefore, the capacitance corresponding to the number of capacitor elements can be obtained. Although not shown, the structure of the capacitor elements C1 and C2 may be any of those shown in FIGS.

[0041]

As described above, according to the present invention, the following effects can be obtained. (A) It is possible to provide a multilayer capacitor in which the inductance is reduced and the self-resonant frequency can be significantly higher than the operating frequency. (B) It is possible to provide a multilayer capacitor having an inductance reduction structure that can sufficiently cope with miniaturization.

[Brief description of the drawings]

FIG. 1 is an exploded perspective view of a multilayer capacitor according to the present invention.

FIG. 2 is a cross-sectional view of the multilayer capacitor shown in FIG.

FIG. 3 is a sectional view showing another embodiment of the multilayer capacitor according to the present invention.

FIG. 4 is a sectional view showing another embodiment of the multilayer capacitor according to the present invention.

FIG. 5 is a sectional view showing still another embodiment of the multilayer capacitor according to the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Dielectric substrate 301-308 Internal electrode 401-407 Dielectric layer 51-56 Through-hole conductor

Claims (8)

[Claims] 1. A multilayer capacitor including a dielectric substrate, a plurality of internal electrodes, and a plurality of terminal electrodes, wherein the internal electrodes are embedded in the dielectric substrate, and the dielectric is formed by the dielectric substrate. Laminated with body layers in between, 2
A capacitor element having two electric circuits, wherein at least one of the electric circuits sequentially connects the plurality of internal electrodes in a length direction orthogonal to the lamination direction inside the dielectric substrate. The internal electrode belonging to one of the electric circuits and the internal electrode belonging to the other of the electric circuit are adjacent to each other with the dielectric layer interposed therebetween, and the terminal electrode Are applied to the opposite end faces in the length direction. Each of the electric circuits is led out to the opposite end faces in the length direction, and is connected to the terminal electrode. 2. The multilayer capacitor according to claim 1, wherein the dielectric substrate is made of a dielectric ceramic. 3. The multilayer capacitor according to claim 1, wherein the other of the electric circuits includes a plurality of the internal electrodes, the inside of the dielectric substrate and the direction of the lamination. It is configured by being serially connected in series in the orthogonal length direction. 4. The multilayer capacitor according to claim 3, wherein each of the electric circuits is configured by connecting the internal electrodes in a zigzag manner. 5. The multilayer capacitor according to claim 3, wherein each of the electric circuits is configured by connecting the internal electrodes in a spiral shape. 6. The multilayer capacitor according to claim 1, wherein the internal electrodes are connected by a through-hole conductor penetrating the dielectric layer. 7. The multilayer capacitor according to claim 1, wherein each of the electric circuits is led to opposite end faces in the length direction. , Are connected to terminal electrodes provided on both end faces. 8. The method of claim 1, 2, 3, 4, 5, 6, or 7.
In the multilayer capacitor described in any one of the above, the plurality of capacitor elements are stacked, and each of the capacitor elements is stacked and electrically connected in parallel with each other.