JPH11243166A - Resin-sealed semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a resin-encapsulated semiconductor device which is enhanced in reliability by a method, wherein the semiconductor device is improved so as to enhance dielectric strength between a lead frame mounted with a semiconductor chip and a heat sink, while restraining a heat dissipating path between the lead frame and the heat sink low in thermal resistance. SOLUTION: A resin-encapsulated semiconductor device consists of a semiconductor chip 1, a lead frame 2 mounted with the semiconductor chip 1, and a heat sink 3 arranged on the die pad 2a of the lead frame 2 through the intermediary of a narrow insulating space, wherein these members are sealed up with molding resin 4 into a single piece. At least, either the die pad 2a of the lead frame 2 or the heat sink 3, for instance, a projection 3a protruding toward the die pad 2a is provided to the heat sink 3, the edge face and peripheral surface of the projection 3a are covered with an insulating resin layer 7, the lead frame 2 is superimposed on the heat sink 3, and the lead frame 2, the heat sink 3, and their surroundings are encapsulated with molding resin.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a resin-sealed semiconductor device with a heat sink for a power module such as an IGBT applied to a power switching element.

[0002]

2. Description of the Related Art As a resin-encapsulated semiconductor device described above, a lead frame 2 on which a semiconductor chip 1 is mounted and subjected to predetermined wire bonding as shown in FIG. There is known a configuration in which a peripheral region of a heat sink 3 for heat radiation disposed opposite to a back surface of an island (chip mounting) 2a is integrally sealed with a molding resin 4 and packaged.

In particular, in a module in which a plurality of semiconductor chips are incorporated in a resin package, leads are electrically connected between the semiconductor chip 1 to which a voltage is applied and the heat sink (ground side) 3 as shown in the drawing. Frame 2
After separating the die pad 2a from the heat sink 3, the molding resin 4 is filled in this portion to secure required dielectric strength. In this case, in order to minimize the heat transfer resistance between the lead frame 2 and the heat sink 3 and obtain high heat dissipation, the interval between the two is as small as possible within a range that can maintain the required dielectric strength, for example, 100 to 300 μm.
It is necessary to keep the distance as narrow as about m.

However, if the space between the lead frame 2 and the heat sink 3 facing the lead frame 2 is set to a narrow space of the order of μm, the lead frame 2 and the heat sink 3 are inserted into a molding die to perform resin sealing. When the lead frame 2 comes into contact with the heat sink 3 or the lead frame 2 comes into contact with the heat sink 3 due to the flow of the molding resin flowing in the cavity of the mold during molding, and the lead frame 2 is short-circuited. In some cases, the required insulation withstand voltage cannot be ensured due to a narrow interval.

In Japanese Patent Publication No. 3-63822, a semiconductor chip 1 is mounted on a lead frame 2 as shown in FIG. Is first sealed with a molding resin 5, and in the subsequent second resin sealing, the temporary assembly including the heat sink 3 is integrally sealed with the molding resin 4. I have. Further, at the time of the first resin sealing, the projections 5a are simultaneously formed on the lower surface of the resin block (the back side of the lead frame 2), and at the second resin sealing, the temporary assembly is interposed via the projections 5a. The heat sink 3 is overlaid on the heat sink 3 and sealed with a molding resin 4. By this resin sealing, a narrow insulating space filled with the resin 4 is secured between the lead frame 2 and the heat sink 3. Things are also known.

Separately from the above method, the resin-encapsulated semiconductor device of Japanese Patent Application No. 9-271809 previously proposed by the same applicant as the present invention has a lead frame 2 and a heat sink 3 as shown in FIG. And an insulating spacer 6 using an insulating sheet such as a double-sided adhesive tape as a fixing means.
A required insulation interval is maintained with the interposition of the resin, and the assembly is inserted into a molding die in this assembled state and sealed with the molding resin 4.

[0007]

According to the above construction, the resin projection 5a projecting downward from the resin block.
(See FIG. 9) or insulating spacer 6 (See FIG. 10)
, A narrow insulating space filled with the molding resin 4 can be maintained between the die pad portion 2a of the lead frame 2 and the heat sink 3, but on the other hand, the resin protrusion 5a, the insulating spacer 6, and the molding resin 4 The interface described below causes a problem of a decrease in dielectric strength as described below.

That is, the lead frame 2 (high voltage side)
When the molding resin 4 for sealing and the resin protrusions 5a or the insulating spacers 6 coexist in a narrow insulating space between the heat sink 3 and the heat sink 3 (ground side) opposed thereto. In addition, through dielectric breakdown easily occurs along the interface of the composite material. Regarding the dielectric breakdown characteristics of this interface, see the paper "Dielectric breakdown characteristics of the interface between epoxy cast resin and embedded material."
(Kenya Kadoya, 4 others: published in the proceedings of the lecture meeting of the Institute of Electrical Engineers of Japan, Tokyo Section Meeting). The interface between different resins with different ratios is also affected by treeing dielectric breakdown caused by unequal electric field concentration, which results in a breakdown voltage of about 30% compared to the dielectric strength of the resin alone.
Is also greatly reduced.

In this respect, in the configurations shown in FIGS. 9 and 10, the lead frame 2 and the heat sink 3 face each other on a flat surface with a narrow insulating space. Therefore, the interface length between the different kinds of resins extending between the lead frame 2 and the heat sink 3 is only 100 to 100 in accordance with the narrow insulation interval.
It is about 300 μm. Therefore, if the semiconductor device is energized as it is, through insulation breakdown may occur between the lead frame 2 and the heat sink 3 along the interface between the resins along with the interface between the resins, which may cause insulation failure.

[0010] The present invention has been made in view of the above points, and it is possible to obtain a high heat dissipation property by suppressing a heat transfer resistance between a lead frame and a heat sink, while ensuring a high dielectric strength between them. It is an object of the present invention to provide a highly reliable resin-encapsulated semiconductor device improved as described above.

[0011]

In order to achieve the above object, in the present invention, a resin-sealed semiconductor device is constructed as follows. (1) According to the first aspect of the present invention, a semiconductor chip, a lead frame on which the semiconductor chip is mounted, and a heat sink opposed to each other with a narrow insulating space on the back surface side of the die pad portion of the lead frame are provided. In a resin-sealed semiconductor device in which members are integrally sealed with a molding resin,
At least one of the die pad portion of the lead frame and the heat sink has a convex portion bulging toward the facing member, and the end surface and the peripheral surface of the convex portion are covered with an insulating resin layer. In a state in which the frames are overlapped, the peripheral area thereof is sealed with a molding resin, and as a specific embodiment, the insulating resin layer has a thickness corresponding to the insulating interval on the surface of the projection. It is formed by coating an adhesive insulating sheet having good heat conductivity (Claim 2), or by coating a liquid resin having good heat conductivity on the surface of the projection to a thickness corresponding to the insulation interval (Claim 3). ).

According to the above configuration, a narrow insulation space (50-300 μm) serving as a heat radiation path between the die pad portion of the lead frame on which the semiconductor chip is mounted and the heat sink.
m) is formed in the end face region of the convex portion, whereas in the region deviated from the convex portion which hardly contributes to heat dissipation of the semiconductor chip, the distance between the lead frame and the heat sink is increased (for example, 500 to 2000 μm). ). Then, the end face and the peripheral face of the convex portion are covered with a uniform insulating resin having good heat conductivity, and the outer peripheral side is sealed with a molding resin. And no interface is present in the region of the narrow insulation gap.

Accordingly, while the thermal resistance in the heat radiation path region between the lead frame and the heat sink is kept low, the length of the interface between the resin extending between the lead frame and the heat sink is increased. The resulting dielectric breakdown voltage is increased and the dielectric strength is enhanced. (2) Further, according to the invention of claim 4, the semiconductor chip, a lead frame on which the semiconductor chip is mounted, and a heat sink opposed to the back side of the die pad portion of the lead frame with a narrow insulating interval, In a resin-sealed semiconductor device in which an insulating spacer for maintaining an insulating interval is interposed between a die pad portion of a lead frame and a heat sink, and each of the members including the insulating interval is sealed with a molding resin, At least one member of the die pad portion of the frame and the heat sink is formed with a convex portion bulging toward the facing member, and the insulating spacer is disposed outside the convex portion to provide a space between the heat sink and the lead frame. It is assumed that the insulating spacer is inserted and sealed in this state by molding resin. An adhesive insulating sheet or a cured resin piece is used (Claim 5).
In addition, there is a configuration in which a narrow insulating space between a die pad portion of a lead frame and a heat sink opposed to the die pad portion is sealed with a good heat conductive insulating resin layer different from the molding resin.

According to this structure, the interface between the sealing resin and the insulating spacer is formed in a region where the gap between the outer peripheral region of the convex portion and the narrow insulating interval is deviated from the narrow insulating interval. Will no longer exist. Therefore, the interface length is increased and the high dielectric strength is ensured, as in the configuration of the above item (1).

[0015]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below with reference to the embodiments shown in FIGS. In the illustrated embodiment, the same reference numerals are given to the same members corresponding to FIGS. [Embodiment 1] FIG. 1 shows an embodiment corresponding to claim 1 of the present invention. The semiconductor device of this embodiment is basically the same as the conventional configuration shown in FIG. 8, but in particular, the heat sink 3 is provided with a lead in the area directly under the semiconductor chip 1 facing the die pad portion 2a of the lead frame 2. Frame 2
A convex portion 3a bulging toward the back surface of the convex portion 3a is formed, and an end surface (top surface) and a peripheral surface of the convex portion 3a
Then, the lead frame 2 on which the semiconductor chip 1 is mounted is mounted on the projection 3a, and in this state, the peripheral area of each member is sealed with the molding resin 4.

Here, in the illustrated assembly structure, the die pad portion 2a of the lead frame 2 and the convex portion 3a of the heat sink 3
The narrow insulation distance d that functions as a heat transfer path between
Assuming that the thickness is set to about 0 to 300 μm, a highly heat-conductive adhesive insulating sheet having a thickness corresponding to the insulation interval d is applied so as to seamlessly cover the end surface and the peripheral surface of the convex portion 3a, or Alternatively, an epoxy resin ([lambda] = 3 to 3.5 W) having an increased thermal conductivity by mixing an inorganic filler (such as crystalline silica) as a liquid resin (cationically polymerized epoxy resin).
/ MK) on the end surface and the peripheral surface of the convex portion 3a to form the insulating resin layer 7. The height h of the projection 3a is set to 100 μm to 2 mm, and the distance between the lead frame 2 and the heat sink 3 is d + h in the outer peripheral area of the projection 3a.
To expand.

According to this structure, the interface between the molding resin 4 and the insulating resin layer 7 extending between the lead frame 2 and the heat sink 3 is formed on the outer peripheral side of the projection 3a, and the interface length (d + h) is narrow. It is 6 to 10 times larger than the insulating distance d. As a result, through dielectric breakdown which occurs at the time of voltage application due to the interface between the molding resin 4 and the insulating resin layer 7 does not easily occur without increasing the heat transfer resistance between the lead frame 2 and the heat sink 3, The dielectric strength is improved as compared with the structure.

[Embodiment 2] FIG. 2 shows an applied embodiment of Embodiment 1 described above. In this embodiment, a projection 2b bulging toward the heat sink 3 is formed on the die pad 2a of the lead frame 2 in a direction opposite to FIG. Then, a narrow insulation space serving as a heat radiation path of the semiconductor chip 1 is secured between them. Here, the insulating interval d covered by the insulating resin layer 7 and the height h of the convex portion 2b are the same as those in the first embodiment.
Is set in the same manner as described above.
High heat dissipation and high dielectric strength can be secured between the heat sink 3 and the heat sink 3.

[Embodiment 3] FIG. 3 shows an application embodiment which is further different from Embodiment 2, in which a convex surface facing a back surface of a die pad 2a of a lead frame 2 and an upper surface of a heat sink 3 respectively. Part 2b,
3a are formed, and the end surfaces and the peripheral surfaces of the protrusions 2b and 3a are sealed with an insulating resin layer 7. Then, the end surfaces of the protrusions 2b and 3a are overlapped and a heat radiation path of the semiconductor chip 1 is provided therebetween. By maintaining a narrow insulation interval, high heat dissipation and high dielectric strength between the lead frame 2 and the heat sink 3 are ensured.

FIGS. 4A to 4C show modified examples of the lead frame 2 applied to the second and third embodiments. Here, FIGS. 4 (a) and 4 (b) show a doubly supported, cantilevered lead frame in which a die pad portion 2a is bent into a U-shaped cross section to form a convex portion 2b. Denotes a cantilevered lead frame in which a beam protrudes from one side of the thick convex portion 2b. The end surface and the peripheral surface of the convex portion 2b are covered with an insulating resin layer 7.

FIGS. 5A and 5B show a modification of the heat sink 3 applied to the first embodiment.
FIG. 5B shows a structure in which the convex portion 3a is offset to the end of the heat sink 3, and FIG. 5B shows a structure in which the heat sink 3 is sized to correspond to the die pad portion 2a of the lead frame.
It has a structure in which the peripheral surface is covered with an insulating resin layer 7. [Embodiment 4] FIG. 6 shows an embodiment corresponding to claim 4 of the present invention. In this embodiment, the die pad portion 2a of the lead frame 2 is provided on the upper surface side of the heat sink 3.
In the same manner as in the first embodiment described above, a convex portion 3a is formed in a bulging manner, and pad-like insulating spacers 6 are arranged at positions (for example, four corners) on the outer peripheral side of the convex portion 3a. Die pad portion 2a of the lead frame via spacer 6
A narrow insulation space serving as a heat dissipation path is secured between the heat sink 3 and the heat sink 3. Then, in this assembled state, the members are sealed with the molding resin 4, and the narrow insulating gap between the lead frame 2 and the heat sink 3 is filled with the resin 4.

Here, the height h of the protrusion 3a of the heat sink 3 is set to 100 μm to 2 mm, and the narrow insulation interval d is set to 50 to 3 mm.
The height H of the spacer 6 is set to h + d. The insulating spacer 6 has an insulating sheet coated with an adhesive on both sides or a cured resin piece (this resin piece is a molding resin 4, the insulating resin layer 7 described in the first to third embodiments).
Same or different resin).

With such a configuration, in the assembled state in which the molding resin 4 is sealed, the interface between the molding resin 4 and the insulating spacer 6 is formed in a region where the interval is deviated from the convex portion 3a. The interface length between the molding resin 4 and the insulating spacer 6 extending between the lead frame 2 and the heat sink 3 is increased 6 to 10 times as compared with the conventional structure shown in FIG. This makes it difficult for through dielectric breakdown to occur when a voltage is applied due to the interface between the sealing resin 4 and the insulating spacer 6,
The dielectric strength is improved as compared with the conventional structure.

The above-mentioned convex portion may be formed on the back surface side of the die pad portion of the lead frame, instead of being formed on the heat sink side. [Embodiment 5] Next, FIGS. 7 (a) to 7 (c) show some applications of the embodiment 4 described above. That is, in the embodiment of FIG. 6, the entire structure including the narrow insulating space between the die pad portion 2a of the lead frame 2 and the convex portion 3a of the heat sink 3 is sealed with the molding resin 4. On the other hand, in this embodiment, the narrow space between the lead frame 2 and the peripheral surface area of the projection 3a is sealed with the insulating resin layer 7 having good heat conductivity separately from the sealing with the molding resin 4. ing. The insulating resin layer 7 can be formed by coating the liquid resin described in the first embodiment.

Here, FIG. 7A shows that the insulating resin layer 7 is
7A, the insulating resin layer 7 is filled up to the inside of the insulating spacer 6 in FIG.
In FIG. 7C, the insulating resin layer 7 is filled up to the region outside the insulating spacer 6.

[0026]

As described above, according to the present invention, a semiconductor chip, a lead frame on which the semiconductor chip is mounted, and a heat sink opposed to each other on the back side of the die pad portion of the lead frame with a narrow insulating space therebetween. In a resin-encapsulated semiconductor device in which each of these members is integrally sealed with a molding resin, (1) at least one of a die pad portion of a lead frame and a heat sink protrudes toward an opposing member. While forming a portion, the end surface and the peripheral surface of the convex portion are covered with an insulating resin layer, and the peripheral region is sealed with a molding resin in a state where the lead frame is overlaid on the heat sink.

(2) A resin in which an insulating spacer for maintaining an insulating interval is interposed between a die pad portion of a lead frame and a heat sink, and the members including the insulating interval are integrally sealed with a molding resin. In a sealed type semiconductor device, at least one of a die pad portion of a lead frame and a heat sink has a convex portion bulging toward an opposing member, and an insulating spacer for maintaining an insulating interval is arranged outside the convex portion. Then, a narrow insulating space is maintained between the heat sink and the lead frame, and in this state, sealing is performed with a molding resin.

According to the above configuration, a narrow insulation space (50 to 300 μm) serving as a heat radiation path between the die pad portion of the lead frame on which the semiconductor chip is mounted and the heat sink.
m) is formed in the end face region of the convex portion, while the space between the lead frame and the heat sink is increased (for example, 500 to 2000 μm) in the outer region of the convex portion that hardly contributes to heat dissipation of the semiconductor chip. I do. Therefore, in the assembled state in which each member is entirely sealed with the molding resin, the interface between the insulating resin and the sealing resin covering the peripheral surface of the convex portion or the interface between the insulating spacer and the sealing resin has an increased interval. An interface which is formed in a region and has a narrow insulation gap does not exist as a weak point of the dielectric strength.

Thus, the withstand voltage of penetration breakdown caused by the interface between the lead frame and the resin extending between the lead frame and the heat sink can be reduced while maintaining the thermal resistance in the heat radiation path region between the lead frame and the heat sink low. This makes it possible to provide a resin-encapsulated semiconductor device which is significantly improved in comparison with the above and has excellent heat dissipation and dielectric strength.

[Brief description of the drawings]

FIG. 1 is a configuration sectional view of a resin-sealed semiconductor device according to a first embodiment of the present invention;

FIG. 2 is a configuration sectional view of a resin-sealed semiconductor device according to a second embodiment of the present invention;

FIG. 3 is a configuration sectional view of a resin-encapsulated semiconductor device according to a third embodiment of the present invention;

FIG. 4 shows a modified embodiment of the lead frame applied to the second and third embodiments, wherein (a) to (c) are cross-sectional views of different embodiments.

FIG. 5 shows a modified embodiment of the heat sink applied to the first to fourth embodiments, and (a) and (b) are cross-sectional views of different embodiments.

FIG. 6 is a configuration sectional view of a resin-sealed semiconductor device according to a fourth embodiment of the present invention;

7A and 7B show a configuration of a resin-sealed semiconductor device corresponding to a fifth embodiment which is an applied embodiment of the fourth embodiment, and FIGS. 7A to 7C are cross-sectional views of different embodiments.

FIG. 8 is a configuration sectional view of a conventional resin-encapsulated semiconductor device.

9 is a cross-sectional view of a configuration of another conventional resin-encapsulated semiconductor device different from FIG.

FIG. 10 is a sectional view showing the configuration of another conventional resin-encapsulated semiconductor device different from that of FIG. 9;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Semiconductor chip 2 Lead frame 2a Die pad part 2b Convex part 3 Heat sink 3a Convex part 4 Molding resin 6 Insulating spacer 7 Insulating resin layer

Continuation of the front page (72) Inventor Yoshinari Ikeda 1-1, Tanabe Nitta, Kawasaki-ku, Kawasaki-shi, Kanagawa Prefecture Fuji Electric Co., Ltd.

Claims (6)

[Claims] 1. A semiconductor device comprising: a semiconductor chip; a lead frame on which the semiconductor chip is mounted; and a heat sink opposed to a back surface of a die pad portion of the lead frame with a narrow insulating space therebetween, and these members are integrally formed. In a resin-sealed semiconductor device sealed with a resin, at least one of a die pad portion of a lead frame and a heat sink has a convex portion bulging toward an opposing member, and an end face and a peripheral portion of the convex portion. A resin-encapsulated semiconductor device, the surface of which is covered with an insulating resin layer, and a peripheral region thereof is sealed with a molding resin in a state where a lead frame is overlaid on a heat sink. 2. The semiconductor device according to claim 1, wherein an insulating resin layer is formed by covering a surface of the projection with a good heat conductive adhesive insulating sheet having a thickness corresponding to an insulating interval. Resin-encapsulated semiconductor device. 3. The semiconductor device according to claim 1, wherein the surface of the projection is coated with a liquid resin having good thermal conductivity to a thickness corresponding to the insulating interval to form an insulating resin layer. Stop type semiconductor device. 4. A semiconductor device comprising: a semiconductor chip; a lead frame on which the semiconductor chip is mounted; and a heat sink opposed to the back side of the die pad portion of the lead frame with a narrow insulating space therebetween. In a resin-encapsulated semiconductor device in which an insulating spacer for maintaining an insulation interval is interposed between the semiconductor device and each member including the insulation interval is integrally sealed with a molding resin, a die pad portion of a lead frame, On at least one member of the heat sink, a convex portion bulging toward the facing member is formed, and the insulating spacer is arranged outside the convex portion and inserted between the heat sink and the lead frame,
A resin-sealed semiconductor device characterized by being sealed with a molding resin in this state. 5. The semiconductor device according to claim 4, wherein an adhesive insulating sheet or a cured resin piece is used for the insulating spacer. 6. The semiconductor device according to claim 4, wherein a narrow insulating space between the peripheral surface of the convex portion and the die pad portion of the lead frame and the heat sink opposed thereto is provided with a good heat transfer property different from the molding resin. A resin-encapsulated semiconductor device characterized by being sealed with an insulating resin layer.