JPH11233762A - Semiconductor device and its manufacture - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent generation of microcrystal in doped amorphous silicon in formation of a gate electrode, and prevent substrate digging at the time of gate patterning. SOLUTION: In this manufacturing method, after a gate oxide film 102 is formed, an undoped amorphous silicon film 103 is formed. A doped amorphous silicon film 104 which is doped with phosphorus controlled to be 2×10<20> cm<-3> and turns to a gate electrode is continuously formed in the same equipment. A gate electrode 106 is formed by patterning by using a resist pattern 105, and a field effect transistor is formed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor device and a method for manufacturing the same.

[0002]

2. Description of the Related Art The performance and functions of semiconductor devices have been improved by miniaturization of processing accuracy and higher integration. Although miniaturization of the device dimensions needs to be accompanied by miniaturization in the film thickness direction, in actuality, the electrical characteristics and reliability of the device may be reduced. In recent years, a doped silicon film is sometimes used for a gate electrode used in a CMOS or DRAM process. The doped silicon film is formed by a gas phase reaction by introducing a dopant gas such as SiH ₄ gas and PH _{3 and} a carrier gas such as N ₂ into a reaction chamber by using vertical reduced pressure CVD.

[0003]

However, when the above conventional technique is used, when the phosphorus concentration used in the gate electrode is 4 to 8 × 10 ²⁰ cm ^-3 , the phosphorus concentration is low even when the deposition is completed in a completely amorphous state. However, at 1-3 × 10 ²⁰ cm ⁻³ , microcrystals are generated in the doped silicon film. When microcrystals are present in the film, when the gate electrode is formed by dry etching, the region of the microcrystal portion is etched faster than the amorphous region, and the substrate is dug through the gate oxide film below the microcrystal.

FIG. 3 shows this state. Silicon substrate 30
A gate oxide film 302 is formed on 1 by thermal oxidation. Next, an impurity concentration of 1-3 × 10 ²⁰ cm is formed on the gate oxide film 302.
^-3 doped amorphous silicon 303 is formed.
When the doped amorphous silicon 303 is formed with a vertical pressure-reduced CVD apparatus at an impurity concentration of 1 to 3 × 10 ²⁰ cm ⁻³ , microcrystals 304 are mixed in the doped amorphous silicon 303 as shown in FIG. . When this film is dry-etched, the microcrystal 304 is etched earlier than the doped amorphous silicon 303, as shown in FIG. 3B, and penetrates through the gate oxide film 302 as shown in FIG. Etching up to 301 causes substrate digging 305. Since the source and drain portions of the field effect transistor are formed in the substrate dug 305, the reliability of the transistor is reduced.

In order to solve this problem, to deposit the completely amorphous doped amorphous silicon 303, the temperature must be lowered by 20 to 30 ° C. However, the film forming rate is reduced to less than half and the productivity is reduced. Is reduced. Therefore, it is completely amorphous without lowering the productivity, and the phosphorus concentration is 1-3 × 10 5
It has been desired that a doped amorphous silicon film capable of forming a ²⁰ cm ^-3 doped silicon film can be formed, and the doped amorphous silicon film can be used for a gate electrode.

In view of the above problems, an object of the present invention is to provide a semiconductor device capable of suppressing generation of microcrystals at the time of forming a gate electrode and preventing digging of a substrate, and a method of manufacturing the same.

[0007]

In order to achieve the object of the present invention, according to the present invention, a gate electrode is patterned by forming doped amorphous silicon used as a gate electrode under conditions in which microcrystals are not mixed. At that time,
This enables uniform etching during dry etching.

According to a first aspect of the present invention, there is provided a semiconductor device comprising a semiconductor substrate, a gate insulating film formed on a surface of the semiconductor substrate, and a gate electrode formed on the gate insulating film. The semiconductor device is characterized in that the impurity concentration above the gate electrode is higher than the impurity concentration. According to the semiconductor device of the first aspect, generation of microcrystals can be prevented by reducing the impurity concentration at the bottom of the gate electrode, and substrate digging that penetrates the gate insulating film by etching when forming the gate electrode is prevented. be able to. Therefore, it is possible to form a doped amorphous silicon film capable of forming a doped amorphous silicon film having a completely amorphous phase and a phosphorus concentration of 1 to 3 × 10 ²⁰ cm ⁻³ without lowering the productivity. Can be used for electrodes.

According to a second aspect of the present invention, a semiconductor device includes a semiconductor substrate, a gate insulating film formed on a surface of the semiconductor substrate, and a gate electrode formed on the gate insulating film. Impurity concentration is 0 to 1 × 10 ²⁰ c
m ⁻³ , and the impurity concentration above the gate electrode is 1 to 8 ×
A 10 ²⁰ cm ^-3, in which being greater than the impurity concentration of the bottom.

According to the semiconductor device of the second aspect, the same effect as that of the first aspect is obtained. According to a third aspect of the present invention, in the first or second aspect, the impurity added to the gate electrode is phosphorus, arsenic, boron, or antimony. According to the semiconductor device of the third aspect,
There is an effect similar to that of claim 1 or claim 2.

According to a fourth aspect of the present invention, there is provided a method of manufacturing a semiconductor device.
A step of forming a gate insulating film on a semiconductor substrate, a step of forming a first amorphous silicon film containing impurities on the gate insulating film, and an impurity concentration of the first amorphous silicon film on the first amorphous silicon film Forming a second amorphous silicon film larger than the first amorphous silicon film, forming a mask pattern in a gate electrode formation region on the second amorphous silicon film, and then using the mask pattern to form the first amorphous silicon film and the second amorphous silicon film. This includes a step of forming a gate electrode by performing a series of etchings on the amorphous silicon film.

According to the method of manufacturing a semiconductor device of the present invention, when forming the amorphous silicon to be the gate electrode, first, for example, the impurity concentration is 0 to 1 × 10 ²⁰ cm.
^-3 amorphous silicon film is formed, followed by the growth of amorphous silicon having an impurity concentration of, for example, 1 to 8 × 10 ²⁰ cm ⁻³ , which causes substrate digging during dry etching after gate patterning. Can be prevented. In addition, since it can be handled without largely changing the film forming conditions, a decrease in productivity can be prevented.

According to a fifth aspect of the present invention, there is provided a method of manufacturing a semiconductor device.
5. The method according to claim 4, wherein the first amorphous silicon film has an impurity concentration of 0 to 1 × 10 ²⁰ cm ⁻³ and a thickness of 5 to 50 nm.
The second amorphous silicon film has an impurity concentration of 1 to 8 × 10 ²⁰ cm ⁻³ and a thickness of 150 to 400 nm. According to the method of manufacturing a semiconductor device according to the fifth aspect, the same effect as that of the fourth aspect is obtained.

According to a sixth aspect of the present invention, there is provided a method of manufacturing a semiconductor device.
In claim 5, the thickness of the first amorphous silicon film is about 20 to 30 nm, and the thickness of the second amorphous silicon film is about 200 to 350 nm. According to the method of manufacturing a semiconductor device of the sixth aspect, there is an effect more excellent than that of the fifth aspect.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to FIGS. As shown in FIG. 1, a semiconductor device according to this embodiment includes a silicon substrate 101 as a semiconductor substrate and a gate oxide film 102 as a gate insulating film formed on the surface of the silicon substrate 101.
And a gate electrode 106 formed perpendicularly to the gate oxide film 102, wherein the impurity concentration at the top of the gate electrode 106 is higher than the impurity concentration at the bottom of the gate electrode 106. Here, the impurity concentration at the bottom of the gate electrode 106 is 0 to 1 × 10 ²⁰ cm ⁻³ , and if it is higher than this, there is a problem that microcrystals are generated. The impurity concentration at the bottom is preferably 0 (undoped). The impurity concentration of the gate electrode is 1 to 8 × 10 ²⁰ cm ^−3, which includes the conventional phosphorus concentration. However, when the impurity concentration is higher than the maximum value, there is a problem of impurity deposition. The problem arises.

The impurities added to the gate electrode 106 include phosphorus, arsenic, boron, and antimony. Next, as shown in FIGS. 1A and 1B, a method for manufacturing a semiconductor device, particularly a method for forming a gate electrode, includes the steps of forming a gate oxide film 102 on a silicon substrate 101, Forming an undoped amorphous silicon gate oxide film 103 as a first amorphous silicon film on the undoped amorphous silicon gate oxide film 103; and forming an impurity concentration on the undoped amorphous silicon gate oxide film 103 higher than the impurity concentration of the undoped amorphous silicon gate oxide film 103. A doped amorphous silicon gate oxide film 10 as an amorphous silicon film
4 and forming a resist pattern 105 as a mask pattern in a gate electrode formation region on the doped amorphous silicon gate oxide film 104, and using this resist pattern 105, an undoped amorphous silicon gate oxide film 103 and a doped And forming a columnar gate electrode 106 by performing a series of etchings on the amorphous silicon gate oxide film 104.

Here, undoped amorphous silicon
The gate oxide film 103 has an impurity concentration of 0 to 1 × 10²⁰cm
^-3And the film thickness is 5 to 50 nm, but the film thickness is not less than the maximum value.
In this case, a problem of depletion of the gate electrode occurs. Also, the minimum
Below this value, the number of microcrystals increases as shown in FIG.
And preferably in the range of about 20 to 30 nm. Also do
Doped amorphous silicon gate oxide film 104 is impure
Material concentration is 1-8 × 10 ²⁰cm^-3And the film thickness is 150 to 400
nm, but when the film thickness exceeds the maximum value, microcrystals are generated.
The problem arises. In addition, below the minimum value, electrode depletion
Problem arises. Preferably about 200-350n
The range of m is good.

Next, an example of this embodiment will be described. Here, evaluation was performed by vertical type reduced pressure CVD. FIG. 1 shows a cross-sectional view flow of a prototype wafer. FIG. 1 (a)
A 7-nm-thick gate oxide film 102 is formed on the surface of an 8-inch silicon substrate 101 by dry oxidation at 900 ° C. Next, in a vertical type reduced pressure CVD apparatus, the temperature was kept at 530 ° C., SiH ₄ gas was flowed at 1000 cc, and the pressure was increased to 130
Control to Pa. In this state, an undoped amorphous silicon film 103 of 0 to 40 nm is deposited. PH ₃ gas was further introduced into the same apparatus, and 2 × 10 ²⁰ cm ⁻³
Is deposited, and a resist pattern 105 transferred to a predetermined pattern is formed in the gate electrode formation region by using photolithography.

Next, as shown in FIG. 1B, the doped amorphous silicon 104 and the undoped amorphous silicon 103 are etched to form the gate electrode 10.
6 is formed. After that, the resist pattern 105 is removed, and a gate of the transistor is formed. Note that in a field-effect transistor, a source and a drain are formed on both sides of a gate electrode.

The determination as to whether the silicon was completely amorphous without mixed microcrystals was made by dry etching the amorphous silicon after forming the film, evaluated using a surface pattern defect device, and confirmed by in-line SEM. FIG.
Shows the relationship between the thickness of the undoped amorphous silicon 103 and the number of surface defects. Without undoped amorphous silicon on the horizontal axis, 10 nm, 20 nm, 3
The vertical axis indicates the number of defects in an 8-inch wafer with a 0 nm film formed. Further, the film formation temperature is set to 520 ° C., 530
At 540 ° C. By forming the undoped layer in this manner, the doped amorphous silicon film 104 is formed.
It was confirmed that no fine crystals were generated therein. This doped amorphous silicon film 104 is
By using as 6, the substrate digging through the gate oxide film 102 can be prevented.

According to this embodiment, when a doped silicon film is formed, an undoped amorphous silicon film is formed, and a doped amorphous silicon film is formed continuously. A highly doped amorphous silicon film can be formed, the substrate can be prevented from digging through the gate oxide film at the time of dry etching at the time of patterning amorphous silicon, and the reliability of the field effect transistor can be improved. . Further, since it is not necessary to largely change the film forming conditions of the doped amorphous silicon film, the productivity does not decrease.

Although the present embodiment is directed to a silicon wafer, the present invention can be applied to an SOS substrate, an SOI substrate, and the like. Although a thermal oxide film is used for the gate insulating film, it goes without saying that the same effect can be obtained by using another insulating film such as an oxynitride film or an HTO film. Also,
Vertical type low pressure CVD for forming amorphous silicon film
Although the apparatus is used, it goes without saying that the same effect can be obtained by using another CVD apparatus such as a single wafer apparatus.

The doped amorphous silicon film 1
04 was 2 × 10 ²⁰ cm ⁻³ , but 1-8 × 10
It goes without saying that the same effect can be obtained even in the concentration range of ²⁰ cm ^-3 . Here, the invention described in the claims is not limited to the mode described in the above embodiment.

[0024]

According to the semiconductor device of the first aspect, the generation of microcrystals can be prevented by reducing the impurity concentration at the bottom of the gate electrode, and the gate electrode penetrates the gate insulating film by etching when the gate electrode is formed. Substrate digging can be prevented. Therefore, it is possible to form a doped amorphous silicon film capable of forming a doped amorphous silicon film having a completely amorphous phase and a phosphorus concentration of 1 to 3 × 10 ²⁰ cm ⁻³ without lowering the productivity. Can be used for electrodes.

According to the semiconductor device of the second aspect, the same effect as that of the first aspect is obtained. According to the semiconductor device of the third aspect, the same effect as that of the first or second aspect is obtained.
According to the method of manufacturing a semiconductor device according to the fourth aspect, when forming amorphous silicon to be a gate electrode, first, for example, an amorphous silicon film having an impurity concentration of 0 to 1 × 10 ²⁰ cm ⁻³ is formed. By continuously growing, for example, amorphous silicon having an impurity concentration of 1 to 8 × 10 ²⁰ cm ⁻³ , it is possible to prevent the generation of microcrystals that cause substrate digging during dry etching after gate patterning. . In addition, since it can be handled without largely changing the film forming conditions, a decrease in productivity can be prevented.

According to the method of manufacturing a semiconductor device according to the fifth aspect, the same effect as that of the fourth aspect is obtained. According to the method of manufacturing a semiconductor device of the sixth aspect, there is an effect more excellent than that of the fifth aspect.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view of one embodiment of a method for forming a gate electrode, that is, a method for forming a doped amorphous silicon film according to the present invention.

FIG. 2 is a diagram showing the relationship between the thickness of an undoped layer and the number of defects after dry etching in one embodiment of the method for forming a doped amorphous silicon film of the present invention.

FIG. 3 is a process cross-sectional view when a doped amorphous silicon film is formed by a conventional method.

[Explanation of symbols]

 Reference Signs List 101 silicon substrate which is a semiconductor substrate 102 gate oxide film 103 undoped amorphous silicon film 104 doped amorphous silicon film 105 resist pattern 106 gate electrode 301 silicon substrate 302 gate oxide film 303 doped amorphous silicon 304 microcrystal 305 substrate excavation

Claims (6)

[Claims] A semiconductor substrate, a gate insulating film formed on a surface of the semiconductor substrate, and a gate electrode formed on the gate insulating film, wherein the gate electrode has an impurity concentration lower than an impurity concentration at a bottom of the gate electrode. A semiconductor device having a high impurity concentration above an electrode. 2. A semiconductor device comprising: a semiconductor substrate; a gate insulating film formed on a surface of the semiconductor substrate; and a gate electrode formed on the gate insulating film, wherein the impurity concentration at the bottom of the gate electrode is 0 to 1 × 10 ²⁰ cm ^-3 , the impurity concentration at the top of the gate electrode is 1 to 8 × 10 ²⁰ cm ^-3 ,
A semiconductor device, wherein the impurity concentration is higher than the impurity concentration at the bottom. 3. The semiconductor device according to claim 1, wherein the impurity added to the gate electrode is phosphorus, arsenic, boron, or antimony. A step of forming a gate insulating film on the semiconductor substrate; a step of forming a first amorphous silicon film on the gate insulating film; Forming a second amorphous silicon film having a higher impurity concentration than that of the first amorphous silicon film, and forming a mask pattern in a gate electrode formation region on the second amorphous silicon film; A method for manufacturing a semiconductor device, comprising: forming a gate electrode by performing a series of etchings on the first amorphous silicon film and the second amorphous silicon film. 5. The method according to claim 1, wherein the first amorphous silicon film has an impurity.
The concentration is 0 to 1 × 10 ²⁰cm^-3And the film thickness is 5 to 50 nm.
The second amorphous silicon film has an impurity concentration of 1 to 1.
8 × 10²⁰cm^-3With a film thickness of 150 to 400 nm
A method for manufacturing a semiconductor device according to claim 4. 6. The method according to claim 5, wherein the first amorphous silicon film has a thickness of about 20 to 30 nm, and the second amorphous silicon film has a thickness of 200 to 350 nm.