JPH11220052A - Semiconductor element mounting structure and wiring board mounting structure - Google Patents

Abstract

(57) Abstract: Provided is a long-term stable mounting structure of a wiring board having a high thermal expansion characteristic on which a semiconductor element having low thermal expansion is mounted on an external electric circuit board such as a printed board. A ceramic substrate having a thermal expansion coefficient of 8 to 25 ppm / .degree. C. at -40.degree. C. to 80.degree. C., a metallized wiring layer 2, and a wiring substrate B are provided on an insulating substrate containing an organic resin. In the mounting structure of the wiring board in which the connection terminals 3 are soldered to the wiring conductor 6 of the external electric circuit board C having the wiring conductor 6 attached to the surface of the wiring board B, The semiconductor element A provided with the connection electrode 8 on the bottom surface is placed, and the metallized wiring layer 2 of the wiring board B and the connection electrode 8 of the semiconductor element A are brazed. The resin layer 10 is formed by applying a resin composition having a thermal expansion coefficient of 10 to 60 ppm / ° C. at a temperature of from 80 ° C. to 80 ° C. and a Young's modulus of 3 to 30 GPa in the above temperature range.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a mounting structure in which a semiconductor element is soldered and mounted on a surface of a wiring board provided with an insulating substrate and a metallized wiring layer, and an improved mounting structure of a wiring board in which the semiconductor element is mounted. It is about.

[0002]

2. Description of the Related Art Generally, a wiring board has a structure in which a metallized wiring layer is provided on the surface or inside of an insulating substrate. As a typical example of the wiring board, a package for accommodating a semiconductor element, particularly a semiconductor element such as an LSI (Large Scale Integrated Circuit) is generally provided on the surface and inside of an insulating substrate made of ceramics such as alumina. , A metallized wiring layer is provided and electrically connected to a semiconductor element mounted on the surface. Further, a connection terminal for electrically connecting to an external electric circuit board is provided on a lower surface or a side surface of the insulating substrate, and the connection terminal is electrically connected to the metallized wiring layer.

In such a package for housing semiconductor elements, connection terminals provided on the lower surface or side surfaces of the insulating substrate and wiring conductors formed on the surface of the external electric circuit substrate are electrically connected by soldering or the like. It is implemented by doing.

Recently, with the increase in the degree of integration of semiconductor devices, it is necessary to increase the number of terminals in a package on which the semiconductor device is mounted. It is necessary to do.

[0005] Conventionally, as a structure of a connection terminal of a package, a pin grid array (PGA), a quad flat package (QFP), and a leadless chip carrier (LCC) have been mainly used. A ball grid array (B) provided with spherical terminals made of solder as connection terminals on the lower surface of the substrate as a substrate suitable for
GA) has been proposed.

In this BGA, a spherical terminal made of a brazing material such as solder is soldered to an electrode pad, and the spherical terminal is placed on and abuts on a wiring conductor of an external electric circuit board. It is mounted on an external electric circuit board by heating and melting at a temperature of 200 to 400 ° C. and joining the spherical terminal to the wiring conductor.

[0007]

However, the BGA
Alumina, which has been conventionally used as an insulating substrate,
When ceramics such as mullite are used, when they are surface-mounted on an external electric circuit board such as a printed circuit board containing an organic resin such as a glass-epoxy resin composite material, the heat generated during operation of the semiconductor element is generated between the insulating substrate and the external electric circuit board. Repeatedly applied to both, thermal stress is generated due to the difference in thermal expansion coefficient between the external electric circuit board and the insulating substrate, and due to this stress, the connection terminals are peeled off from the insulating substrate, and cracks and the like occur in the connection portion, There has been a problem that the wiring board cannot be stably mounted on the external electric circuit board for a long time.

Therefore, in place of conventional ceramics such as alumina and mullite, Japanese Patent Application Laid-Open Nos. 8-279574 and 8-3222038 disclose that an insulating substrate is formed of a high-thermal-expansion glass ceramic so that a wiring substrate and an external circuit are formed. The connection reliability was improved by reducing the thermal expansion difference with the electric circuit board.

However, when such a high thermal expansion material is used as an insulating substrate, a difference in thermal expansion coefficient from a semiconductor element made of silicon (thermal expansion coefficient: 2 to 3 ppm / ° C.) mounted on the surface of the wiring board is obtained. As a result, the thermal expansion difference between the semiconductor element and the wiring board causes adverse effects such as deformation of the wiring board due to the stress generated when the semiconductor element operates and stops, and the connection electrodes of the semiconductor element and the insulating substrate A new problem that a connection failure occurs with the metallized wiring layer provided in the semiconductor device.

[0010] Such a problem arises because the connection electrode provided on the bottom surface of the semiconductor element is connected to the metallized wiring layer on the surface of the wiring board by brazing, and the size of the semiconductor element is approximated to the size of the wiring board. This is particularly noticeable in packages and the like.

Accordingly, the present invention provides a highly reliable semiconductor which can maintain a strong and stable connection state for a long period of time when a semiconductor element is mounted on the surface of a ceramic wiring substrate having a high thermal expansion characteristic by brazing. An object of the present invention is to provide an element mounting structure.

Further, the present invention provides a highly reliable ceramic wiring board on which a semiconductor element is mounted, which can maintain a stable and stable connection state for a long period of time with an external electric circuit board having an insulating base containing an organic resin. It is an object of the present invention to provide a wiring board mounting structure.

[0013]

Means for Solving the Problems The present inventors have repeatedly studied a method of relaxing thermal stress generated when a semiconductor element is mounted on a wiring board by brazing or during operation of the semiconductor element. It has been found that by applying a resin having a high thermal expansion to the surface opposite to the surface on which the connection electrode is formed, warpage between the semiconductor element and the insulating substrate can be suppressed and stable mounting can be realized for a long period of time.

That is, the mounting structure of the semiconductor device of the present invention is as follows.
Thermal expansion coefficient at -40 ° C to 80 ° C is 8 to 25p
A semiconductor having a pm / ° C. ceramic insulating substrate, a metallized wiring layer disposed on the surface of the insulating substrate, and a wiring substrate provided with terminals for connection to an external electric circuit board, and a connection electrode provided on the bottom surface. An element is mounted, and a metallized wiring layer of the wiring substrate and a connection electrode of the semiconductor element are brazed.
A resin layer is formed by applying a resin composition having a thermal expansion coefficient at 10 ° C. of 10 to 60 ppm / ° C. and a Young's modulus in the temperature range of 3 to 30 GPa.

Further, the mounting structure of the wiring board of the present invention is as follows.
The coefficient of thermal expansion at 40 ° C to 80 ° C is 8 to 25 pp
A wiring board having a ceramic insulating substrate of m / ° C., a metallized wiring layer provided on the surface of the insulating substrate, and terminals for connection to an external electric circuit board is wired on the surface of an insulating base containing an organic resin. In a wiring board mounting structure in which the connection terminal is soldered to the wiring conductor of the external electric circuit board on which a conductor is attached, a connection electrode is provided on a bottom surface of the wiring board. Placed semiconductor element,
A metallized wiring layer of the wiring substrate and a connection electrode of the semiconductor element are brazed, and a coefficient of thermal expansion at −40 ° C. to 80 ° C. is 10 to 60 ppm / ° C. at a temperature of -40 ° C. to 80 ° C. Rate 3
It is characterized in that a resin layer coated with a resin composition of up to 30 GPa is formed.

[0016]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below in detail with reference to the accompanying drawings showing embodiments. FIG. 1 is a schematic sectional view showing an example of the mounting structure of the present invention. The wiring board of the present invention has a basic structure of a so-called wiring board in which a metallized wiring layer is provided on the surface or inside thereof. FIG. 1 shows a BGA type package as an example of the wiring board of the present invention. A is a semiconductor element, B is a BGA type package, and C is an external electric circuit board.

In FIG. 1, a package B has a metallized wiring layer 2 formed on the surface and inside of a ceramic insulating substrate 1, and a connection pad 3 is formed on the bottom surface of the package B. Is electrically connected to the metallized wiring layer 2 disposed on the surface and inside. In the BGA type package of FIG. 1, a spherical terminal 4 as a connection terminal is connected to the connection pad 3 by soldering or the like.

On the other hand, the external electric circuit board C is made of a so-called printed board, and is made of glass-epoxy resin, glass-
Cu, Au, Al, Ni, P on the surface of the insulating substrate 5 made of a material containing an organic resin such as a polyimide resin composite material.
A wiring conductor 6 made of a metal such as b-Sn is adhered and formed.

Then, the spherical terminals 4 of the package B are connected to the wiring conductors 6 of the external electric circuit board C by solder 7 or the like, and the package B is mounted on the surface of the external electric circuit board C.

In such a mounting structure, the insulating substrate 1 forming the package B is made of ceramics having a coefficient of thermal expansion of 8 to 25 ppm / ° C. at -40 ° C. to 80 ° C. This is necessary in order to obtain long-term connection reliability between the package B and the external electric circuit board C by approximating the thermal expansion coefficient of the external electric circuit board C having the insulating base 5 containing the organic resin. . Therefore, the insulating substrate 1
If the thermal expansion coefficient of the external electric circuit board C is smaller than 8 ppm / ° C. or larger than 25 ppm / ° C., the difference in thermal expansion with the external electric circuit board C increases, and the connection reliability is impaired by the stress caused by the difference in thermal expansion. That's why.

The semiconductor element A mounted on the surface of the package B is provided with a plurality of connection electrodes 8 on the bottom surface, and is electrically connected to the metallized wiring layer 2 on the surface of the package B by a brazing material such as solder. The underfill material 9 made of a thermosetting resin is generally connected therearound.
It is reinforced with.

According to the present invention, in the structure in which the semiconductor element A is mounted on the surface of the package B by brazing, the upper surface of the semiconductor element A, that is, the package B of the semiconductor element A is provided.
A resin composition having a high thermal expansion characteristic is applied to the surface opposite to the mounting surface to form a resin layer 10.

The resin layer 10 has a coefficient of thermal expansion at -40 ° C. to 80 ° C. of 10 to 60 ppm / ° C.,
It is important that it is 5 to 50 ppm / ° C., further 20 to 40 ppm / ° C., and that the Young's modulus in the above temperature range is 3 to 30 GPa, especially 5 to 20 GPa.

In the mounting structure according to the present invention, a compressive stress is generated in the semiconductor element A and a tensile stress is generated in the package B due to a difference in thermal expansion between the semiconductor element A having a low thermal expansion and the package B having a high thermal expansion. The package B is deformed by the stress, and the connection between the package B and the external electric circuit board C becomes unstable.

Therefore, according to the present invention, by forming the resin layer 10 having a high coefficient of thermal expansion and a Young's modulus on the surface of the semiconductor element A, the difference in the coefficient of thermal expansion between the resin layer 10 and the semiconductor element A is reduced. A compressive stress is generated in a direction opposite to a compressive stress generated due to a difference in thermal expansion between the semiconductor element A and the package B having a high thermal expansion, and these compressive stresses cancel each other out.
And the stress generated at the connection with the external electric circuit board C can be reduced.

If the coefficient of thermal expansion or the Young's modulus of the resin layer 10 is smaller than the above range, the effect of offsetting the stress due to the adhesion of the resin layer 10 is not sufficient, and the thermal expansion of the package B and the semiconductor element A is not sufficient. The package B warps due to the stress generated due to the coefficient difference, and high stress is generated at a connection portion with the external electric circuit board C.

When the coefficient of thermal expansion or Young's modulus of the resin layer 10 is larger than the above range, the stress generated between the resin layer 10 and the semiconductor element A is smaller than the stress generated between the semiconductor element A and the package B. As a result, the package B warps to the opposite side, and high stress is generated at the connection portion with the external electric circuit board C.

Examples of the material of the resin layer 10 include phenol resin, urea resin, melamine resin, epoxy resin, unsaturated polyester resin, diallyl phthalate resin, polyimide resin, silicone resin, polyurethane resin and the like. Among these, epoxy resins such as bisphenol epoxy resins, phenol novolak epoxy resins, cresol novolak epoxy resins, brominated epoxy resins, and epoxy resins such as alicyclic epoxy resins are particularly preferred.

In order to control the coefficient of thermal expansion and the Young's modulus of the resin layer 10 within the above ranges, an inorganic substance such as quartz glass, alumina, mica, zirconium silicate, lithium silicate, etc. is used as a filler in the resin. It can be adjusted by blending 25 to 300 parts by weight with respect to 100 parts by weight of the resin layer.

In the present invention, the resin layer 10 is formed on the surface of the semiconductor element A by mounting the semiconductor element A on a package B and then applying a resin composition to a predetermined thickness by a dispenser. Thereafter, the resin layer 10 can be formed by heating and curing at 100 to 200 ° C. with a dryer.

The package B of the present invention has a coefficient of thermal expansion of 8 to 25 ppm / ° C. and a Young's modulus of 200 G
The insulating substrate 1 having a pressure of Pa or less is formed, for example, by the method described in Japanese Patent Application No. 8-322.
No. 038, lithium silicate glass, PbO glass, ZnO glass, Ba
Enstatite, forsterite, forsterite and SiO ₂ filler, M
It is formed of a composite material of various ceramic fillers such as gO, ZrO ₂ and petalite.

For example, an organic binder is appropriately added to a mixed powder obtained by mixing 20 to 90% by volume of the glass and 80 to 10% by volume of the filler component to form a slurry, and the slurry is formed into a sheet. Thereafter, a conductor paste containing a low-resistance metal such as copper, gold, or silver is printed and applied to the surface of the sheet-shaped molded body. If desired, a through hole is formed at a predetermined position of the sheet-like molded body by a micro drill, a laser, or the like, and the hole is filled with the conductive paste. Then, after laminating and pressing a plurality of the sheet-shaped molded bodies to form a laminated body, the laminated body is degreased in a nitrogen atmosphere or a nitrogen atmosphere containing water vapor.
It can be manufactured by firing at a temperature of 00 ° C.

[0033]

EXAMPLES For various ceramic materials shown in Table 1, 5
After producing a sintered body having a shape of × 4 × 40 mm, the thermal expansion coefficient of each sintered body was measured. Table 1 shows the measured values.

A metallized wiring layer made of copper and a through-hole conductor are formed on each of the ceramic materials shown in Table 1, and a large number of semiconductor elements are connected to the through-hole conductors on the upper surface of the wiring board. Form electrode pads to be connected to the board, and on the bottom surface, form connection pads for connection to an external electric circuit board.Then, metallized wiring layers, through-hole conductors, electrode pads, and connection pads together with the insulating board At 950 ° C. in a nitrogen atmosphere to produce a wiring substrate.

Then, a spherical terminal made of a high melting point solder (Sn: Pb weight ratio = 10: 90) is connected to a connection pad on the bottom surface of the wiring board by a low melting point solder (Sn: Pb weight ratio = 63: 90).
37) to produce a wiring board. The manufactured wiring board was 13 mm × 13 mm in length × width and 0.3 mm in thickness.
4 mm.

After the electrode pad is plated with Ni, a semiconductor element made of Si having a thermal expansion coefficient of 2.6 ppm / ° C. at 0 to 40 ° C. is prepared for the electrode pad. After connecting and mounting the connection electrodes disposed on the bottom surface with low melting point solder, an underfill material (bisphenol A-based epoxy resin) is injected into the gap between the semiconductor element and the wiring board, and the temperature is 2 ° C. at 180 ° C. The semiconductor element was fixed to the wiring board by heat treatment and curing for a time.

Thereafter, on the upper surface of the semiconductor element mounted on the upper surface of the wiring board, quartz glass or alumina was mixed and kneaded with the thermosetting resin shown in Tables 2 and 3 at the ratios shown in Tables 2 and 3. Apply the paste with a dispenser,
After curing at 50 ° C., a resin layer having a thickness of 1.0 mm was applied.

Then, the wiring board on which the semiconductor element is mounted is mounted on a printed board having a wiring conductor made of a copper foil formed on the surface of an insulating base made of a glass epoxy board and having a thermal expansion coefficient of 0 ppm / ° C. of 14 ppm / ° C. On the other hand, the wiring board is positioned so that the spherical terminals of the wiring board are connected to the wiring conductors of the printed board, and heat-treated at 240 ° C. for 3 minutes in a nitrogen atmosphere using low-melting solder, so that the printed board is Mounted on the surface.

The printed circuit board mounted on the surface of the printed circuit board is repeated at a maximum of 1,000 cycles in a high-temperature bath controlled at temperatures of -40 ° C. and 125 ° C. in an atmosphere of air at a rate of 15 minutes / 15 minutes as one cycle. Was.

The electrical resistance between the wiring conductor of the printed circuit board and the wiring board was measured every 100 cycles, and the number of cycles until the electrical resistance changed was shown in Tables 2 and 3.

[0041]

[Table 1]

[0042]

[Table 2]

[0043]

[Table 3]

As is clear from Tables 2 and 3, Samples Nos. 28 to 3 in which no resin layer was formed on the surface of the semiconductor element were used.
In the case of 0, the deformation of the wiring board at the connection side with the printed board side is large, and the solder joint located inside the connection section between the wiring board and the printed board is significantly damaged.
The disconnection occurred in 00 cycles or less.

On the other hand, the upper surface of the semiconductor element has a coefficient of thermal expansion of 10 to 60 ppm / .degree.
Sample Nos. 4, 5, 9, 10, 1 on which a resin layer of Pa was formed
In 6, 17, 21, and 22, even in a thermal cycle test up to 1000 times, there is no warpage or deformation of the wiring board, no change in electric resistance is observed between the wiring board and the external electric circuit board, and it is extremely stable and good. Good electrical connections were maintained.

However, in the sample in which the coefficient of thermal expansion and the Young's modulus of the resin layer deviate from the range of the present invention, the deformation of the wiring board on the connection side with the printed board side is large as 100 μm or more. Connection failure occurs on the inside of the connection part with the side (Sample Nos. 1, 2, 7, 13,
14) Even if the deformation amount is less than 100 μm, poor connection may occur inside (Sample Nos. 3, 8, 15, 19, 2).
0), the resin layer is peeled off from the semiconductor element (Sample No. 6,
11, 12, 18, 23, 24) and the like, and the reliability after mounting is lacking.

Further, the thermal expansion coefficient of the insulating substrate material is 8p
Even in Samples Nos. 25 to 27 having a temperature of less than pm / ° C., the wiring board slightly deformed to be convex with respect to the connection side with the printed board, and poor connection occurred outside the connection portion.

[0048]

As described above, according to the semiconductor device mounting structure of the present invention, when mounting a semiconductor device having a low thermal expansion on a wiring board having a high thermal expansion characteristic, a high thermal expansion and a high Young's modulus are provided on the upper surface of the semiconductor device. By applying the resin composition of the above, the warpage of the wiring board can be suppressed by canceling the stress caused by the difference in thermal expansion between the wiring board and the semiconductor element. It is possible to make accurate and strong electrical connection to an external electric circuit board made of an insulating base including the same for a long period of time.

[Brief description of the drawings]

FIG. 1 is a schematic cross-sectional view for explaining a mounting structure according to the present invention.

[Explanation of symbols]

 Reference Signs List A semiconductor element, B BGA type package C external electric circuit board 1 insulating substrate 2 metallized wiring layer 3 connection pad 4 spherical terminal 5 insulating base 6 wiring conductor 7 solder 8 connection electrode 9 underfill material 10 resin layer

 ──────────────────────────────────────────────────続 き Continued on the front page (72) Hideto Yonekura, Inventor 1-4, Yamashita-cho, Kokubu-shi, Kagoshima Inside the Kyocera Research Institute (72) Inventor Koichi Nagata 1-4-1, Yamashita-cho, Kokubu-shi, Kagoshima Kyocera Research Institute

Claims (2)

[Claims] 1. A terminal for connecting a ceramic insulating substrate having a thermal expansion coefficient of 8 to 25 ppm / ° C. at -40 ° C. to 80 ° C., a metallized wiring layer disposed on the surface of the insulating substrate, and an external electric circuit board. A semiconductor element provided with a connection electrode on the bottom surface is placed on the surface of the wiring board provided with, and a metallized wiring layer of the wiring board and a connection electrode of the semiconductor element are brazed, and -4 on the surface
Coefficient of thermal expansion at 0 ° C to 80 ° C is 10 to 60 pp
m / ° C, Young's modulus in the above temperature range is 3 to 30 GP
A mounting structure of a semiconductor element, wherein a resin layer on which the resin composition a is applied is formed. 2. A terminal for connecting a ceramic insulating substrate having a thermal expansion coefficient of 8 to 25 ppm / ° C. at -40 ° C. to 80 ° C., a metallized wiring layer provided on the surface of the insulating substrate, and an external electric circuit board. A wiring board comprising: an external electric circuit board having a wiring conductor adhered to a surface of an insulating base containing an organic resin; In the mounting structure, a semiconductor element having a connection electrode on a bottom surface is mounted on a surface of the wiring board, and a metallized wiring layer of the wiring board and a connection electrode of the semiconductor element are brazed, and the semiconductor element is soldered. A resin layer on which a resin composition having a coefficient of thermal expansion at -40 ° C to 80 ° C of 10 to 60 ppm / ° C and a Young's modulus within the above temperature range of 3 to 30 GPa was formed on the surface of the element. Mounting structure of the wiring board characterized by.