JPH11214378A - Manufacture of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To sufficiently and easily remove unwanted part of an accumulated film, while suppressing the excess corrosion of the accumulated film embedded in a groove part without depending on chemical-mechanical grinding in an embedding and planarizing process applied to trench element separation. SOLUTION: The horizontal back etching of an SiOx accumulated film formed so that a trench 5 formed on an Si substrate 1 can be embedded is carried out, and this is divided into an embedded part 6a and unwanted parts 6b and 6c, and a resist pattern 7 having an opening 7a is formed selectively on an element formation area having wide width W1 capable of resist patterning. Then, the unwanted part 6b exposed in the opening 7a is removed by etching, the resist pattern 7 is removed, and all the unwanted parts 6b and 6c remaining on the substrate surface are removed through isotropic etching.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device in which a groove formed in a substrate is buried with a deposited film and finally the surface of a substrate is substantially flattened. The present invention relates to a method for easily and sufficiently removing an unnecessary deposited film remaining outside a groove while suppressing a film loss.

[0002]

2. Description of the Related Art In the field of manufacturing semiconductor devices, the importance of flattening a base is increasing with the progress of high integration of elements and miniaturization of pattern dimensions. As an example, an embedded film or conductive film is deposited to a sufficient thickness so as to fill a groove (trench) or a contact hole formed in a base, and buried flattening is performed to remove unnecessary portions deposited outside the groove or the contact hole. The technology is
Widely applied to the formation of trench element isolation, trench capacitors and metal plugs.

As a method for depositing an insulating film or a conductive film,
In recent years, a high-density plasma CVD (chemical vapor deposition) method has been proposed. In a plasma excited by applying a RF power between the parallel plate electrodes to generate a glow discharge or generating a microwave discharge using a microwave introduced from a waveguide, the achievable ion density is at most 10 ¹⁰ / C
m is ³ of the order. In contrast, high-density plasma
The number of collisions between electrons and gas atoms is increased by utilizing electron cyclotron resonance (ECR), a special microwave propagation mode (Whistler mode) in a magnetic field, and the confinement effect of plasma by an induced magnetic field. Indicates an ion density on the order of 10 ¹¹ / cm ³ or more.

A plasma apparatus for generating these high-density plasmas is generally configured so that the electric power for generating an electric field and the substrate bias can be controlled independently. It is possible to control the incident energy. Therefore, if this type of plasma apparatus is used for CVD, the growth of the film based on the deposition process and the erosion based on the ion sputtering process can proceed simultaneously, and the conditions are set such that the former slightly exceeds the latter. This makes it possible to form a deposited film having excellent step coverage, gap fill (embedding) characteristics, and denseness of the film.

However, a deposited film formed under conditions in which the above-described deposition process and ion sputtering process compete with each other has a specific slope having a slope outside a groove or a hole, that is, on a flat portion of a substrate. It has a problem that it is difficult to remove uniformly because it has a shape and its thickness varies depending on the width of the intermediate region. FIG. 11 shows an example of such a deposited film. In this figure, as an example, a trench 14 used for trench element isolation is a silicon (Si) substrate 1.
1 shows a state formed. On the surface of the Si substrate 11, a thin SiO ₂ film 12 is formed by, for example, thermal oxidation, and a silicon nitride (SiN) etching stop film 13 is laminated thereon. The SiN etching stop film 13 serves as an unnecessary portion 15 of a SiOx deposition film 15 described later.
b, 15c to remove the Si substrate 11 from the etching.
The SiO ₂ film 12 is a film for protecting
It functions as a pad SiOx film for alleviating the stress due to the formation of the N etching stop film 13. The trench 14 is formed by the SiN etching stop film 13 and the Si
It is formed by etching the O ₂ film 12 and the Si substrate 11 collectively through a common mask.

[0006] The entire surface of the substrate is, for example, ECR-C
It is coated on the SiOx deposit 15 formed by the VD method. The SiO ₂ deposited film 15 has a buried portion 15 a that completely fills the inside of the trench 14,
And unnecessary portions 15b and 15c that accumulate on the outside of the device. The reason why the unnecessary portions 15b and 15c have a unique shape having a slope is that the unnecessary portions 15b and 15c
This is because the shoulder-shaped portion covering the N-etching stop film 13 is liable to be reduced in film thickness due to the incidence of ions, and the film growth proceeds while this portion is constantly removed. Such film growth inevitably creates pattern dependency in the shapes and dimensions of the unnecessary portions 15b and 15c. That is, as shown in FIG. 11, a large unnecessary portion 15b is formed in a region where the width of the element forming region defined by the trench 14 is relatively large,
In a region where the width is relatively small, a small triangular unnecessary portion 15c is formed. The reason why the unnecessary portion 15c becomes smaller in the latter case is that the film reduction from both shoulders of the SiOx deposited film 15 overlaps at the center.

Next, a typical method for removing the unnecessary portions 15b and 15c will be described. 12 to 14 show a method of removing a relatively large unnecessary portion by using a resist pattern and then removing the remaining unnecessary portion by anisotropic etching in the order of steps. FIG. 12 shows a state in which a resist pattern 16 having an opening 16a for exposing a part of the unnecessary portion 15b is formed on the surface of the base shown in FIG. When this resist pattern 16 is formed by photolithography,
Resist lower limit of the opening width w ₃ is of course resist minimum void line width R. What is the minimum resist line width R?
In other words, it is the resolution limit width of photolithography.

However, such an opening 16a can be formed only when the width of the element formation region is the margin of overlap ΔA of the resist pattern 16 with the above-described minimum resist line width R (hereinafter referred to as the alignment margin ΔA). It is limited to the case where the value is equal to or greater than the value obtained by adding the double (R + 2ΔA). When an opening 16a is formed on an element formation region having a width less than this value, the opening 16a
This is because it is more likely that the buried portion 15a will be removed by the etching in the next step. In the example shown in FIG. 12, but are formed (R + 2ΔA) or wider w ₁ opening 16a in the element formation region having, (R + 2
.DELTA.A) can not be formed an opening 16a in the element formation region having a width less w ₂ than. FIG. 13 shows that the unnecessary portion 15b is anisotropically etched using the resist pattern 16a as a mask.
6 shows a state where 6a is removed. At this stage, the size of the unnecessary portions 15b and 15c remaining on the element formation region is considerably averaged. FIG. 14 shows a state in which these unnecessary portions 15b and 15c have been removed by anisotropic etching. After this, SiN
The etching stop film 13 is removed to complete the trench isolation.

In the above-described flattening process, a relatively large unnecessary portion is removed first, but a small unnecessary portion may be removed first. In this method, for example, the SiOx deposited film 15 shown in FIG. 11 is etched under the condition that the etching rate in the in-plane direction of the film is higher than that in the film thickness direction. Then, as shown in FIG. 18, the edges of the unnecessary portions 15b and 15c recede toward the inside of the element formation region, and are separated from the buried portion 15a. Such etching is also called “horizontal return etching”, and can be realized by adjusting conditions such as gas pressure, discharge power, and substrate bias in a high-density plasma apparatus used for forming the SiOx deposited film 15. It is.

Next, as shown in FIG. 19, a resist pattern 18 is formed. This resist pattern 18
Covers the large unnecessary portion 15b except for the skirt portion, but exposes the small unnecessary portion 15c in the opening 18a. The resist pattern 18 is used as a mask for preliminarily reducing the volume of the large unnecessary portion 15b even a little in advance, assuming that the final removal of the unnecessary portion 15b is performed by chemical mechanical polishing (CMP). Is formed. FIG. 20 shows a state in which anisotropic etching of the unnecessary portions 15b and 15c is performed in this state. As is clear from the figure, only the portion of the large unnecessary portion 15b covered with the resist pattern 18 remains above the element formation region. As described above, if the volume of the unnecessary portion 15b is reduced in advance, even if the polishing rate becomes non-uniform in the substrate surface in the CMP, the possibility that the unpolished portion is generated is reduced.

[0011] However, formation of the resist pattern 18 as shown in FIG. 19, it is of course a prerequisite to be able to open 18a is formed even smaller device formation region width w _2. Therefore, if the scale of FIG. 19 is the same as that of FIG. 16, in the photolithography for forming the resist pattern 18, the resolution is improved by using exposure light having a shorter wavelength than when forming the resist pattern 16. If the resolutions are the same, the scale of FIG.
It will be larger than 6.

[0012]

However, it is actually not so easy to achieve good planarization by removing the deposited film remaining on the flat portion of the substrate.
For example, consider a state as shown in FIG. 15 where the SiOx deposited film 15 is formed thicker than in FIG. 12 described above. A resist pattern 17 having an opening 17a is formed on a wide element formation region. Unnecessary portions 15b exposed inside the openings 17a are removed by anisotropic etching,
FIG. 16 shows a state in which the resist pattern 17 has been removed.
13 that the unnecessary portion 15c covered with the resist pattern 17 remains larger than the unnecessary portion 15b. Such unnecessary portions 15b, 1
If 5c is to be removed by isotropic etching, as shown in FIG. 17, the unnecessary portion 15c remains above the narrow element formation region. If the etching is further continued to remove the unnecessary portion 15c, the buried portion 15a will be greatly eroded.

On the other hand, FIG.
5c is exposed inside the opening 18a of the resist pattern 18 to enable removal by anisotropic etching. However, the width of the element formation region will be increased by further miniaturizing the pattern of the semiconductor device in the future. Becomes too narrow to allow the resolution of the resist pattern, this technique cannot be used. Therefore, if the unnecessary portion 15c remaining above the very narrow element formation region is to be removed by etching, it is necessary to rely on isotropic etching in the future, and accordingly, the reduction in the thickness of the buried portion 15a can be avoided. Problem.

Although CMP is less prone to decrease the film thickness at the buried portion and is promising as an alternative technique for isotropic etching, CMP has uniformity of the polishing rate within the wafer surface, stability of the polishing rate, determination of the end point, and the like. At present, there are still many problems to be solved in terms of underlayer selectivity, post-cleaning, and prevention of contamination of the back surface and edges. Therefore, an object of the present invention is to provide a method for more easily removing an unnecessary deposited film remaining outside a groove without using a complicated and advanced technique such as CMP.

[0015]

SUMMARY OF THE INVENTION The present invention is directed to removing unnecessary portions of a deposited film having a specific shape such that it is formed under conditions in which the deposition process and the ion sputtering process proceed competitively. The film thickness of the unnecessary portion on the flat portion of the substrate is reduced as a whole by so-called horizontal back etching, and then the unnecessary portion on the flat portion having a width wide enough to allow patterning of the resist is formed through the resist pattern. The above-mentioned object is achieved by selectively removing the unnecessary portions by etching and collectively removing all remaining unnecessary portions by isotropic etching. If unnecessary portions are removed in this order, the required amount of etching at the time of the last isotropic etching can be reduced, leading to an increase in the process margin and an improvement in the yield of the manufactured semiconductor device.

Here, the flat portion having a width wide enough to allow patterning of the resist means that the width W ₁ is represented by the following formula: W ₁ ≧ R + 2ΔA (where R is the resolution limit dimension of photolithography, Δ
A represents the alignment margin. ).

[0017]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The deposited film of the present invention embeds a groove formed in a substrate. This groove may be a trench formed in a semiconductor substrate or a connection opened in an insulating film. It may be a hole. The conditions for forming a deposited film in which the deposition process and the ion sputtering process proceed competitively, or the conditions for etching a deposited film in which the etching rate in the in-plane direction of the film is higher than that in the film thickness direction, are both conventional techniques. Can be achieved by using a high-density plasma apparatus as described in the section. Examples of these high-density plasma devices include an ECR plasma device, a helicon wave plasma device, an inductively coupled plasma (ICP) device, a hollow note type plasma device, and a helical resonator plasma device.

In the present invention, an etching stop film is formed on a substrate. This is for protecting the substrate when the deposited film is etched. Therefore, a material having an etching rate lower than that of the deposited film is appropriately selected. Formed. For example,
If the deposited film is a SiOx film, a SiN film or a polysilicon film is suitable as the etching stop film. Since the etching stop film is basically etched in a common pattern with the groove formed in the substrate, when the deposited film is formed in this state, the width of the buried portion finally formed becomes equal to the width of the groove. The width of the groove is the same as that of the portion protruding outside the open end.

However, if the edge of the etching stopper film is set back from the edge of the trench by performing isotropic etching before the formation of the deposited film, the width of the buried portion finally obtained becomes smaller than that of the trench. At the portion protruding outside the opening end, the width is larger than the width of the groove. That is, an embedded portion having a substantially T-shaped cross section is obtained. The buried portion having such a shape has a great effect particularly when the present invention is applied to trench element isolation. For example, when the buried portion is an element isolation region, it is assumed that the buried portion is covered to form, for example, a gate electrode layer of a MOS transistor. At this time, since the buried portion has a stepped cross-sectional shape, the concentration of the electric field at the end of the active region is reduced, and a decrease in the threshold voltage of the MOS transistor can be prevented.

The present invention extends the process margin by removing unnecessary portions of the deposited film by isotropic etching at the final stage of planarization.
There is a particularly preferred range of film height for the deposited film. This range will be described with reference to FIG. FIG. 8 shows a state in which a trench 5 used for trench element isolation is formed in a silicon (Si) substrate 1 as an example. S
An SiO ₂ film 2 and silicon nitride (Si)
N) an etching stop film 3 is laminated in this order;
The trenches 5 are formed by collectively etching these laminates based on the common pattern. The region surrounded by the trench 5 is an element formation region. In the drawing, the element formation region on the left side is wide width W ₁
(≧ R + 2ΔA), and the element formation region on the right side has a narrow width W ₂ (<R + 2ΔA).

The entire surface of the above-mentioned substrate is made of, for example, ECR-C
It is covered with a SiOx deposition film 6 formed by the VD method. The SiOx deposited film 6 includes a buried portion 6a that completely fills the inside of the trench 5, and unnecessary portions 6b and 6c that are deposited above the element formation region. The unnecessary portion 6b deposited on a wide element formation region is large, and the unnecessary portion 6c deposited on a narrow element formation region is small. Here, the height of the film surface of the SiOx deposited film 6 is considered based on the height immediately above the trench 5 (represented by the YY line in the figure). This is because the elevation of the film surface is the lowest in this part. First, the lower limit of the film surface height is equal to or higher than the height of the opening surface of the trench 5 (represented by the ZZ line in the figure). This is an essential condition for completely filling the trench 5.

On the other hand, the upper limit of the height of the film surface is defined by an intersection plane including an intersection P of a perpendicular line lowered from the widthwise middle point C of the narrow element formation region having the width W ₂ to the inclined surface of the SiOx deposited film 5. (Represented by the line XX in the figure) or less. This is based on the following grounds. Since the width W ₂ is smaller than (R + 2ΔA), an opening cannot be provided in the resist pattern on the element formation region, and therefore, the unnecessary portion 15c included in this region is removed by isotropic etching. . Since the isotropic etching proceeds at a uniform speed in any direction, if the etching can be performed without leaving the distance represented by the line segment CP, the unnecessary portion 6c can be removed while minimizing the film loss of the buried portion 6a. It can be removed without any further effort.

The present invention can be basically applied to any process which requires formation of a deposited film for filling a groove or a hole formed in a substrate and removal of an unnecessary portion thereof. A particularly important process is trench isolation as described above. That is, this is the case where the substrate is a semiconductor substrate and the deposited film is an insulating film. Unlike the LOCOS method (selective oxidation separation method) that generates a bird's beak, the trench element isolation hardly generates a dimensional conversion difference of the element isolation region in the in-plane direction of the substrate, so that a highly integrated semiconductor device based on a fine design rule. It is a technique suitable for the production of

[0024]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, specific embodiments of the present invention will be described. Example 1 In this example, a trench formed in a Si substrate was subjected to ECR.
A process of filling an SiOx deposited film formed by the CVD method and removing unnecessary portions will be described with reference to FIGS. FIG. 1 shows a state in which a trench 5 is formed in a Si substrate 1. To briefly describe the steps so far, first, an SiO ₂ film 2 having a thickness of about 10 nm is formed as a pad oxide film on the surface of a Si substrate 1 by, for example, a pyrogenic oxidation method, and then, by a plasma CVD method, for example. A 200 nm SiN etching stop film 3 is laminated. A resist pattern 4 is formed on the SiN etching stop film 3, and the etching stop film 3, the SiO ₂ film 2 and the Si substrate 1 are sequentially anisotropically etched using the resist pattern 4 as a mask, thereby forming the trench 5. Was formed.

A region defined by the trench 5 on the Si substrate 1 is an element formation region. Here, the minimum line width R of the resist is 0.25 μm, and the alignment margin ΔA is 0.2 μm.
Assuming that m, (R + 2ΔA) = 0.65 μm is a reference numerical value for determining whether or not resist patterning is possible. FIG.
The width W ₁ (≧ R +
2ΔA) is about 0.7 μm, and the width W ₂ of the narrow element forming area on the right side is about 0.3 μm. The former is an area where an opening of a resist pattern can be provided, and the latter is an area where it is impossible. . After that, the resist pattern 4 is
₂ Removed by plasma ashing, and subsequently performed thermal oxidation to form a thermal oxide film (not shown) of about 30 nm on the inner wall surface of trench 5. This thermal oxide film is formed for the purpose of suppressing junction leakage due to etching damage and reducing the electric field concentration by rounding the trench end.

Next, as shown in FIG.
An SiOx deposited film 6 was formed on the entire surface of the substrate by the VD method. The film forming conditions at this time were as follows as an example. SiH ₄ flow rate 20 SCCM N ₂ O flow rate 35 SCCM Gas pressure 0.09 Pa Microwave power 800 W (2.45 GHz) RF bias power 500 W (13.56 MHz) Thereby, SiOx deposited film 6 having a thickness of about 500 nm Was formed. However, the thickness in this case is the thickness from the bottom surface of the trench 5 to the film surface thereabove. In the SiOx deposited film 6, a portion that completely fills the trench 5 is a buried portion 6a, a portion deposited above a wide element formation region is an unnecessary portion 6b, and a portion deposited above a narrow element formation region is unnecessary. The part is referred to as 6c.

Next, as shown in FIG. 3, the embedded portion 6a, the unnecessary portion 6b,
Unnecessary portions 6c were separated from each other. For the horizontal return etching, the same apparatus as the ECR-CVD apparatus used at the time of film formation was used, and the following conditions were applied as an example. SiH ₄ flow rate 7.5 SCCM N ₂ O flow rate 35 SCCM gas pressure 0.09 Pa Microwave power 800 W (2.45 GHz) RF bias power 500 W (13.56 MHz) Unnecessary part 6b due to etching at this time Of the trench 5 receded from each edge of the trench 5 by about 0.1 μm.

Next, as shown in FIG. 4, a resist pattern 7 was formed on the substrate. The resist pattern 7 has an opening 7 a having a width W ₃ above the wide element formation region.
The unnecessary portion 6b is exposed inside, but the unnecessary portion 6c is covered above the narrow element formation region. Here, the above width W ₃ for example about 0.5 [mu] m.

Next, the exposed portion of the unnecessary portion 6b was removed by performing RIE (reactive ion etching) using the resist pattern 7 as a mask. For this anisotropic etching, a parallel plate type RIE apparatus was used, and the following conditions were adopted as an example. CHF ₃ flow rate 75 SCCM Gas pressure 6.7 Pa RF power density 0.23 W / cm ² (13.56 MHz) FIG. 5 shows a state in which the RIE is completed and the resist pattern 7 is removed. As a result, only the small unnecessary portions 6b and 6c remain above any of the element formation regions.

Next, the unnecessary portions 6b and 6c were removed by performing isotropic etching using a diluted hydrofluoric acid aqueous solution as shown in FIG. At this time, the buried portion 6a is slightly eroded, but the unnecessary portions 6b and 6c to be removed are reduced in advance, so that the etching amount is small, and as a result, the erosion amount of the buried portion 6a is also minimized. I was able to. Thereafter, the SiN etching stop film 3 was removed as shown in FIG. 7 by etching using, for example, a hot phosphoric acid solution, thereby completing the trench element isolation process.

Embodiment 2 In the present embodiment, a process in which the edges of the SiN etching stop film 3 and the SiO ₂ film 2 are recessed from the edges of the trench 5 by isotropic etching before the trench 5 is filled with the SiOx deposition film. Will be described with reference to FIGS. 9 and 10. FIG. FIG. 9 shows that after performing the steps up to the formation of the trench 5 in the same manner as in the first embodiment,
A state is shown in which the SiN etching stop film 3 is retreated from the edge of the trench 5 by performing isotropic etching of the N etching stop film 3. The width of the receding portion 8 formed at this time and W _4. Although FIG. 9 shows a state in which the SiO ₂ film 2 is also retracted from the edge of the trench 5, this retraction is not always necessary.

In the present embodiment, the width of the SiN etching stop film 3 remaining on the wide element formation region is substantially the width W _{5 of the} element formation region. SiO covering the entire surface of the substrate
The x deposited film was formed in the same manner as in Example 1, to form a resist pattern for removing the unnecessary portion of the SiOx deposited film in a broad element forming region, the width W ₅ of the above (R + 2.DELTA.
Must be equal to or greater than A). Therefore, the width W of the element formation region initially required is
_6, it is necessary to set more value obtained by adding twice the width W ₄ of the retreating section _{8 (= W 5 + 2W 4} ) the width W ₅ of the. As an example, R = 0.25 μm, ΔA = 0.2 μ
Assuming that m and W ₄ = 0.05 μm (50 nm), the width W ₆ of the element formation region initially required is at least 0.75 μm.

Thereafter, formation of a SiOx deposited film, formation of a resist pattern, removal of unnecessary portions by anisotropic etching through the resist pattern, removal of the resist pattern,
All unnecessary portions were removed by isotropic etching in the same manner as in Example 1. As a result, as shown in FIG. 10, an embedded portion 9 having a substantially T-shaped cross section was obtained. The buried portion 9 reduces the concentration of the electric field at the end of the element formation region, for example, the MO formed in the element formation region.
This has the effect of preventing the threshold of the S transistor from lowering.

Although the present invention has been described with reference to two specific embodiments, the present invention is not limited to these embodiments. For example, in all of the above-described embodiments, isotropic etching is performed by wet etching. However, isotropic etching can be performed by dry etching by setting conditions such that a radical mode is mainly used. In addition, details such as the configuration of the semiconductor device, dimensions and thickness of each part of the semiconductor device, film formation conditions, horizontal return etching conditions, RIE conditions, and wet etching conditions can be appropriately changed, selected, and combined. .

[0035]

As is apparent from the above description, according to the present invention, even if a complicated technique such as CMP is not used,
By a subtle combination of anisotropic etching and isotropic etching, unnecessary portions of the deposited film can be sufficiently removed without excessively eroding the deposited film embedded in the groove.
Therefore, a process margin for embedding the deposited film can be expanded, and a highly reliable process can be easily performed. Retreating the edge of the etching stop film on the substrate prior to the formation of the deposited film is effective in reducing the electric field at the end of the element formation region. Further, the lower limit of the film surface height immediately above the groove portion of the deposited film is set to be equal to or more than the height of the opening surface of the groove portion, and the upper limit is lowered from the midpoint in the width direction of the narrow flat portion to the inclined surface of the deposited film. Specifying the plane of intersection of the perpendicular lines is effective from the viewpoint of sufficiently removing unnecessary portions while minimizing the amount of erosion of the embedded portion.

The deposited film formed by the high-density plasma CVD method is a film in which the present invention is most effective because of its unique shape. In other words, the present invention truly enhances the practicality of the trench filling process by the high-density plasma CVD method. INDUSTRIAL APPLICABILITY The present invention is extremely well suited to a trench element isolation process for filling a trench formed in a semiconductor substrate with an insulating film, and can provide a process having a high practical value. As described above, the present invention greatly contributes to high integration, miniaturization, and high performance of a semiconductor device through improvement of a process of filling and flattening a groove portion with a deposited film.

[Brief description of the drawings]

FIG. 1 is a schematic cross-sectional view showing a trench etching step in a trench element isolation process to which the present invention is applied.

FIG. 2 is a schematic cross-sectional view showing a state in which a SiOx deposited film is formed on the entire surface of the substrate of FIG.

3 is a schematic cross-sectional view showing a state in which an edge of an unnecessary portion of the SiOx deposited film in FIG. 2 is retracted by horizontal return etching.

4 is a schematic cross-sectional view showing a state in which a resist pattern exposing only a large unnecessary portion is formed above a wide element formation region in FIG. 3;

FIG. 5 is a schematic cross-sectional view showing a state in which unnecessary portions that appear inside openings of the resist pattern in FIG. 4 are selectively removed, and the resist pattern is also removed.

6 is a schematic cross-sectional view showing a state in which all unnecessary portions in FIG. 5 have been removed by isotropic etching.

FIG. 7 is a schematic cross-sectional view showing a state where a SiN etching stop film of FIG. 6 is removed.

FIG. 8 is a schematic cross-sectional view for explaining a range of a height of a film surface of a SiOx deposition film suitable in the present invention.

FIG. 9 is a schematic cross-sectional view showing a state in which the edges of the SiN etching stop film and the SiO ₂ film are receded by isotropic etching in another example of the trench element isolation process to which the present invention is applied.

FIG. 10 is a schematic cross-sectional view showing a state where a buried portion having a substantially T-shaped cross section is formed on the base body of FIG. 9;

FIG. 11 shows a conventional trench element isolation process.
FIG. 4 is a schematic cross-sectional view showing a state where a trench and a SiOx deposited film are formed.

FIG. 12 is a schematic cross-sectional view showing a state in which a resist pattern exposing only a large unnecessary portion is formed above a wide element formation region in FIG. 11;

FIG. 13 is a schematic cross-sectional view showing a state in which unnecessary portions that are exposed inside openings of the resist pattern in FIG. 12 are selectively removed, and the resist pattern is also removed.

14 is a schematic cross-sectional view showing a state in which all unnecessary portions in FIG. 13 have been removed by anisotropic etching.

FIG. 15 is a schematic cross-sectional view showing a resist patterning step when an unnecessary portion is thick.

16 is a schematic cross-sectional view showing a state in which unnecessary portions in FIG. 15 have been etched and the resist pattern has been removed.

FIG. 17 is a schematic cross-sectional view showing a state where unnecessary portions cannot be completely removed above the narrow element formation region in FIG. 16;

18 is a schematic cross-sectional view showing a state where horizontal return etching has been performed on the SiOx deposited film of FIG. 11;

FIG. 19 is a schematic cross-sectional view showing a state in which a resist pattern for removing unnecessary portions above a narrow element formation region in advance is formed in another example of the conventional trench element isolation process.

20 is a schematic cross-sectional view showing a state where unnecessary portions are etched using the resist pattern of FIG. 19 as a mask.

[Explanation of symbols]

REFERENCE SIGNS LIST 1 Si substrate 2 SiO ₂ film 3 SiN etching stop film 4 7 Resist pattern 5 Trench 6
... SiOx deposited film 6a ... buried part 6b, 6c ... unnecessary part 7a ... opening (of resist pattern 7)

Claims (5)

[Claims] A first step of forming an etching stop film made of a material having a lower etching rate than a deposition film formed in a later step on an entire surface of the substrate; and forming the etching stop film and the substrate in a common pattern. A second step of forming a groove in the substrate by etching the substrate, and a third step of forming a deposited film so as to fill the groove under conditions in which the deposition process and the ion sputtering process proceed competitively.
And etching the deposited film under conditions in which the etching rate in the in-plane direction of the film is greater than the thickness direction of the deposited film, thereby forming the deposited film into a buried portion inside the groove and a substrate partitioned by the groove. A fourth step of separating the unnecessary portion remaining on the flat portion from the unnecessary portion, and the width W _{1 of the} flat portion is expressed by the following equation: W ₁ ≧ R + 2ΔA (where R is the resolution limit dimension of photolithography, Δ
A represents the overlap margin of the pattern. A) forming a resist pattern selectively having an opening on a wide flat portion represented by the following step :), removing the unnecessary portion exposed in the opening by etching, and A method of manufacturing a semiconductor device, comprising: a seventh step of removing the unnecessary portions remaining on the flat portion by isotropic etching. 2. The method according to claim 1, wherein after the second step is completed, the edge of the etching stop film is recessed from the edge of the groove by isotropic etching. 3. A height of a film surface of the deposited film formed in the third step immediately above the groove portion is equal to or greater than a height of an opening surface of the groove portion, and has a width W _{2 in the} flat portion. _2. The semiconductor device according to claim 1, wherein the following expression is equal to or less than an intersection plane of a perpendicular line drawn from a widthwise middle point of the narrow flat portion expressed by the following equation to W2 <R + 2ΔA to the inclined surface of the deposited film. Production method. 4. The method according to claim 1, wherein the formation of the deposited film in the third step is performed by a high-density plasma CVD method. 5. The method of manufacturing a semiconductor device according to claim 1, wherein said substrate is a semiconductor substrate, and said deposited film is an insulating film.