JPH11204728A - High frequency semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain stable performance by reducing effect of mutual inductance. SOLUTION: A device is provided with a chip 10 having a semiconductor substrate on which at least two elements Q1 and Q2 are formed, a first pad 14 formed on this semiconductor substrate which is connected with one element Q1 of those two elements, a second pad 18 formed on the semiconductor substrate so as to be made adjacent to the first pad 14 which is connected with the other element Q2 of the two elements, and a third pad 16 formed on the semiconductor substrate between the first and the second pads 14 and 18 which is not connected with any element formed on the semiconductor substrate, a substrate 2 having a first and a second terminals GND2 and GND3 and a third terminal GND6 arranged between the first and the second terminals on which the chip is mounted, and a first, a second, and a third bonding wires 84 , 86 , and 88 for connecting the first, the second, and the third pads with the first, the second, and the third terminals. The third pad is connected with a ground potential.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] The present invention relates to a high-frequency semiconductor device.

[0002]

2. Description of the Related Art A high-frequency semiconductor device generally includes a high-frequency amplifier.

A configuration of a conventional high-frequency amplifier for amplifying a high-frequency signal of 1 GHz or more will be described by taking a transmission amplifier used in a terminal of a personal handy phone system (PHS) as an example. In such a high-frequency amplifier, a common-source amplifier using a GaAs MESFET is usually used. The power gain per stage is about 10 dB, and by increasing the number of amplification stages from two to four,
A power gain of about 40 dB to about 40 dB can be provided. Such a high frequency amplifier is a MMIC (Monolithic M).
icrowave Integrated Circuit). FIG. 5 shows a configuration example of a conventional amplifier.

FIG. 5 shows two grounded MESFETs.
(Hereinafter simply referred to as transistor) ₂ by Q ₁ and Q 2
It is an example of a high-frequency amplifier having a stage configuration. Source grounded gate of the transistor Q ₁ constituting the amplifier circuit of the first stage is connected to the RF signal input terminal 11 via the input matching circuit 12, also between the gate and source of the transistor Q ₁ is stabilized resistor R ₁ It is connected.

[0005] and the drain of the source grounded transistor Q _1, between the second-stage gate of the amplification source grounded transistor Q ₂ constituting a circuit, an inductor L ₁ also serves as a power supply circuit, interstage inter-stage matching circuit is connected composed of the capacitive element C ₁ Metropolitan which also serves as a DC blocking.

[0006] Between the source grounded transistor Q ₂ gate and source is connected stabilizing resistor R _2, the drain of the transistor Q ₂ is connected to the RF signal output terminal 20, RF signal output of the MMIC chip It is input to an output matching circuit configured externally.

[0007] A problem encountered in the design of such a high-frequency amplifier comprising a multi-stage connection of transistors whose sources are grounded is the problem of oscillation caused by floating ground potential (GND). That is, due to the inductance of the bonding wire from the ground pad of the chip to the lead of the package and the inductance of the lead (hereinafter, the sum of these inductances is referred to as source inductance), the ground potential on the chip is also AC. It is not the ideal ground potential, but is floating from the ideal ground potential by the source inductance. Since the ground potential on the chip floats in this manner, it is often not permissible to commonly connect the source electrodes of the transistors whose sources are grounded in the multistage amplifier to the same ground potential pad in the chip. Assuming that the amplifiers are commonly connected to the same ground pad in the chip, for example, assuming a two-stage amplifier shown in FIG.
_A feedback path from the source of No. _{2 to} the source of the transistor Q ₁ whose source is grounded at the first stage is generated. This return path is positive feedback. Also, if the ground potential rises, that is, if the source inductance value exceeds a certain value, the feedback amount exceeds the range of the stable condition, and the amplifier oscillates. For this reason, the ground pad of each amplification stage is usually provided independently.

FIG. 6 shows a conventional M for a high-frequency amplifier shown in FIG.
MIC chip 70 in plastic envelope package 8
0 is an example of a configuration mounted on the “0”. The input matching circuit 12 includes two capacitors 12 a and 12 each having a metal-insulator-metal structure.
d and two spiral inductors 12b and 12c. RF input signal pad 11 is lead IN
It is connected by a bonding wire ₈₁ to. Pad 1
3 is a ground terminal of the input matching circuit 12,
It is connected by the bonding wire 8 ₂ ND _1. Pad 14 is the ground terminal of the first stage transistors Q _1, lead GND ₂ to two bonding wires 8 _3,
It is connected by 8 _4. Pad 18 and pad 19 are both transistors Q ₂ of the ground terminal of the second stage. The size of the transistor Q ₂ is large enough to determine the length of the y-axis direction of the MMIC chip 70, inevitably MMI
The ground pads 18 and 19 are provided in the vertical direction of the C chip 70. The pad 18 is connected to the lead GND ₃ and the lead GND ₄ by two bonding wires 8 ₈ , 8 ₉ and 8 ₁₂ , 8 ₁₃ , respectively.
9 is a lead GND ₅ and two bonding wires 8 ₁₀ ,
8 ₁₁ Connected. As described above, the ground pads of the respective amplification stages are separated from the ground pads of the first and second stages.

The larger the size of the ground pad, the larger the number of bonding wires connected to the ground pad. This is because the larger the size of the FET, the more the source inductance reduces the gain.

The transistors Q ₁ and Q ₂ are multi-finger field effect transistors, and the layout is shown in FIG.

Generally, a multi-finger transistor is
In order to increase the gate width, a plurality of transistor elements are arranged in parallel, and a gate electrode (also called a finger) 104 of each transistor element is commonly connected (see FIG. 7). Therefore, the drain regions or the source regions of adjacent transistor elements are arranged so as to be adjacent to each other. The drain regions arranged adjacent to each other are connected by a drain electrode 116 composed of an ohmic electrode.
6 are connected in common at the ends (see FIG. 7). In addition, adjacent source regions are connected to each other by a source electrode 118 including an ohmic electrode,
Each source electrode 118 is commonly connected at an end by a second layer wiring 119 (FIG. 8). When used in the above-described high-frequency amplifier, the commonly connected gate electrode 104 is connected to a resistor R (resistor R ₁ or R ₂ in FIG. 6) formed of a diffusion layer formed in a semiconductor substrate and a terminal 1.
22 are electrically connected. The resistance R is
The source lead electrode 126 is connected to the source lead electrode 126 via the terminal 124, and the source lead electrode 126 is electrically connected to the commonly connected source electrode 118.

[0012]

Now, as described above,
By separating the ground pads, the return path between the ground pads on the chip appears to be invisible. However, the presence of mutual inductance between the bonding wires and the leads to each ground pad creates a feedback path, thereby creating a risk of oscillation. In particular, mutual inductance between adjacent bonding wires and leads is a problem. That is, the mutual inductance and the lead GND between the bonding wires 8 ₈ and the bonding wires 8 ₄ 6
The mutual inductance between the lead ₃ and the lead GND ₂ becomes a problem.

To avoid this, it is sufficient to increase the distance between the bonding wire and the lead, which is a problem. However, since the mutual inductance of the two wires is a function that decreases gradually with respect to the distance between the wires, a considerable amount is obtained. If the interval is not widened, there is no effect of reducing the mutual inductance. According to the experiment of the present inventor, the self-inductance of a bonding wire having a length of 1 mm is about 0.9 nH, and the mutual inductance when two bonding wires are present at an interval of 0.16 mm is 0.34 nH. It is 38% of the self inductance. Therefore, when the mutual inductance was measured by increasing the distance between the two bonding wires,
It was found that the interval had to be tripled to 0.48 mm in order to reduce the mutual inductance to 0.17 nH.

Increasing the spacing between the bonding wires means increasing the pad spacing.
Increase in size and cost. Also,
In order to realize a stable amplifier even in the presence of mutual inductance, it is necessary to adjust circuit constants such as reducing the value of the stabilizing resistor. In this case, the gain is reduced due to a trade-off between the gain and the stability.

As described above, in the conventional high-frequency semiconductor device, there is a concern that the mutual inductance of the bonding wire and the lead with respect to the ground pad may affect the chip size. Therefore, there was a problem that the gain had to be lowered.

The present invention has been made in view of the above circumstances, and has as its object to obtain a stable high-frequency semiconductor device by suppressing feedback due to mutual inductance between bonding wires without substantially increasing the chip size. I do.

[0017]

A high-frequency semiconductor device according to the present invention comprises a semiconductor substrate having at least two elements formed thereon, and a first substrate formed on the semiconductor substrate and connected to one of the two elements. A pad, a second pad formed on the semiconductor substrate adjacent to the first pad and connected to the other of the two elements, and the semiconductor between the first and second pads A chip provided on the substrate and having a third pad that is not connected to any element formed on the semiconductor substrate; first and second terminals; and a first terminal and a second terminal. A substrate on which the chip is mounted, a third terminal disposed between the first, second, and third pads and the first, second, and third pads;
And first, second, and third bonding wires respectively connecting the third terminal and the third terminal, wherein the third pad is connected to a ground potential.

Further, the high frequency semiconductor device according to the present invention comprises:
A semiconductor substrate on which at least two elements are formed; a first pad formed on the semiconductor substrate and connected to one of the two elements; and a first pad on the semiconductor substrate adjacent to the first pad. A second pad formed on the semiconductor substrate between the first and second pads, and connected to any of the elements formed on the semiconductor substrate. A chip having a third pad that is not provided, first and second terminals, a third terminal disposed between the first terminal and the second terminal, and the chip mounted thereon. A ground bed, and first to third bonding wires respectively connecting the first to third pads to the ground bed, wherein the third pad is connected to a ground potential. Features To.

Further, the high frequency semiconductor device according to the present invention comprises:
A semiconductor substrate on which at least two elements are formed; a first pad formed on the semiconductor substrate and connected to one of the two elements; and a first pad on the semiconductor substrate adjacent to the first pad. A chip having a second pad formed to be connected to the other of the two elements, first and second terminals to be arranged, and between the first and second terminals. , A substrate having a ground bed on which the chip is placed, and first and second terminals respectively connecting the first and second pads to the first and second terminals. A second bonding pad; a third bonding wire having one end connected to the ground bed and the other end connected to the third terminal;
It is characterized by having.

[0020]

FIG. 1 shows the structure of a first embodiment of a high-frequency semiconductor device according to the present invention. The high-frequency semiconductor device of the first embodiment has a configuration in which the MMIC chip 10 for a high-frequency amplifier is mounted on a plastic envelope package 2.

In the MMIC chip 10 according to the first embodiment, a ground pad 16 is newly provided between the ground pad 14 and the ground pad 18 in the MMIC chip 70 according to the conventional high-frequency semiconductor device shown in FIG. With the power pad 15 and the ground pad 19
And a ground pad 17 is newly provided between the ground pad 17 and the ground pad 16 and the ground pad 17.
5 are connected.

The envelope package 2 according to the first embodiment is different from the envelope package according to the conventional high-frequency semiconductor device shown in FIG. 6 in that the lead GND ₆ is located between the lead GND ₂ and the lead GND _3. And a lead V _dd and a lead GND ₅ connected to the driving power supply.
And a lead GND ₇ is newly provided between them. The lead GND ₆ is connected to the ground pad 16 via bonding wires 8 _6. Also lead G
ND ₇ is connected to the ground pad 17 via bonding wires 8 _7. Note that the lead GND ₇ is connected to an ideal ground potential.

Next, the operation of the first embodiment will be described with reference to FIG. 2 (a) is a bonding wire 8 ₄ of the high-frequency semiconductor device of the first embodiment, 8 _6, 8 _7, 8
₈ is a circuit diagram that models respect, FIG. 2 (b) bonding wires 8 ₄ of a conventional high-frequency semiconductor device, 8 ₈
FIG. 3 is a circuit diagram modeled with respect to FIG.

In the present model, the lead inductance is assumed to be smaller than the bonding wire inductance, and its existence is ignored. In the type in which the MMIC is directly mounted on the mounting board, there is no lead inductance in the first place, and the present model is applied as it is. Then, only the bonding wire for the ground pad is modeled by the inductance L, and the influence of the mutual inductor existing between the inductors is considered.

The circuit equation for the circuit of FIG. 2B is represented by simultaneous equations of equations (1a) and (1b). sLI1 + sMI2 = e (1a) sMI1 + (sL + Z) I2 = 0 (1b) Here, s = jω. (J: a unit imaginary number, omega = angular frequency) when the current I1 flows through the bonding wire 8 _8, due to the presence of mutual inductance M, so that the current I2 generated in the bonding wire 8 _4. This current I2 is present in the impedance Z that is connected to the bonding wires 8 _4, Assuming that to be the Z = 0, the sign of the current I2 is a current I1 opposite, i.e., the phase difference between the current I2 and current I1 1
It can be seen from equation (1b) that the angle is 80 degrees. That is,
When AC current from the chip 10 to the ground power supply through a bonding wire 8 ₈ occurs, some of it can be seen that return from the bonding wires 8 ₄ to the chip 10 side. This is the return mechanism.

On the other hand, a circuit diagram modeling this embodiment is shown in FIG. The circuit shown in FIG. 2 (a) is widely distance between the bonding wires 8 ₇ and another bonding wire sufficiently, as the mutual inductance between them negligible. The circuit equations for the circuit shown in FIG. 2A are given by equations (2a), (2b), and (2).
c) is represented by the simultaneous equations. _{sLI1 + sM 12 I2 + sM 13} I3 = e ... (2a) sM 12 I1 + 2sLI2 + sM 23 I3 = 0 ... (2b) sM 13 I1 + sM 23 I2 + (sL + Z) I3 = 0 ... (2c) where M ₁₂ is a bonding wire 8 ₈ a bonding wire 8 mutual inductance, M ₂₃ of between ₆ shows the mutual inductance between the mutual inductance, M ₁₃ is the bonding wire 8 ₈ and the bonding wires 8 ₄ between the bonding wires 8 ₆ and the bonding wire 8 _4.

Now, assume that the parameters of the above equation are given as follows. 1) a 1mm length of the bonding wire, L = 0.91nH 2) the bonding wire 8 ₈ and the bonding wire 8 as an experimental value at that time
₄ distance M = M ₁₃ as experimental value of the mutual inductance in the case of a 0.32mm = 0.225nH 3) the bonding wires 8 ₆ bonding wire 8
As it positioned in the middle of the ₈ and the bonding wire _{8 4, M 12 = M 23} = 0.336nH 4) and Z = 0 5) angular frequency ω = 2π × 1.9GHz.

The above parameters are expressed by the following equations (1a) to (1b).
The results of solving the simultaneous equations by substituting into (2a) to (2c) and (2a) will be described below.

The amount of current feedback I2 / I with respect to FIG.
1 is I2 / I1 = -0.247 from the solutions of the equations (1a) and (1b). On the other hand, as a solution of the equations (2a) to (2c), I3 / I1 = −0.193. That is, according to the present embodiment, the amount of current feedback due to mutual inductance is 22% as compared with the conventional case.
It is reduced.

[0030] While the present model deals with indanyl Taku chest of the bonding wire in uniform L, if, (for example, L4) the bonding wire 8 ₇ inductance
The feedback amount I3 / I1 can be further reduced if the number can be reduced as compared with the other cases, such as by increasing the number of bondings. L4 to 0
In the limit described above, I3 / I1 = -0.129, and the amount of current feedback is almost half of the conventional value.

The above is the result of strictly solving the equation.
A slightly more intuitive explanation is given below using an approximate idea.

The current flowing through the bonding wires 8 ₈ (I
by the a), the current Ia and the reverse current (Ib are the bonding wires 8 ₄₎ flows. Current Ib
Can be expressed as follows.

[0033] Ib = -k1Ia, (0 <k1 <1) The bonding wires 8 in the currents Ia, between the bonding wires 8 ₈ and the bonding wire 8 _4
A current (Ic) flows through 6. The current Ic is the current Ia
Current Ib is affected by the current Ib
Since it should be smaller than a, if the effect of the approximate current Ib is neglected, Ic = −k2 Ia, (0 <k1 <k2 <1).

[0034] Next considering the current Id generated in the bonding wire 8 ₄ by the current Ic, the Id = -k2Ic = k2 ² Ia. Here, it is assumed that the bonding wires 8 ₆ located in the middle of the bonding wire 8 ₈ 8 _4, the current I
The coupling constant between d and current Ic was the same as the coupling constant between current Ic and current Ia. Therefore, the bonding wire 8 ₄
Will be given by the following equation.

[0035] Ib + Id = - (k1- k2 2) Ia that is, by the presence of the bonding wires 8 ₆ produces a current Id to offset a portion of the current Ib, the bonding wire 8 by a current flowing through the bonding wire 8 _8
The current generated in ₄ is reduced.

As described above, according to the high-frequency semiconductor device of the present embodiment, the influence of mutual inductance can be reduced, and stable performance can be obtained. In this embodiment, the chip 10 has the pad 1
6, 17 and the wiring 25 are provided, but there is almost no increase in chip size.

In this embodiment, the pad 1
Bonding wires 8 ₇ connected to the 7 lead GND
Preferably from the bonding wires 8 ₁₀ connected to ₅ the provided relatively far position. This is important. In As explained in the operation of the present embodiment, the bonding wire 8 ₇ another bonding wire, because it is necessary that their mutual inductance is small in particular away from the bonding wires 8 ₁₀ for ground pad is there.

In this embodiment, the pad 1
6, a ground pad 14 of the transistor Q _1, is preferably located in the transistor Q ₂ side than the midpoint between the ground pad 18 of the transistor Q _2. This is because the bonding wire 8 ₈ connected to the pad 18
This is because an additional effect of reducing the effective self-inductance can be obtained.

In the first embodiment,
Although the number of amplifier stages is two, in the case of a high-frequency semiconductor device having three or more stages of amplifiers, a new ground pad (the ground pad 16 in the first embodiment) has a gain. is preferably provided adjacent to the (ground pads 18 of the transistor Q ₂ is in the first embodiment) ground pad of a large amplifier. When the gains are almost equal, it is preferable that the new ground pad be provided adjacent to the ground pad of the last amplifier. It goes without saying that a new ground pad may be provided between each stage.

Next, the second embodiment of the high-frequency semiconductor device according to the present invention will be described.
The embodiment will be described with reference to FIG. FIG. 3 is a plan view showing the configuration of the high-frequency semiconductor device according to the second embodiment.

The high-frequency semiconductor device of the second embodiment differs from the first embodiment in that the MMIC chip 10 is directly mounted on the mounting substrate 3 without using an envelope package. In the second embodiment, M
The MIC chip 10 is placed on a ground bed 4 which can be regarded as an ideal ground potential as shown in FIG. The ground pad 13 of the MMIC chip 10 through the bonding wires 9 _2, ground pad 14 via a bonding wire 9 _3, 9 _4, the ground pad 16 via a bonding wire 9 _6, ground pad 17
Via bonding wires 9 _7, ground pad 1
8 is connected to the ground bed 4 via bonding wires 9 ₈ , 9 ₉ , 9 ₁₂ , 9 ₁₃ , and the ground pad 19 is connected via bonding wires 9 ₁₀ , 9 ₁₁ respectively. Since the mounting form such as the second embodiment has no lead, it conforms well to the model described in the section of the operation of the first embodiment, and has a much larger size than the first embodiment. Stable performance can be obtained.

[0042] In the second embodiment, the pad 11 of the input matching circuit 12 is connected through an input terminal IN and the bonding wires 9 ₁ provided on the mounting substrate 3,
Power supply pads 15 of the MMIC chip 10 is connected via the power supply terminal and V _dd to the bonding wires 9 ₅ provided on the mounting board 3, the output terminal OUT and the bonding output pad 20 of the MMIC chip 10 is provided on the mounting board 3 It is connected via a wire 9 _14.

A circuit simulation was performed to examine the stability of the high-frequency semiconductor device according to the second embodiment. In this circuit simulation, a stability coefficient K as an index of stability was examined. The stability coefficient K is determined by S parameters S ₁₁ , S ₁₂ , S which are four-terminal parameters when the equivalent circuit of the semiconductor device of the second embodiment is represented by a four-terminal circuit.
_21, the S ₂₂ is expressed as follows. _{K = (1- | S 11 |} 2 - | S 22 | 2 + | Δ | 2) / (2
.. | S ₁₂ S ₂₁ |) where Δ = S ₁₁ S ₂₂ −S ₁₂ S ₂₁ . When | S ₁₁ | <1 and | S ₂₂ | <1, the necessary and sufficient conditions for the four-terminal circuit to be unconditionally stable are K> 1 and |
Δ | <1.

In an amplifier using an actual FET,
Usually, | S ₁₁ | <1 and | S ₂₂ | <1, and | Δ
In order to satisfy | <1, it is determined whether or not K> 1 to determine whether the condition is unconditionally stable.

The minimum value of the stability coefficient K of the high frequency semiconductor device of the second embodiment in the entire frequency range is 1.5, which satisfies the absolute stability condition.

On the other hand, according to the present embodiment, pads 16 and 17 are used.
In the conventional circuit except for the wiring 25 connecting them, the stability coefficient was 0.9, which did not satisfy the absolute stability condition. In this conventional example, a ground pad spacing of the transistor Q _1, the transistor Q ₂ are the same as in the second embodiment, thus stabilizing factor despite the chip size is also the same has deteriorated significantly. To the stability factor in the conventional example in the same 1.5 and the second embodiment, it is necessary to ground pad spacing of the transistor Q _1, the transistor Q ₂ more than doubled, thereby naturally chip size is increased .

Next, the third embodiment of the high-frequency semiconductor device according to the present invention will be described.
The embodiment will be described with reference to FIG. The high-frequency semiconductor device according to the third embodiment has a configuration in which an MMIC chip 10A is placed on a ground bed 4 formed on a mounting substrate 3 whose back surface is an ideal ground 3A. The MMIC chip 10A has a configuration in which the pads 16 and 17 are deleted from the MMIC chip 10 shown in FIG. 1 or 3, for example. And MMIC chip 1
The ground pads 31 and 33 on 0A are connected to ground terminals 41 and 43 formed on the mounting substrate 3 via bonding wires 51 and 53, respectively.

In order to reduce the interaction between the bonding wires 51 and 53, a bonding wire 55 is provided between the bonding wires 51 and 53. The bonding wire 55 has one end connected to the ground bed 4 and the other end connected to a ground terminal 45 provided on the mounting board 3.

It goes without saying that the high-frequency semiconductor device according to the third embodiment also has the same effect as the second embodiment.

In the third embodiment, it is desirable that the connection point between the bonding wire 55 and the ground bed 4 is as close as possible to the MMIC chip 10A. The bonding wire 55 is the bonding wire 5
It is desirable to arrange them so as to be as parallel as possible to 1, 53.

In the third embodiment, the ground terminal 45 is arranged so as to be aligned with the ground terminals 41 and 43, but may be moved in the x-axis direction (see FIG. 4). .

In the first to third embodiments, a high-frequency amplifier composed of a MESFET formed on a GaAs substrate has been described as an example. However, it is needless to say that the present invention can be applied to other electronic devices. Absent. The present invention is not limited to the high-frequency amplifier, but is effective for general MMICs in which signal coupling due to mutual inductance between bonding wires becomes a problem.

[0053]

As described above, according to the present invention, a stable high-frequency semiconductor device can be obtained without greatly increasing the chip area.

[Brief description of the drawings]

FIG. 1 is a plan view showing a configuration of a first embodiment of the present invention.

FIG. 2 is a model circuit diagram illustrating the operation and effect of the first embodiment.

FIG. 3 is a plan view showing the configuration of a second embodiment of the present invention.

FIG. 4 is a perspective view showing a configuration of a third embodiment of the present invention.

FIG. 5 is a circuit diagram showing a configuration of a high-frequency amplifier.

FIG. 6 is a plan view showing a configuration of a conventional high-frequency semiconductor device.

FIG. 7 is a plan view showing a configuration of a multi-finger FET.

[Explanation of symbols]

2 envelope package 3 mounting board 4 ground bed 8 _i (i = 1,... 13) bonding wire 10 MMIC chip 11 input pad 12 input matching circuit 13, 14, 16, 17, 18, 19 ground pad 15 power supply pad 20 output pad IN input lead V _dd power supply leads OUT output lead _{GND i (i = 1, ...} 7) ground lead _{Q i (i = 1,2) GaAsMESFET} R i (i = 1,2) stabilizing resistor L ₁ inductor C ₁ capacitor

Claims (4)

[Claims] 1. A semiconductor substrate having at least two elements formed thereon, a first pad formed on the semiconductor substrate and connected to one of the two elements, and adjacent to the first pad. Formed on the semiconductor substrate and
A second pad connected to the other of the two elements;
And provided on the semiconductor substrate between the second pad and
A chip formed on the semiconductor substrate and having a third pad that is not connected to any element; first and second terminals; and a first terminal and a second terminal. A substrate having a third terminal on which the chip is mounted, the first, second, and third pads and the first, second, and third pads;
And a first, a second, and a third bonding wire, respectively, for connecting the first and second terminals to each other, wherein the third pad is connected to a ground potential. 2. A semiconductor substrate having at least two elements formed thereon, a first pad formed on the semiconductor substrate and connected to one of the two elements, and adjacent to the first pad. Formed on the semiconductor substrate and
A second pad connected to the other of the two elements;
And provided on the semiconductor substrate between the second pad and
A chip formed on the semiconductor substrate and having a third pad that is not connected to any element; first and second terminals; and a first terminal and a second terminal. A substrate having a third terminal, a ground bed on which the chip is mounted, and first to third bonding wires respectively connecting the first to third pads to the ground bed; The high frequency semiconductor device, wherein the third pad is connected to a ground potential. 3. A fourth pad formed on the semiconductor substrate apart from the first, second, and third pads, and a third pad formed on the semiconductor substrate, the fourth pad being formed on the semiconductor substrate. 3. The high-frequency semiconductor device according to claim 1, further comprising: a wiring connecting to a fourth pad, wherein the fourth pad is connected to a ground potential. 4. A semiconductor substrate having at least two elements formed thereon, a first pad formed on the semiconductor substrate and connected to one of the two elements, and adjacent to the first pad. Formed on the semiconductor substrate and
A chip having a second pad connected to the other of the two elements, first and second terminals, and a third terminal disposed between the first and second terminals. A substrate having a ground bed on which the chip is mounted; first and second bonding pads for connecting the first and second pads to the first and second terminals, respectively; The other end is connected to the ground bed.
And a third bonding wire connected to the terminal.