JPH11177998A - Signal processing circuit and output signal processing method for solid state image pickup device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a signal processing circuit which can satisfactorily correct a crosstalk (color mixture) caused by sample-and-hold operation without adding any complicated circuit and which can restore an original signal, and also to provide an output signal processing method for a solid state image pickup device. SOLUTION: Digitized signals are processed after an output signal of a solid state color image pickup device is sampled and held. At the same time, a subtracter 12 subtracts the level of a signal B to be inputted next and delayed by a bit from the level of a signal A that passed through a register 11 and inputted in advance by a bit. A multiplier 13 multiplies the subtracted output (A-B) by a positive correction coefficient, and this multiplication result is defined as a correction value. This correction value is added to the signal A that is inputted in advance by a bit by an adder 14 and then outputted. Thus, a crosstalk (color mixture) that is caused by the sample-and-hold operation of the output signal of the image pickup device can be corrected.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a signal processing circuit and an output signal processing circuit of a solid-state imaging device, and more particularly to a signal processing circuit having a periodicity through a sample-and-hold circuit, and a solid-state device having a color filter on a light receiving surface. The present invention relates to a processing method for processing an output signal of an image sensor.

[0002]

2. Description of the Related Art In a system using a solid-state imaging device,
Usually, for example, as shown in FIG.
d Device) The output signal of the solid-state image sensor 101 is converted to CDS (C
or reset double noise by passing through an orrelated Double Sampling circuit 102,
Further, waveform shaping is performed. Thereafter, the signal is amplified by the amplifier circuit 103 at an appropriate amplification factor so that the value becomes an appropriate value.

Since the waveform of the amplified signal becomes dirty by passing through the amplifying circuit 103, the waveform is shaped again by the sample / hold (S / H) circuit 104 and then digitized by the A / D converter 105. DSP (D
igital Signal Processor (digital signal processing) circuit 1
06. In the DSP circuit 106, various kinds of signal processing are performed digitally.

[0004]

However, after the output signal of the CCD solid-state imaging device 101 passes through the CDS circuit 102 and the amplifier circuit 103, the sample-and-hold circuit 10
When the signal passes through 4, the signal of two consecutive pixels in the sample-and-hold circuit 104 may interfere with each other and become different from the original signal level. FIG. 4 shows a sample and hold circuit 1
04 shows an example of the circuit configuration.

In FIG. 4, an input signal is a MOS signal.
The voltage is applied to the gate of the MOS transistor Q2 via the transistor Q1. MOS transistor Q1 is turned on when clock Clk is applied to its gate. The drain of the MOS transistor Q2 is connected to the power supply Vdd, and its source is connected to the ground Gn via the resistor R1.
d. The capacitor C1 is connected between the gate of the MOS transistor Q2 and the ground.

In the sample and hold circuit 104 having the above configuration, if the signals of the two pixels input to the circuit are signal 1 / signal 2 in the order of time, the signal 1 is input, and the signal 1 is turned on. MO through
It is applied to the gate of S transistor Q2. And M
After the gate voltage of the OS transistor Q2 reaches the signal level of the signal 1, the clock Clk goes low, and the MOS transistor Q1 is turned off.

After signal 1, signal 2 is input. At this time, the signal levels before and after the MOS transistor Q1 are different. That is, although not shown in FIG.
Since a parasitic capacitance exists between the source and the drain of the OS transistor Q1, the gate voltage of the MOS transistor Q2 changes slightly depending on the input of the signal 2, and takes a value different from the actual signal level. This change is signal 1
And the signal 2 is approximately proportional to the level difference. This phenomenon is called crosstalk (or color mixing).

FIG. 5 is a waveform diagram showing a crosstalk phenomenon. In the figure, a solid line is an input signal, and a signal that has changed due to crosstalk is indicated by a dotted line. Δ
1 and Δ2 are level differences of the input signal for each signal,
The product of Δ1 and Δ2 multiplied by the color mixture ratio is the change between the input signal and the output signal. Here, the color mixing ratio is a ratio at which the signal 1 actually changes with respect to the level difference between the signal 1 and the signal 2, and is a value that changes for each sample and hold circuit. In other words, the color mixing ratio is determined by the characteristics of the sample and hold circuit.

By the way, if the color arrangement is, for example, primary color R (red) G
(Green) B (blue) CC with Bayer array color filter
Considering the case where a D solid-state imaging device is used, a line for outputting a G signal / B signal (hereinafter, referred to as an R line) and a line for outputting an R signal / B signal (hereinafter, referred to as B) are provided for each line.
Line). When a red object is imaged, the R signal is considerably large even though the G signal / B signal is almost zero.

Although the signal level of the G signal on the R line is increased by the influence of the R signal, the G signal on the B line hardly changes because the G signal and the B signal are almost equal. As a result, the signal levels of the G signal of the R line and the G signal of the B line are different, and as a result, a good image cannot be reproduced even if signal processing is performed based on these signals.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and has as its object to satisfactorily correct crosstalk (color mixture) generated in a sample hold without adding a complicated circuit. Another object of the present invention is to provide a signal processing circuit capable of recovering an original signal and a method of processing an output signal of a solid-state imaging device.

[0012]

A signal processing circuit according to the present invention is a signal processing circuit for processing a signal having a periodicity that has passed through a sample-and-hold circuit. Subtracting means for subtracting the signal level of the signal input one bit later from the signal level of the signal delayed by one bit by the means, multiplying means for multiplying the subtraction result of the subtracting means by a positive correction coefficient, and delay means And adding means for adding the multiplication result of the multiplication means to the signal delayed by one bit.

In the signal processing circuit having the above configuration, a signal having a periodicity, which is a circuit input, includes a crosstalk component generated in the sample and hold circuit. The signal obtained by subtracting the signal one bit later from this signal and multiplying the difference by a positive correction coefficient is the correction amount. Therefore, by adding this correction amount to the signal one bit before, the crosstalk component is canceled. Thus, an original signal without crosstalk is obtained.

An output signal processing method for a solid-state imaging device according to the present invention is a processing method for sampling and holding an output signal of a solid-state imaging device having a color filter having a predetermined color array on a light receiving surface, and then digitizing and processing the output signal. There is one
The signal level of the signal input next is subtracted from the signal level of the signal input bit ahead, and the result of multiplying the subtracted output by a positive correction coefficient is added to the signal input one bit ahead. Output.

When an output signal of a solid-state image sensor having a color filter passes through a sample-and-hold circuit, it is affected by signals of adjacent pixels, and crosstalk (color mixing) occurs. The signal obtained by subtracting the signal one bit later from the signal one bit earlier including the crosstalk component and multiplying the difference by a positive correction coefficient is the correction amount. By adding this correction amount to the signal one bit before, the influence of the signal of the adjacent pixel, that is, the crosstalk component is canceled. Thereby, an imaging signal without crosstalk can be obtained.

[0016]

Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 1 is a block diagram showing one embodiment of the present invention. The signal processing circuit according to this embodiment, for example, samples and holds an output signal of a color CCD solid-state imaging device having a color filter, and then processes a digitized signal. The color CCD solid-state imaging device has, for example, a color filter of a primary color RGB Bayer array shown in FIG.

The color array is not limited to the primary color Bayer array, and the color filters are not limited to the RGB primary color array. Even in the case of other primary color arrays, complementary colors are used. Color array (for example, Ye / Cy
/ Mg / G) is also applicable.

As is apparent from FIG. 1, the signal processing circuit according to the present embodiment includes a register 11 as delay means for delaying an input signal by one bit, and an input signal one bit after the output signal A of the register 11. Subtractor 1 for subtracting signal B
2, a multiplier 13 for multiplying the subtraction output (AB) of the subtractor 12 by a positive correction coefficient set externally, and an adder for adding the multiplication result of the multiplier 14 to the output signal A of the register 11 14.

As described above, the signal processing circuit configured as described above, for example, samples and holds an output signal of a color CCD solid-state imaging device, and then processes a digitized signal. At this time, since the signal output from the CCD solid-state imaging device is a dot-sequential signal corresponding to each pixel, the signal input to the signal processing circuit is a signal having periodicity. The signal processing circuit shown in FIG. 3 is used to perform correction in the case where it is affected by signals of adjacent pixels, that is, in order to correct crosstalk (color mixture) generated in the sample hold. In the signal processing system of the output signal of the image sensor, the DSP circuit 10
6, for example, used as a first stage circuit.

In this case, the signal processing circuit shown in FIG.
A signal including a crosstalk component generated by the sample and hold circuit 104 in the signal processing system is input. The input signal is supplied to the subtractor 12 as a signal A passing through the register 11 and a signal B not passing through the register 11. Here, the register 11 has a delay function of delaying the input by one bit (one clock) corresponding to one pixel. As a result, the signal A is delayed by one bit, and is thus synchronized with the signal B. As a result, the signal B corresponds to the signal of the pixel next to the signal A. As is apparent from the RGB color Bayer arrangement diagram of FIG. 2, for example, if the signal A is an R signal, the signal B becomes a G signal (R line). Become.

Next, the signal B is subtracted from the signal A in the subtractor 12. The subtraction result (A−
B) is multiplied by a positive correction coefficient set externally using the multiplier 13. A signal obtained by multiplying the multiplication result of the multiplier 13, that is, the subtraction result (A-B) by a correction coefficient, becomes a correction amount when correcting crosstalk generated in the sample hold. This correction amount is added to the signal A which is the output signal of the register 11 by the adder 14.

Here, the principle of the above-described crosstalk correction will be described using equations below. It is assumed that the signal amount when no crosstalk occurs is signal 1 / signal 2, and the signals corresponding to signal 1 / signal 2 are signal 1 '/ signal 2' due to the crosstalk.

The signal 1 'in which the crosstalk occurs due to the occurrence of the crosstalk is expressed as follows: signal 1' = signal 1- (signal 1-signal 2) × color mixture ratio. Here, the color mixing ratio is, as described above, CC
Signal processing system for output signal of D solid-state imaging device (see FIG. 3)
Is a value determined by the characteristics of the sample hold circuit 104 in FIG.

The signal 1 'in which the crosstalk is occurring
Is corrected in the signal processing circuit according to the present embodiment, and the output signal is: output signal = signal 1 ′ + (signal 1′−signal 2 ′) × correction coefficient.

Here, assuming that both the correction coefficient and the color mixing ratio are positive values sufficiently smaller than 1, the output signal 出力 signal 1− (signal 1−signal 2) × color mixing ratio + (signal 1−signal 2) x correction coefficient

Further, if the correction coefficient is selected so that the color mixing ratio ≒ the correction coefficient, the output signal ≒ the signal 1 and the change in the signal due to the crosstalk can be corrected. As is apparent from this, the correction coefficient set externally in accordance with the color mixing ratio is also a value determined by the characteristics of the sample and hold circuit 104 in the signal processing system of the output signal of the CCD solid-state imaging device.

As described above, when the output signal of the color CCD solid-state image pickup device is sampled and held, and the digitized signal is processed, the signal level of the signal input one bit ahead and the next input signal By subtracting the signal level of the signal after the bit and multiplying the subtracted output by a positive correction coefficient to obtain a correction amount, adding this correction amount to the signal input one bit ahead and outputting the same. Crosstalk (color mixture) generated in the sample hold can be corrected well.

As a result, since the original signal can be recovered, the subsequent signal processing system (the DSP circuit 10 in FIG. 3)
A good image can be reproduced by using the imaging signal subjected to various signal processing in 6). Moreover, as is apparent from FIG. 1, the signal processing circuit for correction is provided by the register 1
Since this is a very simple circuit comprising 1, subtractor 12, multiplier 13 and adder 14, the intended purpose can be achieved without adding a complicated circuit.

In the above embodiment, the case where the output signal of the color CCD solid-state image pickup device is sampled and held, and then the digitized signal is processed by the present signal processing circuit, but the present invention is not limited to this. In general, a signal having a periodicity that has passed through a sample-and-hold circuit, particularly a signal having a large amount of change in signal level for each bit, is to be processed.

[0030]

As described above, according to the present invention,
In a signal processing circuit having periodicity that has passed through a sample-and-hold circuit, the signal level of the signal input one bit later is subtracted from the signal level of the signal input one bit ahead, and a positive The result of multiplying by the correction coefficient is used as a correction amount, and this correction amount is added to the signal input one bit ahead and output, whereby the crosstalk generated in the sample hold can be corrected favorably. , The original signal can be recovered.

Further, when the output signal of the solid-state image pickup device having a color filter is sampled and held, and then digitized and processed, the signal level of the signal input one bit ahead and one bit after the next input The signal level of this signal is subtracted, the result obtained by multiplying the subtracted output by a positive correction coefficient is used as a correction amount, and this correction amount is added to the signal input one bit ahead and output, thereby obtaining a sample hold. Since the original signal can be recovered by satisfactorily correcting the crosstalk generated in the above, a good image can be reproduced.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a diagram showing a primary color Bayer array of a color filter.

FIG. 3 is a block diagram showing a processing system of an output signal of a CCD solid-state imaging device.

FIG. 4 is a circuit diagram illustrating an example of a circuit configuration of a sample and hold circuit.

FIG. 5 is a waveform diagram showing a crosstalk phenomenon.

[Explanation of symbols]

11 register, 12 subtractor, 13 multiplier, 14
Adder, 101: CCD solid-state imaging device, 102: CDS
(Correlated double sampling) circuit, 104: sample and hold circuit, 106: DSP (digital signal processing) circuit

Claims (5)

[Claims] 1. A processing circuit for a signal having a periodicity that has passed through a sample-and-hold circuit, comprising: delay means for delaying an input signal by one bit; and signal level of the signal delayed by one bit by the delay means. Subtracting means for subtracting the signal level of a signal inputted one bit after the signal from the input means; multiplying means for multiplying the subtraction result of the subtracting means by a positive correction coefficient; A signal processing circuit comprising: an adding unit that adds a multiplication result of the unit. 2. The signal processing circuit according to claim 1, wherein the correction coefficient is determined based on characteristics of the sample and hold circuit. 3. The signal processing circuit according to claim 1, wherein the signal input to the sample hold circuit is an output signal of a solid-state imaging device having a color filter of a predetermined color arrangement on a light receiving surface. . 4. A processing method for sampling and holding an output signal of a solid-state imaging device having a color filter having a predetermined color arrangement on a light receiving surface, and then digitizing and processing the signal, wherein a signal input one bit ahead Subtracting the signal level of the next input signal from the signal level of the above, adding the result obtained by multiplying the subtracted output by a positive correction coefficient to the signal input one bit ahead, and outputting the result. Output signal processing method for a solid-state imaging device. 5. The method according to claim 4, wherein the correction coefficient is determined based on characteristics of a circuit that performs the sample and hold.