JPH11177357A - Variable gain amplifier circuit - Google Patents

Abstract

(57) Abstract: A variable gain amplifying circuit capable of setting a gain to a predetermined value is realized by a CMOS circuit, which has a small variation in gain and can be easily corrected. Kind Code: A1 The input terminals Vin +, Vin- and the output terminals I +, I- of a plurality of voltage input-current output type differential amplifiers A0-An having mutually preset mutual conductances Gm0-Gmn are commonly connected. Then, the selection control units S0 to Sn selectively operate the differential amplifiers A0 to An by the programmable control signals N0 to Nn. Preferably, a CMOS resistor capable of supplying a bias from the outside is connected to the source coupling part of the differential pair in the voltage / current converter of each of the differential amplifiers A0 to An.

Description

DETAILED DESCRIPTION OF THE INVENTION

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a variable gain amplifying circuit, and more particularly to a complementary metal oxide semiconductor capable of setting a gain to a predetermined value.
The present invention relates to a variable gain amplifier circuit using a conductor (CMOS).

In recent years, CMOS LSI (Large Scale In)
Integrated circuits) have become the mainstream of LSIs due to their high integration and low power consumption. In addition, an analog / digital hybrid L in which a digital circuit and an analog circuit are mixed.
The need for SI is increasing because reliability can be improved and cost can be reduced.

[0002] Such an analog / digital hybrid LS
In order to implement I in CMOS, analog circuits must be CM
It is necessary to convert to OS.

[0003]

2. Description of the Related Art FIG. 7 shows a conventional variable gain amplifier circuit using a bipolar element.
0, 310 and two differential amplifiers 400, 410.

The constant current circuit 300 includes a current source including an operational amplifier OP1, a transistor Q15, and a resistor Rf1, and a current mirror circuit including transistors Q1 and Q2 connected to the collector of the transistor Q15, which is the output terminal of the current source. And a current mirror circuit including transistors Q3 and Q4 connected to the collector of the transistor Q2, which is the output terminal of the current mirror circuit.

The constant current circuit 310 has the same configuration as the constant current circuit 300, and includes an operational amplifier OP1, a resistor Rf1, and transistors Q15, Q1, Q in the constant current circuit 300.
Op amp OP2 instead of 2, Q3, Q4,
Resistance Rf2, transistors Q16, Q11, Q12, Q
13, Q14.

The differential amplifier 400 includes transistors Q5,
This is a differential amplifier circuit composed of Q6 and resistors Re1 and Re2. The bases of transistors Q7 and Q8 are connected to inputs Vin + and Vin−, respectively, and the collectors are connected to the bases of transistors Q9 and Q10, respectively. It is connected to the emitters of transistors Q5 and Q6. The bases and collectors of the transistors Q5 and Q6 are commonly connected to a power supply Vcc.

[0007] The resistors Re1 and Re2 having the same resistance value are:
One end is connected to the emitters of the transistors Q7 and Q8, and the other terminal is connected to the transistor Q4 of the constant current circuit 300.
Are commonly connected to the collector.

The differential amplifying section 410 includes transistors Q9,
This is a differential amplifier circuit composed of Q10 and resistors Rc1 and Rc2. The collectors of transistors Q9 and Q10 are connected to outputs Vout + and Vout-, respectively, and the emitter is connected to the collector of transistor Q14 of constant current circuit 310. I have. Load resistors Rc1 and Rc2 having the same resistance value
Has one end connected to the collectors of the transistors Q9 and Q10, and the other terminal commonly connected to the power supply Vcc.

In operation, the value of the collector current of the transistor Q1 of the constant current circuit 300 becomes the same as the value of the collector current I1 of the transistor Q15 (= reference voltage Vref / resistance Rf1) determined by the input voltage Vref and the resistance Rf1.
The collector current value of the transistor Q2 forming a current mirror circuit together with the transistor Q1 is also equal to the current value I1. Therefore, the collector current of the transistor Q3 becomes the same as the current value I1. Therefore, the value of the collector current of the transistor Q4 forming the current mirror circuit with the transistor Q3 is the current value I1. This current value I1 is set as 2Iref for convenience of calculation.

The collector current value of the transistor Q14 of the constant current circuit 310 (set as 2Ivar) is determined by the constant current circuit 30
Similarly to 0, current value I2 = control voltage Vvar / resistance Rf2.

A differential amplifier circuit composed of two stages of differential amplifier sections 400 and 410 constitutes a mutual conductance amplifier circuit utilizing the dependency of the mutual conductance of transistors Q7 to Q10 on the emitter current bias. . The gain coefficient G at this time is expressed by the following equation (1).

G = Vout / Vin = (Rc1 / Re1) × (Ivar / Iref) Equation (1)

That is, it is shown that the gain coefficient G is determined by the multiplication value of the resistance ratio and the current ratio. Therefore, the gain coefficient G can be varied by controlling the reference current Iref and the control current Ivar.

[0014]

When such a conventional variable gain amplifier circuit is formed of CMOS, the following problem arises. (1) Since the mutual conductance Gm of the CMOS transistor does not vary linearly with respect to the reference current Iref and the control current Ivar of the differential pair in the differential amplifier circuit, it is difficult to vary the gain with the current ratio.

(2) Further, the transconductance Gm
Includes parameters that are easily affected by the manufacturing process, such as the effective mobility of carriers and the gate oxide film capacity per unit area. Therefore, there are manufacturing variations other than absolute variations, and it is difficult to correct the gain. (3) Since the reference current Iref and the control current Ivar of the differential pair are directly controlled, the circuit configuration is not suitable for a CMOS having a large variation in element characteristics.

Accordingly, the present invention provides a variable gain amplifying circuit capable of setting a gain to a predetermined value.
It is an object of the present invention to realize a circuit which is less likely to vary in gain and is easily corrected when S is used.

[0017]

In order to solve the above-mentioned problems, a variable gain amplifier circuit according to the present invention has input terminals V + and V- and output terminals I + and I- commonly connected as shown in FIG. A plurality of voltage input-current output type CMOS differential amplifiers A0-An having mutually preset transconductances Gm0-Gmn, and differential amplifiers A0-A0;
An is constituted by selection control units S0 to Sn that selectively perform an operation based on programmable control signals N0 to Nn.

That is, this variable gain amplifier circuit has a plurality of CMOS differential amplifiers A0 to A0 having voltage / current conversion characteristics.
The transconductances Gm0 to Gmn of the differential amplifiers A0 to An are individually set in advance. Then, the voltage input terminals V +, V- and the current output terminals I +, I- of the respective differential amplifiers A0 to An are commonly connected, and the voltage input terminals Vin +, Vin- and the current output terminals Iout +, Iout +, Iout-.

The variable gain amplifier circuit further includes selection control units S0 to Sn, and these selection control units S0 to Sn
Selects or deselects the differential amplifiers A0 to An as the components of the variable gain amplifier circuit based on the control signals N0 to Nn, respectively.

As a result, only the output currents of the selected differential amplifiers are added at the current output terminals Iout + and Iout-, and the transconductance Gm of the entire variable gain amplifier circuit is reduced by the selected differential amplifier. Is the sum of the mutual conductances.

Therefore, by appropriately setting (programming) the control signals N0 to Nn, a predetermined mutual conductance Gm can be realized. Therefore, it is possible to correct the fluctuation of the current amplification factor (gain), which is the output signal current value obtained by multiplying the input signal voltage by the transconductance, due to the variation in the element characteristics of the CMOS process.

In the present invention, the differential amplifiers A0 to A0
An is configured by a voltage / current conversion unit forming a differential pair, and a current mirror unit that supplies a current to the voltage / current conversion unit, and the selection control unit controls the differential amplifier to control the differential amplifier. The current mirror unit can be operated only when selecting.

That is, the differential amplifier A0 according to the present invention
To An perform voltage / current conversion of the differential voltage between the voltage input terminals V + and V− by the voltage / current converter, and output a differential current to the current output terminals I + and I−. This voltage / current converter is supplied with a constant current from a current mirror unit.

The selection control sections S0 to Sn turn on / off the current mirror section in accordance with the control signals N0 to Nn, respectively, and programmably select / deselect the differential amplifiers A0 to An to operate / deactivate. State.

In the present invention, the differential amplifiers A0 to A0
An operates by the selection control unit in place of the differential amplifier only when the control signal does not select the differential amplifier, and outputs the same current as the current flowing through the differential amplifier when there is no signal input. It may further include a reference current source for outputting to the terminal.

That is, each of the differential amplifiers A0 to An includes a reference current source that outputs the same current as the current flowing through the differential amplifiers A0 to An when there is no signal input. And
The output terminals are connected to the current output terminals I +, I- of each differential amplifier.
Connect to Each of the reference current sources is controlled by the selection control units S0 to Sn only when the control signals N0 to Nn do not select the differential amplifiers A0 to An.
Works instead of n.

As a result, when the operation of the differential amplifier is stopped by the selection control unit, instead, the reference current source outputs the same current as the output current output by the differential amplifier when there is no signal input. Becomes possible. That is, when the operation of the differential amplifier is stopped, the reference current flowing even when there is no signal input is not output to the output terminals Iout + and Iout-, and the output reference current of the entire variable gain amplifier circuit fluctuates. This can be compensated for by the current of the reference current source.

Further, in the present invention, a resistor may be connected to the source coupling part of the differential pair in the above-mentioned voltage / current converter.

That is, a resistor as a parameter of the transconductance of the differential pair can be connected between the sources of the transistors of the differential pair in the voltage / current converter.

According to the present invention, a CMOS resistor capable of supplying a bias from the outside can be connected instead of the above resistor.

That is, a MOS resistor capable of supplying a bias from the outside can be connected instead of the resistor connected to the source coupling portion of the differential pair.

As a result, the value of the mutual conductance of the differential amplifier can be made variable by supplying a bias to the MOS resistor. It is possible to widen the adjustment range of the mutual conductance (therefore, current amplification factor) of each differential amplifier and the entire variable gain amplifier circuit.

Further, the variable gain amplifier circuit according to the present invention may further include an active load connected to the output terminal.

That is, in FIG. 1, by connecting active loads Z1 and Z2 (portions surrounded by broken lines) to the current output terminals Iout + and Iout- of the variable gain amplifier circuit, the current output is converted into a voltage output, and the gain is changed. The entire variable amplifier circuit can be a voltage / voltage conversion circuit.

Further, in the present invention, a resistor may be used as a load instead of the active loads Z1 and Z2.

That is, even if the active loads Z1 and Z2 are fixed resistors, the circuit becomes a voltage / voltage conversion circuit.

[0037]

FIG. 2 shows an embodiment (1) of a variable gain amplifying circuit according to the present invention. In this embodiment, the amplifier and selection control section of the variable gain amplifying circuit shown in FIG. Is four.

That is, the input terminals V + and V- of the four differential amplifiers A0 to A3 are connected to the input terminals Vin + and Vin, respectively.
− And the output terminals I of the differential amplifiers A0 to A3.
+ And I− are commonly connected to output terminals Iout + and Iout−, respectively. Selection control units S0 to S3 are connected to the differential amplifiers A0 to A3, respectively.

The differential amplifiers A0 to A3 compare the relative ratios of the respective reference currents with the corresponding control signals N0 to N4.
By setting (“1” / “0”) as the ratio of the weight of each bit as a 4-bit binary code, predetermined transconductance (for example, “2”, “4”, “8”, “16”)
mho). And the differential amplifiers A0 to A3
Are selectively controlled by setting (programming) control signals N0 to N3 (for example, “1”, “0”, “1”, “1”) in the selection control units S0 to S4, and the differential amplifiers A0 and A2 ,
A3 is selected.

The mutual conductance of the entire variable gain amplifier circuit is determined by the mutual conductances Gm0, Gm2, Gm4 (“2”, Gm4) of the selected differential amplifiers A0, A2, A3.
That is, the sum of “8” and “16”) is set to “26”.

As a result, even if the characteristics of the mutual conductance Gm of the differential amplifiers A0 to A3 deviate from the initial set values due to manufacturing variations due to the CMOS process, etc., the differential amplifiers A0 to A3 are selectively controlled by the control signals to control the differential amplifiers A0 to A3. Selection and adjustment to a predetermined value can be easily performed.

Further, if the number of parallel stages of the differential amplifier is increased, the mutual conductance of each amplifier is adjusted to the number of stages K, for example, binary code (1, 2, 4,... 2 ^{K -1} )).
By appropriately selecting an amplifier from the differential amplifiers, the mutual conductance of the entire variable gain amplifier circuit can be accurately set to a predetermined value.

FIG. 3 shows an embodiment (2) of the variable gain amplifier circuit according to the present invention. The output load is connected between the output terminals Iout + and Iout- of the variable gain amplifier circuit shown in FIG. 1 and the power supply VDD. And active loads Z1 and Z2, respectively.

The active loads Z1 and Z2 are connected to a bias voltage VB.
+ And transistors M and Mc controlled by the bias voltage VB-.
b and Md are connected in cascade.

In operation, a composite wave of the differential amplifiers A0 to An can be taken out as a voltage output by a voltage drop caused by the active loads Z1 and Z2.

As a result, the variable gain amplifying circuit becomes a voltage / voltage converting circuit whose gain is variable depending on the bias voltages Vb + and Vb-. Note that the active loads Z1 and Z2 may be simply resistors.

FIG. 4 shows an embodiment (1) of the differential amplifier according to the present invention shown in FIGS. 1 to 3, which includes a voltage / current conversion section 100, a current mirror section 210 and a selection control section S. And a current control unit 200.
Note that the selection control unit S corresponds to the selection control units S0 to Sn shown in FIGS.

The voltage / current converter 100 is a differential amplifier composed of transistors M1 and M2 and a resistor R. That is, the gates and drains of the transistors M1 and M2 are connected to the voltage input terminals V + and V− and the current output terminal I, respectively.
+, I-, a resistor R is connected between the sources (source coupling section), and the source is connected to the current mirror section 2.
10 is connected.

The resistor R has the function of operating the transistors M1 and M2 as a differential pair to make the output currents I + and I- symmetrical to each other. However, the transistors M5 and M6 are connected to the current mirror by the cascade current sources Is and M20. You can omit it.

The selection control section S is an inverter circuit composed of cascade-connected transistors M17 and M18. That is, the drain of the transistor M17 is
The source of the transistor M18 is connected to the ground Gnd, and the transistors M17 and M18 are connected to the power supply VDD.
Are commonly connected to a control signal terminal N.

The source of the transistor M17 and the drain of the transistor M18, which are the output terminals of the inverter circuit, are connected to the current mirror unit 210.

The current mirror unit 210 includes transistors M5 and M9 and a transistor M
6, M10 and transistors M13, M14. The gates of the transistors M5 and M6 are commonly connected to the cascade current source Is and the transistor M20 to form a current mirror, and the drains are connected to the transistors M1 and M2 of the voltage / current converter 100, respectively. It constitutes a constant current source for supplying current.

The drain and gate of the transistor M13 are connected to the power supply VDD and the control signal terminal N, respectively, and the source and gate of the transistor M14 are connected to the ground Gnd and the output terminal of the inverter circuit, respectively. The transistors M13 and M14 form a buffer circuit, and the source of the transistor M13 and the drain of the transistor M14 are connected and serve as output terminals.

The gates and sources of the transistors M9 and M10 are respectively connected to the output terminal of the buffer circuit and the ground Gnd, and the drains are respectively connected to the sources of the transistors M5 and M6 constituting the current source circuit.
The circuit turns on / off this current source.

In operation, when "1" (positive logic, the same applies hereinafter) indicating selection is set to the control signal terminal N, the output of the inverter circuit becomes "0". Therefore, "1" and "0" are input to the gates of the transistors M13 and M14, respectively, and the output of the buffer circuit becomes "1". The transistors M9 and M10 to which the output signal "1" has been input are turned on, and the differential pair of the transistors M1 and M2 is turned on.

When "0" indicating non-selection is set to the control signal terminal N, the transistors M9 and M10 are turned off, and the differential pair stops operating.

As a result, the differential amplifier A operates as an element of the variable gain amplifier circuit only when "1" is input to the control signal terminal N. The transistors M1,
By setting the size (gate width) of M2 in advance, a desired weighted transconductance Gm can be set.

FIG. 5 shows an embodiment (2) of a differential amplifier according to the present invention. A reference current source 150 and a current mirror connected to the reference current source 150 are added to the differential amplifier circuit shown in FIG. The configuration is such that the unit 210 is further connected.

That is, the transistor M other than the resistor R
1, M2, M5, M6, M9, M10, M13, M14
M3, M4, M7, M8, M1 corresponding to
1, M12, M15, and M16 are added, and each added transistor has the same connection as the corresponding transistor.

However, the sources of the transistors M3 and M4 are short-circuited instead of inserting the resistor R therebetween, the gates are both connected to the bias potential terminal, and the gates of the transistors M15 and M16 are connected to the inverters respectively. The difference is that the output terminal of the circuit and the control signal terminal N are connected.

In operation, the transistors M3, M4
Operates as a reference current source that outputs the same current as the reference currents of the transistors M1 and M2 when no signal is input, and the control signals N select the transistors M11 and M12 that operate as constant current sources. Is set to the "off" state only when "1" is displayed.

[0062]

[Table 1]

Table 1 shows the switching operation of the voltage / current converter 100 and the reference current source 150. When "1" is input to the control signal, the transistors M17, M18 is turned "off" and "on", respectively. Regarding the operations of the voltage / current converter 100 and the current mirror unit on the side of the differential amplifier, the voltage / current converter 100 is brought into the operating state (“ON”) by the operation described with reference to FIG.

On the other hand, the reference current source 150 includes transistors M15 and M16 corresponding to the transistors M13 and M14.
Are input to the transistors M13 and M14, respectively, so that the operation is stopped ("OFF").

Similarly, when “0“ OFF ”” is input to the control signal, the voltage / current converter 100 is in the operation stop state (“OFF”), and the reference current source 150 is in the operation state (“ON”). )).

As a result, the operation of the voltage / current converter 100 and the operation of the reference current source 150 are mutually switched by the control signal. Therefore, even when the differential amplifier is not operating, a current corresponding to the reference current of the differential amplifier is supplied from the reference current source, and fluctuations caused by the switching of the output reference current of the entire variable gain amplifier circuit can be eliminated. it can.

FIG. 6 shows an embodiment (3) of the differential amplifier according to the present invention. The difference from the differential amplifier shown in FIG. 5 is that a bias is supplied from outside instead of the resistor R at the source coupling portion. Is connected.

In operation, the differential amplifier has a resistor M19
Of the differential amplifier constituted by the transistors M1 and M2, the value of the mutual conductance can be adjusted.

As a result, in the variable gain amplifier circuit, fine adjustment of the mutual conductance by adjusting the mutual conductance of each differential amplifier becomes possible in addition to the setting of the mutual conductance by the control signal.

[0070]

As described above, according to the variable gain amplifier circuit of the present invention, the input terminals and the output terminals of a plurality of voltage input-current output type differential amplifiers having mutually preset mutual conductances. Connect the terminals in common,
Since the selection control unit is configured to selectively operate the differential amplifier by a programmable control signal, it is possible to realize a circuit that can be easily corrected with less variation in gain when the CMOS is used.

Also, since a CMOS resistor capable of supplying an external bias is connected to the source coupling portion of the differential pair in the voltage / current converter of each differential amplifier, the mutual connection of each differential amplifier is established. Fine adjustment of conductance (accordingly, current amplification factor) becomes possible, and it is possible to realize a circuit in which the fine adjustment of the gain of the entire variable gain amplifier circuit can be easily performed.

Further, if a programmable control signal is used, it is possible to dynamically change the gain of the variable gain amplifying circuit in operation.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration example of a variable gain amplifier circuit according to the present invention.

FIG. 2 is an embodiment (1) of a variable gain amplifier circuit according to the present invention.
FIG.

FIG. 3 is an embodiment (2) of a variable gain amplifier circuit according to the present invention;
FIG.

FIG. 4 is a circuit diagram showing an embodiment (1) of a differential amplifier in the variable gain amplifier circuit according to the present invention.

FIG. 5 is a circuit diagram showing an embodiment (2) of the differential amplifier in the variable gain amplifier circuit according to the present invention.

FIG. 6 is a circuit diagram showing an embodiment (3) of the differential amplifier in the variable gain amplifier circuit according to the present invention.

FIG. 7 is a circuit diagram showing a configuration example of a conventional variable gain amplifier circuit.

[Explanation of symbols]

 A, A0, A1, ..., An Differential amplifier S ,, S0, S1, ..., Sn Selection control unit Z1, Z2 Active load 100 Voltage / current conversion unit 150 Reference current source 200 Current control unit 210 Current mirror unit 300, 310 Constant current circuit 400, 410 Differential amplification unit In the figures, the same reference numerals indicate the same or corresponding parts.

Claims (7)

[Claims] 1. A plurality of voltage input / current output type CMOS differential amplifiers each having an input terminal and an output terminal commonly connected and having individually set transconductance, and each differential amplifier is controlled by a programmable control signal. A variable gain amplifier circuit, comprising: a selection control section that performs a selection operation; 2. The differential amplifier according to claim 1, wherein the differential amplifier includes a voltage / current conversion unit forming a differential pair, and a current mirror unit that supplies a current to the voltage / current conversion unit. The variable gain amplifier circuit, wherein the selection control section operates the current mirror section only when the control signal selects the differential amplifier. 3. The differential amplifier according to claim 2, wherein the differential amplifier operates in place of the differential amplifier by the selection control unit only when the control signal does not select the differential amplifier, and the differential amplifier operates when there is no signal input. A variable gain amplifier circuit, further comprising a reference current source that outputs the same current as the current flowing through the differential amplifier to the output terminal. 4. The variable gain amplifier circuit according to claim 2, wherein a resistor is connected to a source coupling section of the differential pair in the voltage / current conversion section. 5. The CM according to claim 4, wherein an external bias can be supplied instead of the resistor.
A variable gain amplifier circuit to which an OS resistor is connected. 6. The variable gain amplifier according to claim 1, further comprising an active load connected to the output terminal. 7. The variable gain amplifier circuit according to claim 5, wherein a fixed resistor is used as a load instead of said active load.