JPH11160432A - Optical pulse radar and optical pulse receiver - Google Patents

Abstract

PROBLEM TO BE SOLVED: To optimize the bias voltage of an APD(avalanche photodiode), by providing a control circuit for changing the bias voltage of the APD, in accordance with the number of pulses contained in the output of a noise removing circuit and so on. SOLUTION: A light transmitting circuit 1 radiates preceding and following light pulses at a specified time interval. A light receiving circuit 2 containing an APD 2a receives reflected pulses of the preceding and following light pulses, and outputs preceding and following received light pulse signals. A thresholding circuit 3 compares the preceding and following light pulse signals with a specified reference voltage, and outputs preceding and following binary signals. A noise removing circuit 4 removes noise by forming logical product of a delayed one of the preceding binary signal delayed only by a specified time interval and the following binary signal. A bias voltage control circuit 6 counts the number of pulses in the output of the noise removing circuit 4 or thresholding circuit 3, and changes the bias voltage Va of the APD 2a in accordance with this count number.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an optical pulse radar device used for a berthing speed meter and the like, and more particularly to an optical pulse device having an optimal control function of a bias voltage of an avalanche photodiode (APD). The present invention relates to a radar device and the like.

[0002]

2. Description of the Related Art Conventionally, a reflected light pulse is generated by emitting a pulsed light beam (light pulse) from a light emitting element such as a laser diode and receiving a reflected light pulse generated by reflection by an object. An optical pulse radar device that obtains information on an object such as a distance to the object has been developed. This type of optical pulse radar device is very different from optical communication devices that use high-quality optical fiber or the like as a transmission line. Natural light such as sunlight or artificial light such as illumination light has a considerable amount of background light. Used outdoors to emerge.
For this reason, in order to remove noise or unnecessary signals due to such background light or the like, the light transmitting operation and the light receiving operation of the reflected light are repeated many times in a fixed cycle, and the time-average is performed on the light receiving result. Appropriate statistical processing such as conversion is performed.

In such an optical pulse radar device, an avalanche photodiode (APD) having a photocurrent multiplying action has been used to receive a weak reflected light pulse arriving from a distant place with high sensitivity. Was. In general, A
As shown in FIG. 6, the relationship between the bias voltage Va and the multiplication factor near the breakdown voltage (breakdown voltage Vb) of the PD is such that the multiplication factor sharply changes as the bias voltage increases or decreases. When the bias voltage of the APD exceeds its breakdown voltage, the dark current amplification factor Md continues to increase sharply, but the photocurrent multiplication factor Mp decreases instead, and S / S
N rapidly deteriorates. Therefore, from the viewpoint of optimizing the S / N of the light receiving circuit, the bias voltage of the APD is usually set to a value lower than the breakdown voltage by a predetermined ratio.

The breakdown voltage of the APD is 100
In the range of volts to 150 volts, a temperature characteristic of about 0.6 volt / ° C is shown. To set the bias voltage to a value lower than the breakdown voltage by a predetermined ratio over a wide temperature range, the bias circuit is used for temperature compensation. Are used. Further, there is an automatic gain control loop system for controlling the bias voltage so as to keep the output of the APD constant. In such an automatic gain control loop and the like, as described in JP-A-9-270526 and the like, A
Upper and lower limits may be set for the bias voltage for the purpose of protecting the PD from destruction.

A patent application entitled "Radar apparatus and signal receiving apparatus" related to the earlier application of the present applicant (Japanese Patent Application No. 8-358671).
According to the above, two laser light pulses are separated by a predetermined time set in accordance with the farthest point of the detection limit of the radar device, two laser light pulses are emitted,
By forming a logical product of the preceding light receiving pulse delayed by the above-described predetermined time, only noise components appearing randomly in the preceding and succeeding light receiving pulses are canceled by each other and removed, and S / N There is disclosed a technology for improving the performance. The noise removal technique of the prior application has a great feature in that the noise removal technique is performed not by software processing in a back end such as a data processor in a subsequent stage but by hardware processing in a front end.

[0006]

The above-mentioned signal receiving apparatus of the prior application forms a logical product of a subsequent light receiving pulse received by the APD and a signal obtained by delaying the preceding light receiving pulse by a predetermined time. The S / N of the pulse is improved. As a result, for a light receiving circuit that does not improve the S / N by creating such a logical product at the subsequent stage of the APD,
It has not always been the best to fix N to a value which is lower than a breakdown voltage by a predetermined ratio, that is, an optimum bias voltage which has been set conventionally to maximize N.

Therefore, an object of the present invention is to provide a light receiving circuit for improving the S / N ratio by creating a logical product in a subsequent stage of the APD, or a general light receiving circuit without such an improvement. Another object of the present invention is to optimize the bias voltage dynamically according to the actual situation from the viewpoint of maximizing the S / N.

[0008]

An optical pulse radar apparatus according to a first aspect of the present invention operates by receiving a light transmitting circuit for emitting preceding and succeeding optical pulses at predetermined time intervals, and receiving a changeable bias voltage. A light receiving circuit including an avalanche photodiode that receives reflected pulses of the emitted preceding and succeeding light pulses and outputs preceding and succeeding light receiving pulse signals; and the preceding and following light receiving pulse signals and a predetermined reference. 2 for comparing the voltage and outputting a preceding and succeeding binary signal
A binarization circuit, a noise elimination circuit that eliminates noise by creating a logical product of the preceding binarized signal delayed by the predetermined time interval and the subsequent binarized signal, A bias voltage control circuit that counts the number of pulses in the output of the noise removal circuit or the binarization circuit and changes the bias voltage of the avalanche photodiode in accordance with the counted number.

An optical pulse radar apparatus according to a second aspect of the present invention is obtained by removing the noise removing circuit from the optical pulse radar apparatus according to the first aspect. The third and fourth inventions are optical pulse light receiving circuits constituted by removing the light transmitting circuit from the optical pulse radar devices of the first and second inventions.

[0010]

According to a preferred embodiment of the present invention, the bias voltage of the avalanche photodiode has a breakdown voltage when the number of the counted binary signals is less than a predetermined value. The voltage is set to a value substantially equal to the voltage, and is configured to be decreased from a value substantially equal to the breakdown voltage with an increase in the number of the counted binary signals.

According to another preferred embodiment of the present invention,
The predetermined time interval for emission of the light pulse in the light transmitting circuit is set by using a delay circuit for delaying the binarized signal in the noise removing circuit by the predetermined time. In addition, the accuracy is prevented from deteriorating due to the delay time shift, the manufacturing cost is reduced, and the apparatus is downsized. According to yet another preferred embodiment of the optical pulse radar device of the present invention, the emission of the preceding and succeeding optical pulses is repeated at predetermined time intervals.

[0012]

FIG. 1 is a block diagram showing the configuration of an optical pulse radar apparatus according to an embodiment of the present invention, wherein 1 is a light transmitting circuit including a laser diode 1a and a driving circuit 1b, and 2 is a light transmitting circuit.
A light receiving circuit including a PD 2a, a resistor and a capacitor, a binarizing circuit including a voltage comparator and a reference voltage source, a noise removing circuit including a delay circuit 4a and a two-input AND gate 4b, and a distance measuring circuit , 6 are bias voltage control circuits, and 7 is a bias voltage supply circuit.

In the delay circuit 4a in the noise elimination circuit 4, the pulsed laser light radiated from the light transmitting section 1 has a maximum length of 200 meters which is set in advance as a detection limit of the optical pulse radar apparatus of this embodiment. Go back and forth to the far point (total
(Propagating over a distance of 400 meters). This delay time is theoretically 1.33 μsec, but in practice, a certain margin is added to this theoretical value considering the delay time temperature change, and a delay of 1.45 μsec (at an ambient temperature of 20 ° C) The time is set. The delay circuit 4a includes, for example,
This is realized by serially connecting approximately 120 74AC04s each having a structure in which six inverters each having a delay time of 2 nsec are connected in series.

The temperature characteristic of the delay circuit 4a is 2nsec / ° C.
The assumed ambient temperature of this type of radar apparatus intended for outdoor use covers a wide range from -40 ° C to + 80 ° C. Although two such delay circuits are required for delaying the transmission timing signal and for delaying the binarized signal to be subjected to noise removal, each delay circuit is used to remove only the noise without erasing the signal. The delay times set in the circuit must exactly match. However, considering the temperature change rate and the wide temperature range, it is extremely difficult to make the delay times of the two delay circuits accurately coincide over the entire temperature range. Therefore, by adopting a configuration in which such a delay circuit is used for delaying the transmission timing signal and for delaying the binarized signal to be subjected to noise removal, the delay times are made to match over a wide temperature range. In addition, since such a delay circuit is large and expensive, the use of the same delay circuit has reduced the size and the cost of the optical pulse radar device as a whole.

The light transmitting circuit 1 includes a Schmitt trigger circuit 1c, 1 in addition to the laser diode 1a and its driving circuit 1b.
d, low-pass filters 1e and 1f, and a transmission timing signal generation circuit 1g. The period as shown in the waveform diagram of FIG. 3 generated by the transmission timing signal generation circuit 1g.
The 3.33 msec transmission timing signal a is supplied to the noise elimination circuit 4.
After passing through an OR gate 4c, one is divided into two, one of which is supplied to a delay circuit 4a, and the other is inputted to a Schmitt trigger circuit 1c via a low-pass filter 1e. The Schmitt trigger circuit 1c generates a sharp pulse in synchronization with the rising edge of the transmission timing signal, and this pulse is supplied to the laser diode drive circuit 1b. The laser diode drive circuit 1b operates in synchronization with this sharp pulse, and a sharp pulse-like laser beam having a half width of several nanoseconds is emitted from the laser diode.

On the other hand, the OR gate 4c in the noise elimination circuit 4
The transmission timing signal supplied to the delay circuit 4a through the delay circuit is delayed by 1.45 .mu.sec by this delay circuit and then divided into two, one of which is supplied to one input terminal of a two-input AND circuit, and the other is a low-pass filter 1f. Is supplied to the Schmitt trigger circuit 1d. The Schmitt trigger circuit 1c generates a sharp pulse in synchronization with the rising edge of the transmission timing signal delayed by 1.45 μsec,
This is supplied to the laser diode drive circuit 1b. The laser diode drive circuit 1b operates in synchronization with the sharp pulse, and a sharp pulse-like laser beam having a half width of several nsec is emitted from the laser diode.

As described above, a pair of light pulses composed of the preceding and succeeding light pulses is emitted from the light transmitting unit 1 at an interval of 1.45 μsec determined from the detection limit of the farthest point and the temperature characteristic of the delay circuit. You. The emission of a pair of optical pulses by the light transmitting unit 1 is repeated at a period of 3.33 msec. This 3.33mse
The light transmission cycle of c is performed within the laser drive circuit 1b and the JIS safety standard for energy density, which is determined so that no failure occurs even if a user of the radar apparatus receives a laser pulse by mistake. The setting is made in consideration of the time required for charging the high-voltage charge / discharge circuit.

The light pulse radiated from the light transmitting section 1 is reflected by an object to be detected or the like, and enters the APD 2a of the light receiving circuit 3 as a reflected light pulse. The reflected light pulse appears as a preceding and succeeding reflected light pulse also at an interval of 1.45 μsec, corresponding to the preceding and succeeding optical pulse emitted from the light transmitting unit 1 at an interval of 1.45 μsec. APD2a is
It operates under the bias voltage Va near the breakdown voltage Vb supplied from the bias voltage supply circuit 7, and becomes a low impedance breakdown state each time each of the reflected light pulses enters. The voltage Vs at one input terminal is increased. Along with this breakdown, the voltage between the terminals of the APD 2a drops below the breakdown voltage. As a result, the APD 2a returns to the state immediately before the breakdown in a very short time.

Accordingly, the voltage Vs output from the light receiving circuit 2 changes in a pulse-like manner such that the voltage Vs rises sharply and falls sharply each time the preceding and succeeding reflected light pulses enter. The voltage comparator 3 converts the input analog voltage Vs into a digital signal by raising its output from low (0 volt) to high (5 volt) for a very short time when the voltage Vs exceeds the reference voltage Vref. Output.

The digital signal output from the voltage comparator 3 passes through an OR gate 4c in the noise removal circuit 4 at the subsequent stage and is divided into two, one of which is directly supplied to one input terminal of a two-input AND gate 4b. The other is supplied to the other input terminal of the two-input AND gate 4b after receiving a delay of 1.45 .mu.sec in the delay circuit 4a. The preceding one of the pair of reflected pulses is 1.45 μm in the delay circuit 4a.
After the delay, the signal is supplied to one input terminal of the two-input AND gate, and at the same time, the subsequent signal radiated from the light transmitting unit 1 with a delay of 1.45 μsec and reflected by the object is directly transmitted without passing through the delay circuit 4a. When supplied to the other input terminal of the two-input AND gate 4b, the two-input AND gate 4b outputs a reception signal from which noise has been removed. The reason why the noise of the received signal is removed by the circuit combining the delay circuit 4a and the two-input AND gate 2b is as follows.

That is, as exemplified in the waveform diagram of FIG. 4, the analog voltage Vs output from the light receiving circuit 2 includes:
Includes noise components such as shot noise exemplified by thin vertical lines in addition to signal components due to reflected light exemplified by thick vertical lines,
The binarized output is like Ds. The analog voltage Vs and the binarized output Ds at two time points separated by 1.45 μsec are as illustrated with subscripts 1 and 2, respectively, and the logical product of the binarized outputs Ds1 and Ds2 is noise removal. It becomes signal C. Signals appearing in each of the binarized outputs Ds1 and Ds2 have a correlation, but noise appearing at random has no correlation, so most of them are removed by ANDing. However, a random noise component generated at the same point by chance and an unnecessary component lacking perfect randomness generated due to background light or the like may be left in the noise removal signal C even after one transmission cycle.

The distance measuring circuit 5 performs statistical processing on the received light signal C containing some noise supplied from the noise removing circuit 4 to separate the signal component from the noise component and extract the signal component. At the time of light reception. The distance measurement circuit 5 measures the time of receiving the measured reflected pulse light and 1.45 μsec.
The propagation time required for the laser beam to reciprocate from the object is detected from the difference from the light transmission time point indicated by the transmission timing signal delayed by the delay time, and half of the time is divided by the speed of light to reduce the reflection. The distance to the generated object is calculated and displayed.

The light reception signal extraction performed in the distance measuring circuit 5 is such that the light reception signal appears at the same time every time unless the speed of the object that has generated the reflected light is extremely high. This is done using the property that is not always the case. The process of extracting the received light signal is realized by hardware processing by a logic circuit or software processing by a digital processor. In order to simplify the distance measurement circuit 5 and improve the processing speed, it is necessary to reduce the processing load. For this purpose, it is necessary to remove noise components as much as possible in the preceding stage.

As one method for achieving this object,
It is conceivable that the above-described noise removing circuit 4 is connected in series over many stages. However, the delay circuit 4a
As described above, since a large number of gate circuits are connected in series, the circuit becomes large and expensive.Therefore, a configuration in which the circuits are connected in multiple stages has a problem that the radar apparatus as a whole becomes large and expensive. is there.

Therefore, in this embodiment, the noise removal circuit 4
The number of pulses indicating the amount of noise that could not be completely removed and contained in the noise-removed signal C output from is counted by the bias voltage control circuit 4, and the larger the counted value is, the more supplied to the light receiving circuit 2. Control signals i and j for controlling the bias voltage to decrease from the breakdown voltage are supplied to the bias voltage supply circuit 7. This is because the bias voltage of the APD is closer to its breakdown voltage as the number of pulses included in the noise-removed signal increases, and it can be considered that a large amount of shot noise is generated.

The bias voltage supply circuit 7 includes a transistor Q, a shunt regulator SR, and diodes d1, d2, d3 for temperature compensation. The reference terminal voltage Vr of the shunt regulator SR changes according to the combination of low (0 V) / high (5 V) of the control signal (i, j) supplied to the input terminals I ₁ and I ₂ from the bias voltage control circuit 6. , With an increase in the pulse count,
The bias voltage value supplied to the light receiving circuit 2 is reduced from the breakdown voltage. If a breakdown voltage of 150 volts is selected as the APD 2a, the breakdown voltage increases with temperature at a rate of 0.6 volt / ° C. As resistance values of the resistors r1 to r6, 1M
Ω, 10 KΩ, 68 KΩ, 10 KΩ, 1 MΩ, 510 KΩ, AP
In order to compensate for the temperature characteristic of D, a forward voltage V is applied between the reference terminal of the shunt regulator SR and the ground.
Three temperature-compensating silicon diodes d1, d2 and d3 having a temperature characteristic of d of -2 mV / ° C are connected in series.

That is, since the reference terminal voltage Vr of the shunt regulator changes with a temperature coefficient of about 6 mv / ° C, the bias voltage Va is Va = (Vr−Vd + 6 mv / ° C · ΔT ° C) (1 + r1)
/ R2), and the bias voltage Va changes in temperature with a slope of 600 mv / ° C.

FIG. 2 is a circuit diagram showing an example of the configuration of the bias voltage control circuit 6 of FIG. 1. 11 to 17 are various gate circuits, 20, 21, and 22 are counters, 23 to 26 are latch circuits, and 27 are latch circuits. 29 to 29 are input terminals, and 30 to 33 are signal output terminals. In addition, various signal lines with the same alphabets b to j shown in FIG. 3 appear on the various signal lines to which the lowercase alphabets b to j shown in FIG. 2 are assigned. Hereinafter, the operation of the bias voltage control circuit of FIG. 2 will be described with reference to the waveform diagram of FIG.

Two 4-bit counters 2 connected in cascade
Reference numerals 1 and 22 are used to count the number of pulses remaining in the signal from which noise has been removed. Each of the transmission timing signals has a period of 3.33 msec supplied to the input terminal 28 prior to the start of the counting. Cleared by the timing signal k delayed by 1.45 μsec. The delayed transmission timing signal k is supplied to AND gates 13 and 14
1.45μ after the rising edge of the transmission timing signal
A noise count gate signal b that rises with a delay of sec and remains high for 1.45 μsec is generated.

By the noise count gate signal b,
1.45 μsec after the rise of the transmission timing signal 1.
The NAND gate 11 is opened for a period of 45 μsec,
The number of pulses remaining in the noise-eliminated signal c output from the noise elimination circuit 4 and supplied to the counters 21 and 22 via the input terminal 27 and the NAND gate 11 is counted. The MSB (d) of the counter 21 and the LSB (e) of the counter 22 are obtained by synchronizing with the latch pulse supplied from the inverter 15 to each of the latch circuits 23 and 24 when the noise count gate signal falls. And 24, respectively, to generate binary signals f and g.

The MSB of the counter 21 and the LSB of the counter 22 held in each of the latch circuits 23 and 24 are transferred from the frequency dividing circuit composed of the 4-bit counter 20 and the bit selection switch 18 to the latch circuits 25 and 26. The latch circuits 25 and 26 are synchronized with the supplied latch pulse h.
To generate binary signals i and j. These binary signals i and j are supplied to input terminals I ₁ and I ₂ of the bias voltage supply circuit 7 of FIG. 2 via output terminals 30 and 31. As a result, the bias voltage is changed over four ranges in accordance with the range of the four types of count values specified by the combination of the high or low of the MSB (d) of the counter 21 and the LSB (e) of the counter 22.

The relationship among the number of pulses, the bit of the counter, and the bias voltage is as follows. Here, Vb is a breakdown voltage. in this way,
If the number of pulses is 7 or less, the bias voltage is APD
And the voltage is gradually reduced from the breakdown voltage as the number of pulses increases.

The MSB and LSB of the counters 21 and 22 held in the latch circuits 23 and 24 are not immediately output to the output terminals 30 and 31, but the transmission cycles of the counters are determined by using the latch circuits 25 and 26 and the frequency dividing circuit. The output to the output terminals 30 and 31 only once is performed several times in order to avoid the frequent rise and fall of the bias voltage when the output is performed every time in the transmission cycle. The MSB and LSB of the counters 21 and 22 held in the latch circuits 23 and 24 are supplied to the distance measurement circuit 5 of FIG. The distance measurement circuit 5 detects the reliability of a signal pulse separated from noise based on the number of pulses measured by the bias voltage control circuit 6 from the MSB and LSB of the counters 21 and 22 supplied from the output terminals 32 and 33. I do.

Based on the feedback control of the bias voltage, the number of pulses in the binary signal before the noise removal by the noise removal circuit 4 is reduced as shown in the waveform diagram of FIG. Is realized in which only the signal is included in the binarized signal.

The configuration in which the noise removal circuit 4 is provided between the voltage comparator 3 and the distance measurement circuit 5 and the bias voltage control circuit 6 has been described above. However, it is also possible to adopt a configuration in which the output terminal of the voltage comparator 3 is directly connected to the input terminals of the distance measurement circuit 5 and the bias voltage control circuit 6 without installing the noise removal circuit 4.

Also, assuming that the farthest point that can be detected is 200 meters, the delay time of the noise removal circuit corresponding to this point is
A value of 1.45 μsec was set. However, the farthest point that can be detected can be set up to a range of several meters, and a delay time corresponding to this farthest point can be set.

Further, since the output of the emitted laser beam can be reduced as the farthest point is shortened, the energy density J
By shortening the repetition period defined by the IS safety standard to the extent of the delay time, the two can be matched.

Further, an example has been described in which the pulse is counted over a period in which the appearance of a signal is expected. However, since the counting of the pulses is the counting of the pulses generated based on the noise, the counting period may be a period in which no signal is expected to appear or a period including both. The pulse counting period can be set to any appropriate length.

[0039]

As described in detail above, the optical pulse radar device and the optical pulse light receiving device of the present invention are provided with a binary signal,
Alternatively, the number of binarized signals from which noise has been removed by the autocorrelation operation is counted, and the bias voltage of the APD is changed so as to decrease as the number increases. The effect that the bias voltage can be optimized from the viewpoint of maximizing the S / N for a light receiving circuit that improves the / N or a general light receiving circuit that does not make such an improvement. Is played.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a pulse laser radar device according to one embodiment of the present invention.

FIG. 2 is a circuit diagram illustrating an example of a configuration of a bias voltage control circuit in FIG. 1;

FIG. 3 is a waveform chart for explaining the operation of the pulse laser radar device of the embodiment.

FIG. 4 is a waveform diagram for explaining a function of the noise removing circuit 4 of FIG. 1;

FIG. 5 is a waveform chart for explaining a function of the noise removal circuit 4 of FIG. 1;

FIG. 6 is a characteristic diagram showing a typical example of a relationship between an applied voltage and a multiplication factor in the vicinity of a breakdown voltage of an APD.

[Explanation of symbols]

 1 Light transmission circuit 1a Laser diode 1b Laser diode drive circuit 1c, 1d Schmitt trigger circuit 1g Transmission timing signal generation circuit 2 Light reception circuit 2a APD 3 Binarization circuit 3a Voltage comparator 4 Noise removal circuit 4a Delay circuit 4b 2 input AND gate 5 Distance measurement circuit 6 Bias voltage control circuit 7 Bias voltage supply circuit

Claims (10)

[Claims] 1. A light transmitting circuit for emitting preceding and succeeding light pulses at a predetermined time interval, and a light transmitting circuit operable under a changeable bias voltage, wherein a reflected light pulse of the emitted preceding and succeeding light pulses is generated. Avalanche, which receives light and outputs preceding and succeeding light receiving pulse signals
A light receiving circuit including a photodiode, a binarizing circuit that compares the preceding and succeeding light receiving pulse signals with a predetermined reference voltage and outputs a preceding and succeeding binarized signal, A noise elimination circuit that eliminates noise by creating a logical product of the signal delayed by the predetermined time interval and the subsequent binarized signal; and a noise elimination circuit or an output of the binarization circuit. A bias voltage control circuit for counting the number of pulses to be applied and changing the bias voltage of the avalanche photodiode in accordance with the counted number. 2. The bias voltage of the avalanche photodiode according to claim 1, wherein a bias voltage of the avalanche photodiode is set to a value substantially equal to a breakdown voltage when the number of the counted binary signals is equal to or less than a predetermined value. And an optical pulse radar apparatus wherein the number of binary signals counted is decreased from a value substantially equal to a breakdown voltage thereof as the number increases. 3. The light transmission circuit according to claim 1, wherein the predetermined time interval for emitting the light pulse in the light transmission circuit delays the binarized signal in the noise removal circuit by the predetermined time. Pulse radar device set using a delay circuit for the same. 4. The pulsed light radar device according to claim 1, wherein the emission of the preceding and subsequent light pulses is repeated at predetermined time intervals. 5. A light transmitting circuit for emitting a light pulse, and an avalanche photodiode which operates by receiving a changeable bias voltage, receives a reflected pulse of the emitted light pulse, and outputs a light receiving pulse signal. A light receiving circuit, a binarizing circuit that compares the light receiving pulse signal with a predetermined reference voltage and outputs a binarized signal, and counts the number of binarized signals output from the binarizing circuit. An optical pulse radar device comprising: a bias voltage control circuit that changes a bias voltage of the avalanche photodiode according to the number. 6. The bias voltage of the avalanche photodiode according to claim 5, wherein the bias voltage of the avalanche photodiode is set to a value substantially equal to the breakdown voltage when the number of the counted binary signals is equal to or less than a predetermined value. And an optical pulse radar apparatus wherein the number of binary signals counted is decreased from a value substantially equal to a breakdown voltage thereof as the number increases. 7. An optical pulse light receiving device for receiving preceding and succeeding light pulses appearing at a predetermined time interval, wherein the light pulse receiving device operates by receiving a changeable bias voltage and receives the preceding and succeeding light pulses. A light receiving circuit including an avalanche photodiode for outputting preceding and succeeding light receiving pulse signals, and comparing the preceding and following light receiving pulse signals with a predetermined reference voltage and outputting preceding and succeeding binary signals. A binarization circuit, wherein the binarized signal from which noise has been removed by creating a logical product of the preceding binarized signal delayed by the predetermined time interval and the subsequent binarized signal; A noise removal circuit for outputting, a bias voltage control circuit for counting the number of binarized signals from which the noise has been removed, and changing a bias voltage of the avalanche photodiode according to the number. An optical pulse light receiving device comprising: 8. The device according to claim 7, wherein the bias voltage of the avalanche photodiode is set to a value substantially equal to the breakdown voltage when the number of the counted binary signals is equal to or less than a predetermined value. And an optical pulse light receiving device wherein the number of the counted binary signals is decreased from a value substantially equal to a breakdown voltage thereof as the number increases. 9. An optical pulse light receiving device for receiving an optical pulse, comprising: an avalanche photodiode that operates by receiving a changeable bias voltage, receives the optical pulse, and outputs a light receiving pulse signal. A binarization circuit that compares the received light pulse signal with a predetermined reference voltage and outputs a binarized signal; counts the number of the binarized signals; and, based on the number, counts the avalanche photodiode. An optical pulse light receiving device comprising: a bias voltage control circuit for changing a bias voltage. 10. The bias voltage of the avalanche photodiode according to claim 9, wherein a bias voltage of the avalanche photodiode is set to a value substantially equal to a breakdown voltage when the number of the counted binary signals is equal to or less than a predetermined value. And an optical pulse light receiving device wherein the number of the counted binary signals is decreased from a value substantially equal to a breakdown voltage thereof as the number increases.