JPH11145331A - Power semiconductor device - Google Patents
Power semiconductor deviceInfo
- Publication number
- JPH11145331A JPH11145331A JP9326965A JP32696597A JPH11145331A JP H11145331 A JPH11145331 A JP H11145331A JP 9326965 A JP9326965 A JP 9326965A JP 32696597 A JP32696597 A JP 32696597A JP H11145331 A JPH11145331 A JP H11145331A
- Authority
- JP
- Japan
- Prior art keywords
- power semiconductor
- metal base
- input
- semiconductor chip
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 31
- 239000002184 metal Substances 0.000 claims abstract description 33
- 239000000853 adhesive Substances 0.000 claims abstract description 6
- 230000001070 adhesive effect Effects 0.000 claims abstract description 6
- 230000004907 flux Effects 0.000 abstract description 10
- 229910000679 solder Inorganic materials 0.000 abstract description 10
- 238000004140 cleaning Methods 0.000 abstract description 9
- 239000007788 liquid Substances 0.000 abstract description 6
- 238000001035 drying Methods 0.000 abstract description 3
- 238000007599 discharging Methods 0.000 abstract 1
- 229920005989 resin Polymers 0.000 description 18
- 239000011347 resin Substances 0.000 description 18
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 6
- 229910052710 silicon Inorganic materials 0.000 description 6
- 239000010703 silicon Substances 0.000 description 6
- 239000003822 epoxy resin Substances 0.000 description 5
- 229920000647 polyepoxide Polymers 0.000 description 5
- 238000000465 moulding Methods 0.000 description 3
- 238000005406 washing Methods 0.000 description 3
- 238000005476 soldering Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0058—Laminating printed circuit boards onto other substrates, e.g. metallic substrates
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/26—Cleaning or polishing of the conductive pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は電力半導体装置に関
する。[0001] The present invention relates to a power semiconductor device.
【０００２】[0002]
【従来の技術】従来の技術を図２に示す。従来の電力半
導体装置に，金属ベース４と，金属ベース４上に形成さ
れた絶縁層１０と，この絶縁層１０の上に形成した金属
パターン１１と，この金属パターン１１上に電力半導体
チップ６と入出力端子８とが搭載され，入出力端子８が
埋め込まれて形成された樹脂インサートケース３とで構
成された電力半導体装置がある。樹脂インサートケース
３は樹脂成型時に入出力端子８を金型に設置して樹脂を
流し込んで樹脂インサートケース３と入出力端子８の一
体構造が形成される。成型された樹脂インサートケース
３と入出力端子８は金属ベース４に接着剤で接着され，
電力半導体チップ６と入出力端子８は金属パターン１１
に半田付けされる。このとき，入出力端子８は電力半導
体チップ６と電気回路を形成する。入出力端子８と電力
半導体チップ６とが金属パターン１１に半田付けされた
後に，半田のフラックスを除去するために洗浄される。
洗浄後電力半導体装置の中に電力半導体チップ６を保護
する目的でシリコンゲルが注入されシリコンゲル層５が
形成され，シリコンゲル層５の上にはエポキシ樹脂が注
入されエポキシ樹脂層７が形成されて，乾燥される。2. Description of the Related Art FIG. In the conventional power semiconductor device, a metal base 4, an insulating layer 10 formed on the metal base 4, a metal pattern 11 formed on the insulating layer 10, a power semiconductor chip 6 on the metal pattern 11, There is a power semiconductor device including an input / output terminal 8 and a resin insert case 3 formed with the input / output terminal 8 embedded therein. In the resin insert case 3, the input / output terminals 8 are set in a mold during resin molding, and the resin is poured into the resin insert case 3, whereby an integrated structure of the resin insert case 3 and the input / output terminals 8 is formed. The molded resin insert case 3 and the input / output terminals 8 are bonded to the metal base 4 with an adhesive.
The power semiconductor chip 6 and the input / output terminals 8
Soldered. At this time, the input / output terminal 8 forms an electric circuit with the power semiconductor chip 6. After the input / output terminals 8 and the power semiconductor chip 6 are soldered to the metal pattern 11, they are cleaned to remove solder flux.
After cleaning, a silicon gel is injected into the power semiconductor device to protect the power semiconductor chip 6 to form a silicon gel layer 5, and an epoxy resin is injected onto the silicon gel layer 5 to form an epoxy resin layer 7. And dried.
【０００３】[0003]
【発明が解決しようとする課題】ところが，樹脂インサ
ートケース３は逆のＬの字の形をしているために半田の
フラックスの洗浄時の洗浄液が金属ベース４と樹脂イン
サートケース３で構成する空間に溜まり，乾燥に時間が
かかって電力半導体装置の生産性が悪いという問題があ
る。However, since the resin insert case 3 has an inverted L-shape, the cleaning liquid for cleaning the solder flux is formed by the space formed by the metal base 4 and the resin insert case 3. And it takes time to dry, resulting in poor productivity of the power semiconductor device.
【０００４】[0004]
【課題を解決するための手段】本発明の電力半導体装置
は，金属ベースと，前記金属ベースに搭載した電力半導
体チップと，前記電力半導体チップと半田付けされる入
出力端子と，前記金属ベースに接着剤で接着されるケー
スとからなる電力半導体装置において，前記金属ベース
に少なくとも１個のドレイン孔を有するものである。す
なわち，前記金属ベースと樹脂インサートケースで構成
される空間に半田フラックスの洗浄時に溜まる洗浄液を
前記ドレイン孔から流し出し，半田フラックスの乾燥を
早くする。According to the present invention, there is provided a power semiconductor device comprising: a metal base; a power semiconductor chip mounted on the metal base; an input / output terminal soldered to the power semiconductor chip; A power semiconductor device comprising a case bonded with an adhesive, wherein the metal base has at least one drain hole. That is, a cleaning liquid that is accumulated in the space formed by the metal base and the resin insert case when the solder flux is washed out flows out from the drain hole, and drying of the solder flux is accelerated.
【０００５】[0005]
【発明の実施の形態】本発明の実施の形態を図１を参照
して説明する。すなわち，電力半導体装置は金属ベース
４と，金属ベース４上に形成した絶縁層１０と，絶縁層
１０上に形成した金属パターン１１と，金属パターン１
１に搭載した電力半導体チップ６と，電力半導体チップ
６の外部と接続を施す入出力端子８と，入出力端子８を
埋め込んで成型し，金属ベース４に接着剤で接続する樹
脂インサートケース３とから成っている。そして，金属
ベース４に少なくとも１個のドレイン孔１，２を有して
いる。DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described with reference to FIG. That is, the power semiconductor device includes a metal base 4, an insulating layer 10 formed on the metal base 4, a metal pattern 11 formed on the insulating layer 10, and a metal pattern 1.
A power semiconductor chip 6 mounted on the power semiconductor chip 1, an input / output terminal 8 for connection to the outside of the power semiconductor chip 6, a resin insert case 3 embedded with the input / output terminal 8, molded and connected to the metal base 4 with an adhesive. Consists of The metal base 4 has at least one drain hole 1 and 2.
【０００６】樹脂インサートケース３は金型による樹脂
成形品であり，樹脂の成型時に金型に入出力端子８を設
置して，樹脂成形と当時に樹脂インサートケース３を形
成する。さらに，樹脂インサートケース３は接着剤によ
り金属ベース４に固定されると同時に入出力端子８は半
田付けで前記金属パターン１１上に固定される。The resin insert case 3 is a resin molded product using a mold, and the input / output terminals 8 are installed in the mold during resin molding, and the resin insert case 3 is formed at the time of resin molding. Further, the resin insert case 3 is fixed to the metal base 4 with an adhesive, and at the same time, the input / output terminals 8 are fixed on the metal pattern 11 by soldering.
【０００７】金属ベース４は絶縁層１０も貫通するドレ
イン孔１，２を有している。入出力端子が金属パターン
と半田付けされた後，半田のフラックスが洗浄液により
洗浄される。この洗浄液はドレイン孔１，２から流し出
される。この後，電力半導体チップ６上にはシリコンゲ
ルが注入されシリコンゲル層が形成され，さらに，エポ
キシ樹脂が注入されてエポキシ樹脂層７を形成する。The metal base 4 has drain holes 1 and 2 that also penetrate the insulating layer 10. After the input / output terminals are soldered to the metal pattern, the flux of the solder is cleaned with a cleaning liquid. This cleaning liquid flows out from the drain holes 1 and 2. Thereafter, a silicon gel is injected on the power semiconductor chip 6 to form a silicon gel layer, and an epoxy resin is injected to form an epoxy resin layer 7.
【０００８】上記実施の形態は，入出力端子がケースに
インサートされていたが，これにこだわることもなくケ
ースから分離されていてもよい。In the above embodiment, the input / output terminal is inserted into the case. However, the input / output terminal may be separated from the case without being limited to this.
【０００９】[0009]
【発明の効果】電力半導チップ６を固定する際に発生す
る半田フラックスを除去するするために半田フラックス
が洗浄されるが，半田フラックスの洗浄後，洗浄で使用
した洗浄液は金属ベース４にドレイン孔１，２から排出
されて，乾燥が早くなる。According to the present invention, the solder flux is washed to remove the solder flux generated when the power semiconductor chip 6 is fixed. After the washing of the solder flux, the washing liquid used in the washing is drained to the metal base 4. It is discharged from the holes 1 and 2 and drying is quickened.
【図１】本発明の電力半導体装置の一実施の形態を示す
断面図と底面図である。FIG. 1 is a sectional view and a bottom view showing an embodiment of a power semiconductor device of the present invention.
【図２】従来の電力半導体装置を示す断面図と底面図で
ある。FIG. 2 is a sectional view and a bottom view showing a conventional power semiconductor device.
１，２ ドレイン孔 ３ 樹脂インサートケース ４ 金属ベース ５ シリコンゲル層 ６ 電力半導体チップ ７ エポキシ樹脂層 ８ 入出力端子 ９ 固定孔 １０ 絶縁層 １１ 金属パターン 1, 2 drain hole 3 resin insert case 4 metal base 5 silicon gel layer 6 power semiconductor chip 7 epoxy resin layer 8 input / output terminal 9 fixing hole 10 insulating layer 11 metal pattern
───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.6 識別記号 ＦＩ Ｈ０１Ｌ 25/07 Ｈ０１Ｌ 25/04 Ｃ 25/18 Ｈ０５Ｋ 3/34 ５０３ ──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. 6 Identification code FI H01L 25/07 H01L 25/04 C 25/18 H05K 3/34 503
Claims (1)
た電力半導体チップと，前記電力半導体チップと半田付
けされる入出力端子と，前記金属ベースに接着剤で接着
されるケースとからなる電力半導体装置において，前記
金属ベースに少なくとも１個のドレイン孔を有すること
を特徴とする電力半導体装置。1. A power semiconductor comprising a metal base, a power semiconductor chip mounted on the metal base, input / output terminals soldered to the power semiconductor chip, and a case bonded to the metal base with an adhesive. A power semiconductor device, wherein the device has at least one drain hole in the metal base.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9326965A JPH11145331A (en) | 1997-11-11 | 1997-11-11 | Power semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9326965A JPH11145331A (en) | 1997-11-11 | 1997-11-11 | Power semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH11145331A true JPH11145331A (en) | 1999-05-28 |
Family
ID=18193780
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9326965A Pending JPH11145331A (en) | 1997-11-11 | 1997-11-11 | Power semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH11145331A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2013236037A (en) * | 2012-05-11 | 2013-11-21 | Mitsubishi Electric Corp | Semiconductor module and manufacturing method of the same |
-
1997
- 1997-11-11 JP JP9326965A patent/JPH11145331A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2013236037A (en) * | 2012-05-11 | 2013-11-21 | Mitsubishi Electric Corp | Semiconductor module and manufacturing method of the same |
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