JPH1098016A - Semiconductor wafer-polishing device - Google Patents
Semiconductor wafer-polishing deviceInfo
- Publication number
- JPH1098016A JPH1098016A JP24972796A JP24972796A JPH1098016A JP H1098016 A JPH1098016 A JP H1098016A JP 24972796 A JP24972796 A JP 24972796A JP 24972796 A JP24972796 A JP 24972796A JP H1098016 A JPH1098016 A JP H1098016A
- Authority
- JP
- Japan
- Prior art keywords
- polishing
- semiconductor wafer
- film thickness
- thickness
- measuring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 238000005498 polishing Methods 0.000 title claims abstract description 225
- 239000004065 semiconductor Substances 0.000 title claims abstract description 171
- 239000011229 interlayer Substances 0.000 claims abstract description 15
- 238000000034 method Methods 0.000 claims description 11
- 238000012545 processing Methods 0.000 claims description 6
- 239000000126 substance Substances 0.000 claims description 5
- 230000002093 peripheral effect Effects 0.000 claims description 4
- 235000012431 wafers Nutrition 0.000 description 141
- 238000003860 storage Methods 0.000 description 20
- 239000010410 layer Substances 0.000 description 9
- 238000005259 measurement Methods 0.000 description 9
- 230000007246 mechanism Effects 0.000 description 7
- 238000004140 cleaning Methods 0.000 description 4
- NJPPVKZQTLUDBO-UHFFFAOYSA-N novaluron Chemical compound C1=C(Cl)C(OC(F)(F)C(OC(F)(F)F)F)=CC=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F NJPPVKZQTLUDBO-UHFFFAOYSA-N 0.000 description 4
- 238000003825 pressing Methods 0.000 description 4
- 239000003795 chemical substances by application Substances 0.000 description 3
- 238000012546 transfer Methods 0.000 description 3
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 3
- 239000003082 abrasive agent Substances 0.000 description 2
- 230000010485 coping Effects 0.000 description 2
- 238000009434 installation Methods 0.000 description 2
- 238000007517 polishing process Methods 0.000 description 2
- 230000007723 transport mechanism Effects 0.000 description 2
- 101100345589 Mus musculus Mical1 gene Proteins 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- 239000002002 slurry Substances 0.000 description 1
- 238000005406 washing Methods 0.000 description 1
- 239000002699 waste material Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B49/00—Measuring or gauging equipment for controlling the feed movement of the grinding tool or work; Arrangements of indicating or measuring equipment, e.g. for indicating the start of the grinding operation
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B37/00—Lapping machines or devices; Accessories
- B24B37/34—Accessories
- B24B37/345—Feeding, loading or unloading work specially adapted to lapping
Landscapes
- Engineering & Computer Science (AREA)
- Mechanical Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
- Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、半導体ウェハ表面
に形成された絶縁膜を化学的機械的研磨方法によって平
滑に研磨する半導体ウェハ研磨装置に関し、特に半導体
ウェハ研磨装置における研磨前と研磨後に半導体ウェハ
表面の層間膜の膜厚計測を行い、計測した膜厚値に基づ
いて研磨条件を適宜変更し、半導体ウェハの層間膜厚を
所望の条件に研磨する半導体ウェハ研磨装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor wafer polishing apparatus for smoothly polishing an insulating film formed on a semiconductor wafer surface by a chemical mechanical polishing method, and more particularly to a semiconductor wafer polishing apparatus before and after polishing in a semiconductor wafer polishing apparatus. The present invention relates to a semiconductor wafer polishing apparatus that measures a film thickness of an interlayer film on a wafer surface, appropriately changes polishing conditions based on the measured film thickness value, and polishes an interlayer film thickness of a semiconductor wafer to a desired condition.
【0002】[0002]
【従来の技術】半導体チップは、半導体ウェハ上に導電
層や絶縁層、あるいはその他の層を所定のパターンで予
め定められた順序に従って積層し、全て重ねた後切断分
割して製造する。そのため半導体ウェハの最上面は積層
された各パターン層によって凹凸が生じ、その凹凸の上
に更にパターンを重ねることとなるため層を重ねるごと
に凹凸はより増大する。このように最上層表面の凹凸が
非常に大きくなると露光時の焦点が定まらず精密なパタ
ーン形成ができなくなり、パターントレール、配線ピッ
チ等を小さくすることができず、集積度が向上できな
い。2. Description of the Related Art A semiconductor chip is manufactured by laminating a conductive layer, an insulating layer, or another layer on a semiconductor wafer in a predetermined pattern in a predetermined order, and then cutting and dividing all the layers. For this reason, the uppermost surface of the semiconductor wafer has irregularities due to the stacked pattern layers, and a pattern is further superimposed on the irregularities. As described above, when the surface of the uppermost layer becomes very large, the focus at the time of exposure cannot be determined, so that a precise pattern cannot be formed, the pattern trail, the wiring pitch, and the like cannot be reduced, and the degree of integration cannot be improved.
【0003】そこで、微細パターンのリソグラフイの焦
点深度、微細パターンの多層化、層間絶縁膜の平坦化等
を実現するために、化学的機械的研磨(Chemical Mecha
nical Polish)方式を用いた半導体ウェハ研磨装置を用
いて半導体ウェハの層間膜を研磨し、膜厚を平滑化して
いる。Therefore, in order to realize a lithographic depth of focus of a fine pattern, a multilayer of a fine pattern, a flattening of an interlayer insulating film, and the like, chemical mechanical polishing (Chemical Mechanical Polishing) is performed.
The thickness of the interlayer film of the semiconductor wafer is polished by using a semiconductor wafer polisher using the Nical Polish) method.
【0004】[0004]
【発明が解決しようとする課題】しかしながら、半導体
ウェハの層間膜研磨は、半導体ウェハ研磨装置のプロセ
ス条件、すなわち研磨時間、キャリア回転数、研磨圧
力、スラリーの供給量、プラテンの回転数、パッド表面
温度、研磨布の選定、パッドコンデショナーの圧力、バ
ックフィル圧力等の種々のファクターを調整し決定する
作業が必要となる。又、研磨中は半導体ウェハの研磨面
を研磨パットに押し付けているため、研磨面の残膜の厚
みを計測器等によって直接検出することは困難であり、
従来は層間膜の研磨率を一定と仮定し、研磨を行った処
理時間に基づいて研磨量の制御を行っていた。However, in the polishing of the interlayer film of a semiconductor wafer, the process conditions of a semiconductor wafer polishing apparatus, namely, polishing time, carrier rotation speed, polishing pressure, slurry supply amount, platen rotation speed, pad surface It is necessary to adjust and determine various factors such as temperature, selection of a polishing pad, pressure of a pad conditioner, and backfill pressure. Also, since the polishing surface of the semiconductor wafer is pressed against the polishing pad during polishing, it is difficult to directly detect the thickness of the remaining film on the polishing surface by a measuring instrument or the like,
Conventionally, the polishing rate of the interlayer film is assumed to be constant, and the polishing amount is controlled based on the processing time of polishing.
【0005】一方、従来研磨した半導体ウェハの膜厚を
計測する場合は、研磨した半導体ウェハを洗浄、乾燥し
た後半導体ウェハ研磨装置と別途設置された計測装置に
運び、その膜厚を計測するようにしていた。そのため計
測に数時間を要し、更に、膜厚を計測しその計測データ
をその後の研磨に利用しようとする時に研磨装置内の研
磨布の温度変動等で、測定データをそのまま利用できな
いという問題があった。On the other hand, when measuring the film thickness of a conventionally polished semiconductor wafer, the polished semiconductor wafer is washed and dried, and then carried to a measuring device separately provided from a semiconductor wafer polishing apparatus to measure the film thickness. I was Therefore, it takes several hours to measure, and furthermore, when measuring the film thickness and using the measured data for subsequent polishing, there is a problem that the measured data cannot be used as it is due to a temperature fluctuation of the polishing cloth in the polishing apparatus. there were.
【0006】すなわち、半導体ウェハ研磨装置で研磨し
た半導体ウェハの膜厚を計測装置で計測し、その値を半
導体ウェハの研磨に用いるようにした場合には、膜厚を
計測した半導体ウェハを研磨した時から時間がかなり経
過していることから、半導体ウェハ研磨装置の作動条件
が異なり、計測された結果をそのまま現在の研磨条件の
基準値として用いることが難しいという問題もあった。That is, when the thickness of a semiconductor wafer polished by a semiconductor wafer polishing apparatus is measured by a measuring apparatus and the measured value is used for polishing the semiconductor wafer, the semiconductor wafer whose thickness is measured is polished. Since a considerable time has passed since the time, the operating conditions of the semiconductor wafer polishing apparatus are different, and there has been a problem that it is difficult to use the measured result as it is as a reference value of the current polishing condition.
【0007】[0007]
【課題を解決するための手段】本発明では、上記課題を
解決するため、半導体ウェハ表面に形成された層間膜を
化学的機械的研磨方法で研磨する半導体研磨装置を次の
ように構成した。According to the present invention, in order to solve the above-mentioned problems, a semiconductor polishing apparatus for polishing an interlayer film formed on a semiconductor wafer surface by a chemical mechanical polishing method is constituted as follows.
【0008】すなわち、半導体ウェハに形成された層間
膜の厚みを該半導体ウェハの研磨前及び研磨後に計測す
る計測手段と、計測手段が計測した層間膜の膜厚に基づ
き半導体ウェハの研磨状態を検出する検出手段と、検出
手段が検出した研磨状態と基準膜厚とを比較し、半導体
ウェハ研磨装置の研磨条件を制御する制御手段とから半
導体ウェハ研磨装置を構成した。That is, measuring means for measuring the thickness of an interlayer film formed on a semiconductor wafer before and after polishing of the semiconductor wafer, and detecting the polishing state of the semiconductor wafer based on the thickness of the interlayer film measured by the measuring means. The semiconductor wafer polishing apparatus is constituted by detecting means for performing the polishing and the control means for controlling the polishing conditions of the semiconductor wafer polishing apparatus by comparing the polishing state detected by the detecting means with the reference film thickness.
【0009】計測手段は、半導体ウェハに形成された数
あるダイのうち特定のダイを数か所選び、それぞれのダ
イにおいてパターン中の特定箇所をそれぞれ選んで、そ
の部分の膜厚を計測するようにした。計測手段の計測箇
所としては、中心部と周辺に均等に配した複数の点、例
えば半導体ウェハの中心部と周辺部の4か所均等に分布
した点とするとよい。すると、残膜厚に加え、残膜厚の
中央と周辺部との差から、コンベックス、コンケーブ形
状の程度、または残膜厚の一方向への傾き等を検出する
ことができる。The measuring means selects a plurality of specific dies out of a number of dies formed on the semiconductor wafer, selects specific portions in a pattern on each of the dies, and measures the film thickness of the portions. I made it. The measurement points of the measuring means may be a plurality of points uniformly distributed around the center and the periphery, for example, four equally distributed points at the center and the periphery of the semiconductor wafer. Then, in addition to the remaining film thickness, the difference between the center and the peripheral portion of the remaining film thickness, the degree of the convex or concave shape, or the inclination of the remaining film thickness in one direction can be detected.
【0010】研磨後の半導体ウェハの膜厚を計測する計
測手段は、湿式の計測手段であることとした。このこと
により、研磨後の半導体ウェハを別置きの洗浄機、乾燥
機にかけることなく、研磨直後の半導体ウェハの膜厚を
計測できる。また、研磨プロセスを2段階に分け、一次
研磨により表面の凹凸を研磨し、その後の二次研磨を一
次研磨後の膜厚から推定することとした。すなわち、一
次研磨によって半導体ウェハの表面はほぼ平坦に研磨さ
れることから、二次研磨は、チップパターンで決定され
る直線性をもった既知の研磨速度となることから、基準
膜厚までの研磨時間、つまり二次研磨の所要時間を正確
に設定することができる。The measuring means for measuring the film thickness of the polished semiconductor wafer is a wet measuring means. Thus, the film thickness of the semiconductor wafer immediately after polishing can be measured without using the polished semiconductor wafer in a separate washing machine and dryer. In addition, the polishing process was divided into two stages, the unevenness of the surface was polished by the primary polishing, and the subsequent secondary polishing was estimated from the film thickness after the primary polishing. That is, since the surface of the semiconductor wafer is polished almost flat by the primary polishing, the secondary polishing has a known polishing rate with linearity determined by the chip pattern. The time, that is, the time required for the secondary polishing can be set accurately.
【0011】半導体ウェハ研磨装置を、更に詳しく述べ
る。研磨しようとする半導体ウェハは、収納容器に複数
枚収容され、半導体ウェハ研磨装置の収納容器設置位置
に設置される。収納容器が設置されると、移動アームが
半導体ウェハを収納容器から個々に取り出し計測器に移
動させる。The semiconductor wafer polishing apparatus will be described in more detail. A plurality of semiconductor wafers to be polished are stored in a storage container, and are installed at a storage container installation position of a semiconductor wafer polishing apparatus. When the storage container is installed, the moving arm individually removes the semiconductor wafer from the storage container and moves the semiconductor wafer to the measuring instrument.
【0012】計測器は、例えば反射光を利用した膜厚計
測装置であり、半導体ウェハの所定位置に光を当て、そ
の反射光から膜厚を正確に計測し、その値を制御部に送
る。また計測器には、画像処理装置や移動機構等を備
え、半導体ウェハにおける膜厚計測点を正確に特定でき
るようになっている。尚、計測器の計測方法は反射式に
限るものではない。The measuring device is, for example, a film thickness measuring device using reflected light, irradiates a predetermined position on a semiconductor wafer with light, accurately measures the film thickness from the reflected light, and sends the value to a control unit. The measuring device includes an image processing device, a moving mechanism, and the like, and can accurately specify a film thickness measuring point on the semiconductor wafer. The measuring method of the measuring instrument is not limited to the reflection type.
【0013】計測器による計測が終了すると、再び移動
アームによって半導体ウェハは取り出され、回転移動台
の載置位置に載置される。回転移動台は、研磨前の半導
体ウェハ載置位置と研磨後の半導体ウェハ載置位置とを
備え、半導体ウェハを載置した状態で水平方向に任意な
角度回転する。回転移動台の載置位置に研磨前の半導体
ウェハが配置されると回転移動台は180度回転し、研
磨台側に半導体ウェハを移動させる。研磨台は、所定の
速度で回転する研磨パッドと研磨剤塗布装置等からな
り、上部に半導体ウェハを把持し上下動する把持部と、
把持部を水平方向に移動させる搬送機構が備えてある。When the measurement by the measuring device is completed, the semiconductor wafer is taken out again by the moving arm and is mounted on the mounting position of the rotary moving table. The rotary moving table includes a semiconductor wafer mounting position before polishing and a semiconductor wafer mounting position after polishing, and rotates an arbitrary angle in the horizontal direction while the semiconductor wafer is mounted. When the semiconductor wafer before polishing is placed at the mounting position of the rotary moving table, the rotary moving table rotates 180 degrees and moves the semiconductor wafer to the polishing table side. The polishing table is composed of a polishing pad that rotates at a predetermined speed, an abrasive application device, and the like, and a gripper that grips the semiconductor wafer and moves up and down at the top,
A transport mechanism is provided for moving the gripper horizontally.
【0014】把持部は、負圧による吸引機構を備え、搬
送機構によって回転移動台から半導体ウェハ上に降ろさ
れると負圧で半導体ウェハを吸着する。吸着された半導
体ウェハは上昇されるとともに搬送機構によって水平方
向に移動され、研磨台の研磨パッド上に降ろされる。研
磨台は、研磨剤を研磨パッド表面に塗布して回転してお
り、押し付けられた半導体ウェハの表面を研磨する。The holding section has a suction mechanism using a negative pressure, and when the holding section is lowered onto the semiconductor wafer from the rotary moving table by the transfer mechanism, the semiconductor wafer is suctioned by the negative pressure. The sucked semiconductor wafer is raised and moved in the horizontal direction by the transport mechanism, and is lowered onto the polishing pad of the polishing table. The polishing table rotates while applying a polishing agent to the surface of the polishing pad, and polishes the surface of the pressed semiconductor wafer.
【0015】半導体ウェハの研磨が終了すると、上記手
順の逆をたどり研磨後の半導体ウェハを収納する収納容
器に収納されるが、途中計測器によって研磨前に膜厚を
計測したと同様な位置の膜厚が研磨後に計測され、その
値は制御部に送られる。When the polishing of the semiconductor wafer is completed, the semiconductor wafer is stored in a storage container for storing the polished semiconductor wafer by following the above procedure in the reverse order. The film thickness is measured after polishing, and the value is sent to the control unit.
【0016】そして、制御部は、研磨前と研磨後の値か
ら半導体ウェハの研磨量を求め、又研磨後の膜厚と基準
膜厚値とを比較し、両者間に相違がある場合には求めら
れた研磨量に基づいてその後の研磨条件の変更を行う。
研磨条件の変更は例えば、膜厚が平均して基準値と異な
る場合には研磨時間や押し付け圧力等を増減させる。又
膜厚に偏りがあり、傾斜しているあるいは中央と周辺と
の間に凹凸が生じている場合には、研磨パット面のドレ
ッシングや把持部の背面圧力の調整等を行い、基準膜厚
となるよう補正する。The control unit calculates the polishing amount of the semiconductor wafer from the values before and after the polishing, compares the film thickness after the polishing with the reference film thickness, and if there is a difference between them, The subsequent polishing conditions are changed based on the determined polishing amount.
When the polishing conditions are changed, for example, when the film thickness is different from the reference value on average, the polishing time, pressing pressure, and the like are increased or decreased. In addition, when the film thickness is biased, and when the surface is inclined or uneven between the center and the periphery, dressing of the polishing pad surface or adjustment of the back pressure of the gripping portion is performed, and the reference film thickness is adjusted. Correct so that
【0017】また、一次研磨の後更に半導体ウェハの二
次研磨を行うようにした場合、一次研磨による研磨量か
ら二次研磨の研磨時間を算出する。これは、一次研磨の
ときは半導体ウェハの表面の凹凸が大きく、研磨速度は
早い。一方、表面の凹凸がある程度研磨され平面に近づ
くと、研磨パッドと接する面積がほぼ全面に近くなり、
時間当たりの研磨量が所定値となり、研磨量を推測しや
すくなる。そのため、一次研磨後の研磨量はほぼ全面研
磨として研磨時間を算出して正確な研磨時間を得ること
ができる。この場合は、研磨装置を2台として、一次研
磨と二次研磨の機能に分担することも可能である。When the secondary polishing of the semiconductor wafer is further performed after the primary polishing, the polishing time of the secondary polishing is calculated from the polishing amount of the primary polishing. This is because during the primary polishing, the surface of the semiconductor wafer has large irregularities and the polishing rate is high. On the other hand, when the surface irregularities are polished to some extent and approach a flat surface, the area in contact with the polishing pad becomes almost close to the entire surface,
The polishing amount per time becomes a predetermined value, and the polishing amount can be easily estimated. For this reason, the polishing amount after the primary polishing can be calculated as the polishing time for almost the entire surface, and an accurate polishing time can be obtained. In this case, it is possible to use two polishing apparatuses and share the functions of the primary polishing and the secondary polishing.
【0018】更に、このようにして得られた一次と二次
の研磨時間を加えた時間が研磨全体の所要時間として算
出することができ、この値をフィードバックする。Further, the time obtained by adding the primary and secondary polishing times obtained as described above can be calculated as the required time for the entire polishing, and this value is fed back.
【0019】[0019]
【発明の実施の形態】次に、本発明の半導体ウエハ研磨
装置の実施の形態を説明する。Next, an embodiment of a semiconductor wafer polishing apparatus according to the present invention will be described.
【0020】半導体ウエハ研磨装置1は、図1及び図2
に示すように半導体ウェハ3(図4参照)の絶縁膜を化
学的機械的に研磨する研磨台2と、研磨前の半導体ウェ
ハ3を収納する収納容器4と、研磨前の半導体ウェハ3
を把持し移動する研磨前用移動アーム6と、研磨後の半
導体ウェハ3を把持し移動する移動アーム8と、半導体
ウェハ3を移動アーム6の中心に把持させる中心調整器
10と、半導体ウェハ3を載せて水平方向に回転させる
回転移動台12と、回転移動台12から研磨台2に半導
体ウェハ3を搬送する搬送器14と、研磨前の半導体ウ
ェハ3の絶縁層の膜厚を計測する計測器16と、研磨後
の半導体ウェハ3の絶縁層の膜厚を計測する計測器18
と、研磨後の半導体ウェハ3を収納する収納容器20等
から構成されている。The semiconductor wafer polishing apparatus 1 is shown in FIGS.
As shown in FIG. 4, a polishing table 2 for chemically and mechanically polishing an insulating film of a semiconductor wafer 3 (see FIG. 4), a storage container 4 for storing the semiconductor wafer 3 before polishing, and a semiconductor wafer 3 before polishing.
A pre-polishing moving arm 6 for gripping and moving the semiconductor wafer 3, a moving arm 8 for gripping and moving the polished semiconductor wafer 3, a center adjuster 10 for gripping the semiconductor wafer 3 at the center of the moving arm 6, and a semiconductor wafer 3 , On which the semiconductor wafer 3 is transferred from the rotary transfer table 12 to the polishing table 2, and a measurement for measuring the thickness of the insulating layer of the semiconductor wafer 3 before polishing. Instrument 16 and a measuring instrument 18 for measuring the thickness of the insulating layer of the polished semiconductor wafer 3
And a storage container 20 for storing the polished semiconductor wafer 3.
【0021】研磨台2は、図3に示すように回転機構
(図示せず)により回転されるプラテン22と、プラテ
ン22の上面に張り付けられた研磨パッド24と、研磨
剤を研磨パッド24上に吐出する供給器26等から構成
してある。研磨台2の上方には前後動自在な搬送器14
が設置されており、搬送器14には把持具28が設けら
れている。把持具28は、搬送器14に上下動自在に取
り付けてあり、周囲にリング31を備え、図示しない圧
力調整機に接続し、圧力調整機の負圧等により半導体ウ
ェハ3を吸引把持する。また把持具28は、図示しない
駆動機構により軸35の軸回りに回転自在であり、搬送
器14によって前後に水平移動するとともに垂直方向に
昇降する。したがって、把持具28に把持された半導体
ウェハ3は、回転しながら研磨台2に押し付けられ、更
に前後の動きとともに研磨台2に押し付けられる。The polishing table 2 includes a platen 22 rotated by a rotating mechanism (not shown) as shown in FIG. 3, a polishing pad 24 attached to the upper surface of the platen 22, and a polishing agent on the polishing pad 24. It is composed of a supply device 26 for discharging. A transporter 14 that can move back and forth is provided above the polishing table 2.
Is provided, and a gripper 28 is provided on the transporter 14. The gripper 28 is attached to the carrier 14 so as to be vertically movable, has a ring 31 around it, is connected to a pressure regulator (not shown), and sucks and grips the semiconductor wafer 3 by negative pressure of the pressure regulator. The gripper 28 is rotatable around an axis of a shaft 35 by a drive mechanism (not shown), and is horizontally moved back and forth by the transporter 14 and vertically moved up and down. Accordingly, the semiconductor wafer 3 gripped by the gripper 28 is pressed against the polishing table 2 while rotating, and further pressed against the polishing table 2 with the forward and backward movement.
【0022】研磨台2の後方には、図1に示すように研
磨台2の研磨面をドレッシングするドレッサ30が設置
してある。ドレッサ30は、腕部31が回動し、ドレッ
シング刃32を所定の方向に回転させながら研磨面をド
レッシングする。A dresser 30 for dressing the polishing surface of the polishing table 2 is provided behind the polishing table 2 as shown in FIG. The dresser 30 dresses the polished surface while the arm 31 rotates and the dressing blade 32 rotates in a predetermined direction.
【0023】移動アーム6は、台座部34と、台座部3
4に取り付けられた柱部36と、柱部36に回転自在に
取り付けられた腕部38等から構成されている。台座部
34は、走行レール40に沿って移動可能で、又柱部3
6は上下に伸縮自在であり、腕部38は軸回りに回転す
るとともに水平方向に伸縮自在で、かつ端部7に負圧が
供給され、負圧の吸引力を用いて半導体ウェハ3を把持
することができる。研磨後用の移動アーム8も移動アー
ム6と同様な構成である。The moving arm 6 includes a pedestal 34 and a pedestal 3
4 comprises an arm portion 38 and the like rotatably attached to the pillar portion 36. The pedestal portion 34 is movable along the traveling rail 40,
Numeral 6 is vertically expandable and contractible, and the arm 38 is rotatable around the axis and is also expandable and contractible in the horizontal direction. Negative pressure is supplied to the end 7 and the semiconductor wafer 3 is gripped by the suction force of the negative pressure. can do. The moving arm 8 for polishing has the same configuration as the moving arm 6.
【0024】収納容器4は、複数枚の半導体ウェハ3を
収容するように多段に収容部が形成してあり、かつ移動
アーム6の端部7が侵入し半導体ウェハ3を把持できる
よう前面に切り欠きが形成してある。The storage container 4 has a plurality of storage sections formed therein so as to store a plurality of semiconductor wafers 3, and is cut to the front so that the end 7 of the moving arm 6 can enter and grip the semiconductor wafer 3. Notches are formed.
【0025】中心調整器10は、収納容器4から取り出
した半導体ウェハ3の中心と移動アーム6の端部7の中
心とを一致させるための位置調整器である。回転移動台
12は、図示しない回転機構により回転自在になってお
り、上面に4箇所半導体ウェハ3の載置箇所が形成して
ある。半導体ウェハ3の載置箇所は、隣合った2箇所が
研磨前の半導体ウェハ3を載置する箇所で、他の2か所
が研磨後の半導体ウェハ3を載置する箇所である。The center adjuster 10 is a position adjuster for aligning the center of the semiconductor wafer 3 taken out of the storage container 4 with the center of the end 7 of the moving arm 6. The rotary moving table 12 is rotatable by a rotating mechanism (not shown), and four mounting positions of the semiconductor wafer 3 are formed on the upper surface. The mounting positions of the semiconductor wafer 3 are two adjacent positions where the semiconductor wafer 3 before polishing is mounted, and the other two positions are the positions where the semiconductor wafer 3 after polishing is mounted.
【0026】回転移動台12と研磨台2の間には、洗浄
部44が設置されている。洗浄部44は、研磨台2で研
磨された半導体ウェハ3に付着している研磨剤等を洗い
落とし、研磨剤が他の箇所に移らないようする。A cleaning unit 44 is provided between the rotary moving table 12 and the polishing table 2. The cleaning unit 44 removes abrasives and the like adhering to the semiconductor wafer 3 polished by the polishing table 2 so that the abrasives do not move to other locations.
【0027】計測器16は、半導体ウェハ3に形成され
た絶縁膜の膜厚を計測する計測器であり、絶縁膜に光を
照射し、金属層等によって反射された反射光によって絶
縁膜の膜厚を計測する器具である。又計測器16は、画
像処理装置及び半導体ウェハ3を任意に移動させる移動
機構(いずれも図示せず)を備えており、半導体ウェハ
3に形成された半導体チップの所定の位置の絶縁膜の膜
厚を計測できるようになっている。The measuring device 16 is a measuring device for measuring the thickness of the insulating film formed on the semiconductor wafer 3, irradiating the insulating film with light, and reflecting the light reflected by the metal layer or the like. It is an instrument for measuring thickness. The measuring device 16 includes an image processing device and a moving mechanism (neither is shown) for arbitrarily moving the semiconductor wafer 3, and the insulating film at a predetermined position of the semiconductor chip formed on the semiconductor wafer 3. The thickness can be measured.
【0028】図4に半導体ウェハ3の計測位置の例を示
す。すなわち、半導体ウェハ3の中心部Aと周辺の4か
所B、C、D、Eの各点に位置するチップを選択し、更
に各チップの同一の箇所を選定し、その箇所の膜厚を計
測する。FIG. 4 shows an example of the measurement position of the semiconductor wafer 3. That is, chips located at the central portion A of the semiconductor wafer 3 and the four peripheral points B, C, D, and E are selected, and the same portion of each chip is further selected. measure.
【0029】計測器18は研磨後の半導体ウェハ3の膜
厚を計測する計測器であり、濡れた状態の半導体ウェハ
3の膜厚が計測可能で、かつ半導体ウェハ3の表面に残
る研磨剤の影響を受けにくい構造である。基本的には、
白色光の干渉を利用して膜厚を測定するものであり、計
測器16と同様半導体ウェハ上に形成されたチップの同
一地点を特定するための画像認識装置、厚みセンサや画
像センサを移動する移動テーブル、コントローラ、デー
タ処理用コンピュータ等を備えている。The measuring device 18 is a measuring device for measuring the film thickness of the semiconductor wafer 3 after polishing. The measuring device 18 can measure the film thickness of the semiconductor wafer 3 in a wet state. The structure is not easily affected. Basically,
It measures the film thickness using the interference of white light, and moves an image recognition device, a thickness sensor, and an image sensor for specifying the same point of a chip formed on a semiconductor wafer, like the measuring device 16. It includes a moving table, a controller, a data processing computer, and the like.
【0030】研磨後の半導体ウェハ3を収納する容器収
容20は水槽内に沈められており、半導体ウェハ3を水
中に浸し、乾燥を防ぐようになっている。移動アーム8
は、研磨された半導体ウェハ3を把持し、回転移動台1
2から計測器18、収納容器20等に移動する。The container housing 20 for storing the polished semiconductor wafer 3 is submerged in a water tank, so that the semiconductor wafer 3 is immersed in water to prevent drying. Moving arm 8
Holds the polished semiconductor wafer 3 and rotates the moving table 1
From 2 move to the measuring device 18, the storage container 20, and the like.
【0031】次に、半導体ウェハ研磨装置1の作用につ
いて説明する。Next, the operation of the semiconductor wafer polishing apparatus 1 will be described.
【0032】まず、各種パターンの積層処理がなされた
半導体ウェハ3を収納容器4に収納し、収納容器4の設
置場所に設置する。半導体ウェハ研磨装置1の作動を開
始させると移動アーム6が収納容器4から半導体ウェハ
3を最上段から取り出し、取り出した半導体ウェハ3を
計測器16に搬送し、半導体ウェハ3の中央と、直角に
位置する周囲4箇所に形成されたチップ上の同一の箇所
の膜厚を計測する。計測された膜厚の値は制御部に送ら
れるとともに膜厚を計測した半導体ウェハ3は中心調整
器10に送られ、移動アーム6の端部7の中心と中心位
置を正確に設定される。中心調整器10で中心位置を設
定したなら移動アーム6は半導体ウェハ3を回転移動台
12の研磨前載置箇所に載せる。First, the semiconductor wafer 3 having been subjected to the lamination processing of various patterns is stored in the storage container 4, and is set at the installation location of the storage container 4. When the operation of the semiconductor wafer polishing apparatus 1 is started, the moving arm 6 takes out the semiconductor wafer 3 from the storage container 4 from the uppermost stage, conveys the taken out semiconductor wafer 3 to the measuring instrument 16, and makes a right angle with the center of the semiconductor wafer 3. The film thickness is measured at the same location on the chip formed at the four surrounding locations. The measured value of the film thickness is sent to the control unit, and the semiconductor wafer 3 whose film thickness has been measured is sent to the center adjuster 10 so that the center and the center position of the end 7 of the moving arm 6 are accurately set. When the center position is set by the center adjuster 10, the moving arm 6 places the semiconductor wafer 3 on the pre-polishing mounting position of the rotary moving table 12.
【0033】回転移動台12の研磨前の載置箇所に2枚
の半導体ウェハ3が載置されたら、回転移動台12は半
回転回転し、半導体ウェハ3を研磨台2側に送る。次
に、把持具28が下降し回転移動台12上の半導体ウェ
ハ3を吸着し、搬送器14によって研磨台2のプラテン
22上に置かれる。研磨台2では、プラテン22が回転
し、又研磨剤が供給器26から供給されて、まず予め入
力されている研磨量で半導体ウェハ3を研磨する。研磨
が終了したなら、搬送器14によって把持部28を洗浄
部44に搬送し、研磨時に把持部28や半導体ウェハ3
に付着した研磨剤を除去する。研磨剤を除去した後、回
転移動台12の研磨後の載置箇所に半導体ウェハ3を載
置する。When the two semiconductor wafers 3 are placed on the mounting position of the rotary moving table 12 before polishing, the rotary moving table 12 rotates half a turn, and sends the semiconductor wafer 3 to the polishing table 2 side. Next, the gripper 28 descends, sucks the semiconductor wafer 3 on the rotary moving table 12, and is placed on the platen 22 of the polishing table 2 by the carrier 14. In the polishing table 2, the platen 22 rotates, and the polishing agent is supplied from the supply device 26, and the semiconductor wafer 3 is first polished with the polishing amount input in advance. When polishing is completed, the gripper 28 is transported to the cleaning unit 44 by the transporter 14, and the gripper 28 and the semiconductor wafer 3 are polished during polishing.
The abrasive adhered to is removed. After removing the abrasive, the semiconductor wafer 3 is placed on the place after polishing of the rotary moving table 12.
【0034】半導体ウェハ3を載置すると回転移動台1
2が半回転回転し、研磨後の半導体ウェハ3が移動アー
ム8側になり、同時にすでに回転移動台12の研磨前載
置箇所に載置されていた研磨前の半導体ウェハ3が研磨
台2側に移動する。研磨後の半導体ウェハ3を扱う移動
アーム8は、回転移動台12から半導体ウェハ3を把持
し、計測器18に送る。計測器18は、研磨前に計測し
た箇所に対応する箇所を選定して半導体ウェハ3の膜厚
を計測し、計測値を制御部(図示せず)に送る。When the semiconductor wafer 3 is mounted, the rotary moving table 1
2 is rotated half a turn, and the polished semiconductor wafer 3 is on the moving arm 8 side. At the same time, the unpolished semiconductor wafer 3 already mounted on the pre-polishing mounting position of the rotary moving table 12 is on the polishing table 2 side. Go to The moving arm 8 handling the polished semiconductor wafer 3 grips the semiconductor wafer 3 from the rotary moving table 12 and sends it to the measuring device 18. The measuring device 18 measures a film thickness of the semiconductor wafer 3 by selecting a position corresponding to a position measured before polishing, and sends the measured value to a control unit (not shown).
【0035】制御部は、研磨前に計測した膜厚の値と研
磨後に計測した膜厚の値とから半導体ウェハ3の被研磨
状態を検出し、又研磨後の膜厚と基準値とを比較する。
そして、半導体ウェハ3の膜厚が基準値を越えていると
判断した場合には、研磨台2における研磨量を増加さ
せ、又研磨量が大きいときには研磨時間を短縮させる等
研磨量を減少させる。The controller detects the state of the semiconductor wafer 3 to be polished from the value of the film thickness measured before polishing and the value of the film thickness measured after polishing, and compares the film thickness after polishing with a reference value. I do.
When it is determined that the film thickness of the semiconductor wafer 3 exceeds the reference value, the polishing amount in the polishing table 2 is increased, and when the polishing amount is large, the polishing amount is reduced, such as shortening the polishing time.
【0036】更に、研磨量にばらつきがある場合、例え
ば研磨面が半導体ウェハ3の基材に対して傾斜している
場合や中央部と周辺部で研磨量に差がある場合には、把
持部28の背面の押圧条件やドレッサ30を用いて研磨
パッド24の状態を変更する。Further, when there is a variation in the polishing amount, for example, when the polishing surface is inclined with respect to the base material of the semiconductor wafer 3 or when there is a difference in the polishing amount between the central portion and the peripheral portion, the gripping portion is used. The state of the polishing pad 24 is changed using the pressing conditions on the back surface of the polishing pad 28 and the dresser 30.
【0037】例えば図4に示す半導体ウェハ3のAから
Eの各点における研磨量Ra〜Reを計測し、中心部の
研磨量Raと周辺の研磨量Rb〜Reの平均Rhとを比
較する。RaとRhの比較の結果Raの値がRhの値よ
り所定値以上大きく中心部の厚みが厚い場合には中心部
が凸状態と判定し、制御部は把持部28の背圧を高め、
中心部における押し付け圧力が増加するように指示を出
す。これにより、これ以降研磨される半導体ウェハ3の
中心部の押し付け力が増大し、研磨後の半導体ウェハ3
の膜厚を平坦にできる。For example, the polishing amounts Ra to Re at points A to E of the semiconductor wafer 3 shown in FIG. 4 are measured, and the polishing amount Ra at the center and the average Rh of the polishing amounts Rb to Re at the periphery are compared. When the value of Ra is larger than the value of Rh by a predetermined value or more and the thickness of the central part is thicker than the value of Rh, the central part is determined to be in the convex state, and the control unit increases the back pressure of the grip part 28,
An instruction is issued to increase the pressing pressure at the center. As a result, the pressing force at the center of the semiconductor wafer 3 to be polished thereafter is increased, and the polished semiconductor wafer 3
Can be made flat.
【0038】あるいは他の方法として、制御部は、ドレ
ッサ30に指示を送り、研磨台2の研磨面が凸状態にな
るようドレッシングを行わせる。すると研磨プロセスは
プロセスパッド面の形状の転写であるので、これによっ
ても膜厚の凸状態を解消し、研磨後の膜厚を平坦にする
ことができる。この際、研磨面の形状を検出する計測器
(図示せず)とドレッサ30とを連動させて最適な形状
を創成する。一方、中心部の厚みが薄く凹と判定された
場合には、制御部は、ドレッサ30によるドレッシング
で研磨台2の研磨面が凹状態となるよう指示を送り、そ
の後の研磨条件を調整する。As another method, the control unit sends an instruction to the dresser 30 to perform dressing so that the polishing surface of the polishing table 2 becomes convex. Then, since the polishing process is the transfer of the shape of the process pad surface, the convex state of the film thickness can be eliminated and the film thickness after polishing can be made flat. At this time, a measuring instrument (not shown) for detecting the shape of the polished surface and the dresser 30 are linked to create an optimum shape. On the other hand, when it is determined that the thickness of the central portion is thin and concave, the control unit sends an instruction to cause the polishing surface of the polishing table 2 to be in a concave state by dressing by the dresser 30, and adjusts the subsequent polishing conditions.
【0039】更に、AからEの各点における研磨量Ra
〜Reの平均Rmを求め、Ra〜Reの最大値と最小値
の差をRmで除した値から研磨状態の均一性を求めた
り、または、中心部A点を通過する直線上のRb、R
a、Rdの大小の関係を求め、大小の関係が例えばRb
<Ra<Rdのように一定の場合には、D点からB点に
向かって傾斜していること等を求めることができ、これ
らの結果をフィードバックしてもよい。図5に計測結果
とフィードバックの対処方法との関連について示す。図
5の上段に示すように研磨速度が遅い場合には、研磨圧
を高めることにより対処でき、また上述したように、膜
形状が凸の場合には、バックフィル圧力を高める、ある
いはパッド面形状を調整して対処する。逆に膜形状が凹
の場合にはパッド面形状の調整で対処する。更に、研磨
量が不足する場合には、研磨量を調整する。Further, the polishing amount Ra at each point of A to E
To the average of Rm, and the difference between the maximum and minimum values of Ra to Re divided by Rm to determine the uniformity of the polished state, or Rb, R on a straight line passing through the central point A.
The relationship between a and Rd is determined, and the relationship between
In the case of a constant value such as <Ra <Rd, it is possible to obtain a slope from the point D toward the point B, and the results may be fed back. FIG. 5 shows the relationship between the measurement result and the feedback coping method. When the polishing rate is low as shown in the upper part of FIG. 5, it can be dealt with by increasing the polishing pressure. As described above, when the film shape is convex, the backfill pressure is increased or the pad surface shape is increased. Adjust and deal with. Conversely, when the film shape is concave, it is dealt with by adjusting the pad surface shape. Further, when the polishing amount is insufficient, the polishing amount is adjusted.
【0040】膜厚の計測が終了した半導体ウェハ3は、
移動アーム8により収納容器20に順次収納される。研
磨後の半導体ウェハ3が収納容器20に収納されると、
水中に浸され、半導体ウェハ3は乾燥しないようになっ
ている。収納容器20の収容スペースが半導体ウェハ3
で満たされると取りはずし、代わって空の収納容器20
を設置する。The semiconductor wafer 3 whose film thickness has been measured is
It is sequentially stored in the storage container 20 by the moving arm 8. When the polished semiconductor wafer 3 is stored in the storage container 20,
The semiconductor wafer 3 is immersed in water so as not to dry. The storage space of the storage container 20 is the semiconductor wafer 3
Removed when full, replace with empty storage container 20
Is installed.
【0041】このように、本発明の半導体ウェハ研磨装
置1によれば、半導体ウェハ3の研磨開始前に計測器1
6により予め定められた半導体ウェハ3の所定箇所の膜
厚を計測し、そして研磨台2により研磨が終了した段階
で研磨前に計測した位置に対応した位置の膜厚を計測
し、得られた計測値から研磨装置1における研磨状態を
把握し、研磨条件を適宜変更することとしたので、所望
の研磨状態を保持でき、正確な研磨を無駄なく、しかも
連続して行うことができる。As described above, according to the semiconductor wafer polishing apparatus 1 of the present invention, before the polishing of the semiconductor wafer 3 is started, the measuring device 1
6, the film thickness at a predetermined location of the semiconductor wafer 3 determined in advance is measured, and when the polishing is completed by the polishing table 2, the film thickness at a position corresponding to the position measured before polishing is obtained. Since the polishing state in the polishing apparatus 1 is grasped from the measured values and the polishing conditions are appropriately changed, a desired polishing state can be maintained, and accurate polishing can be performed without waste and continuously.
【0042】次に、半導体ウェハ研磨装置の他の例を説
明する。Next, another example of the semiconductor wafer polishing apparatus will be described.
【0043】この例は、半導体ウェハ研磨装置1の外部
に膜厚測定装置(図示せず)を設置し、研磨開始前の半
導体ウェハ3の膜厚測定は、外部に設置された膜厚測定
装置で測定するようにしたものである。そして、測定装
置で計測した計測結果を半導体ウェハ研磨装置1に入力
し、入力された測定値と研磨後に測定した値とを用いて
半導体ウェハ研磨装置1における半導体ウェハ3の研磨
状態を求め、研磨条件を適切に設定、変更する。このよ
うにしても、研磨状態を直ちに得ることができ、それに
基づいた適切な設定を行うことができるので、正確な半
導体ウェハ3の研磨を連続して実現できる。In this example, a film thickness measuring device (not shown) is installed outside the semiconductor wafer polishing apparatus 1, and the film thickness measurement of the semiconductor wafer 3 before the start of polishing is performed by the film thickness measuring device installed outside. Is to be measured. Then, the measurement result measured by the measuring device is input to the semiconductor wafer polishing device 1, and the polishing state of the semiconductor wafer 3 in the semiconductor wafer polishing device 1 is determined using the input measured value and the value measured after polishing, and the polishing is performed. Set and change conditions appropriately. Even in this case, the polishing state can be immediately obtained, and appropriate setting can be performed based on the polishing state, so that accurate polishing of the semiconductor wafer 3 can be continuously performed.
【0044】なお、上記実施例では絶縁膜を研磨した
が、本発明ではそれに限るものではない。Although the insulating film is polished in the above embodiment, the present invention is not limited to this.
【0045】[0045]
【発明の効果】本発明の半導体ウェハ研磨装置によれ
ば、研磨前及び研磨後に半導体ウェハの膜厚を計測する
計測器を設け、これら計測器が計測した値に基づいて研
磨条件等を調整することとしたので、適切な研磨状態を
把握でき、かかる計測結果に基づいて、個々の半導体ウ
ェハの研磨を正確に連続して行わせることができる。According to the semiconductor wafer polishing apparatus of the present invention, a measuring device for measuring the thickness of a semiconductor wafer before and after polishing is provided, and polishing conditions and the like are adjusted based on the values measured by these measuring devices. Therefore, an appropriate polishing state can be grasped, and the polishing of each semiconductor wafer can be accurately and continuously performed based on the measurement result.
【図1】本発明の半導体ウェハ研磨装置の一実施例を示
す平面図である。FIG. 1 is a plan view showing one embodiment of a semiconductor wafer polishing apparatus according to the present invention.
【図2】本発明の半導体ウェハ研磨装置の一実施例を示
す斜視図である。FIG. 2 is a perspective view showing one embodiment of a semiconductor wafer polishing apparatus according to the present invention.
【図3】研磨台を示す一部断面図である。FIG. 3 is a partial sectional view showing a polishing table.
【図4】半導体ウェハを示す図である。FIG. 4 is a view showing a semiconductor wafer.
【図5】計測結果と対処方法との関連を示す図である。FIG. 5 is a diagram showing a relationship between a measurement result and a coping method.
【符号の説明】 1 半導体ウェハ研磨装置 2 研磨台 3 半導体ウェハ 4、20 収納容器 6、8 移動アーム 7 端部 10 中心調整器 12 回転移動台 14 搬送器 16、18 計測器 22 プラテン 24 研磨パッド 26 供給器 28 把持部 30 ドレッサ 31 リング 32 ドレッシング刃 34 台座部 36 柱部 38 腕部 40 レール 44 洗浄部DESCRIPTION OF SYMBOLS 1 Semiconductor wafer polishing apparatus 2 Polishing table 3 Semiconductor wafer 4, 20 Storage container 6, 8 Moving arm 7 End part 10 Center adjuster 12 Rotary moving table 14 Transporter 16, 18 Measuring instrument 22 Platen 24 Polishing pad Reference Signs List 26 Feeder 28 Gripping part 30 Dresser 31 Ring 32 Dressing blade 34 Pedestal part 36 Column part 38 Arm part 40 Rail 44 Cleaning part
Claims (5)
化学的機械的研磨方法で研磨する半導体ウェハ研磨装置
において、 前記半導体ウェハの層間膜の厚みを該半導体ウェハの研
磨前及び研磨後に計測する計測手段と、 前記計測手段が計測した前記層間膜の膜厚に基づき前記
半導体ウェハの研磨状態を検出する検出手段と、 前記検出手段が検出した研磨状態と半導体ウェハの基準
膜厚とを比較し前記半導体ウェハ研磨装置の研磨条件を
制御する制御手段と、からなることを特徴とした半導体
ウェハ研磨装置。1. A semiconductor wafer polishing apparatus for polishing an interlayer film formed on a surface of a semiconductor wafer by a chemical mechanical polishing method, wherein a thickness of the interlayer film of the semiconductor wafer is measured before and after polishing of the semiconductor wafer. Measuring means, detecting means for detecting a polishing state of the semiconductor wafer based on the film thickness of the interlayer film measured by the measuring means, and comparing the polished state detected by the detecting means with a reference film thickness of the semiconductor wafer. Control means for controlling polishing conditions of the semiconductor wafer polishing apparatus.
形成された半導体チップの同一の箇所に相当する箇所の
膜厚を研磨前後において計測することを特徴とした請求
項1に記載の半導体ウェハ研磨装置。2. The semiconductor wafer according to claim 1, wherein the measuring means measures the film thickness of a portion corresponding to the same portion of the semiconductor chip formed on the semiconductor wafer before and after polishing. Polishing equipment.
ハの中心部と周辺部に均等に分布した複数の点としたこ
とを特徴とした請求項1または請求項2に記載の半導体
ウェハ研磨装置。3. The semiconductor wafer polishing apparatus according to claim 1, wherein the measuring points of the measuring means are a plurality of points evenly distributed in a central portion and a peripheral portion of the semiconductor wafer. .
する計測手段は、湿式の計測手段であることを特徴とし
た請求項1から請求項3のいずれか1項に記載の半導体
ウェハ研磨装置。4. The semiconductor wafer polishing apparatus according to claim 1, wherein the measuring means for measuring the film thickness of the semiconductor wafer after polishing is a wet measuring means. apparatus.
ハ表面の凹凸をほぼ研磨する一次研磨と膜厚を調整する
二次研磨に分割し、前記一次研磨後の膜厚を前記計測手
段で計測し、前記二次研磨の加工時間を、表面の凹凸が
解消された前記半導体ウェハの既知の研磨量を用いて求
め、研磨することを特徴とした請求項1から請求項4の
いずれか1項に記載の半導体ウェハ研磨装置。5. The polishing of the semiconductor wafer is divided into primary polishing for substantially polishing irregularities on the surface of the semiconductor wafer and secondary polishing for adjusting the film thickness, and the film thickness after the primary polishing is measured by the measuring means. The processing time of the secondary polishing is obtained by using a known polishing amount of the semiconductor wafer in which surface irregularities have been eliminated, and polishing is performed. A semiconductor wafer polishing apparatus as described in the above.
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP24972796A JPH1098016A (en) | 1996-09-20 | 1996-09-20 | Semiconductor wafer-polishing device |
KR1019997002343A KR20000036250A (en) | 1996-09-20 | 1997-09-19 | Semiconductor Wafer Polishing Apparatus |
PCT/JP1997/003341 WO1998012739A1 (en) | 1996-09-20 | 1997-09-19 | Semiconductor wafer polishing device |
TW086113653A TW344107B (en) | 1996-09-20 | 1997-09-19 | Semiconductor wafer-polishing device |
EP97940435A EP1017090A1 (en) | 1996-09-20 | 1997-09-19 | Semiconductor wafer polishing device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP24972796A JPH1098016A (en) | 1996-09-20 | 1996-09-20 | Semiconductor wafer-polishing device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH1098016A true JPH1098016A (en) | 1998-04-14 |
Family
ID=17197312
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP24972796A Withdrawn JPH1098016A (en) | 1996-09-20 | 1996-09-20 | Semiconductor wafer-polishing device |
Country Status (5)
Country | Link |
---|---|
EP (1) | EP1017090A1 (en) |
JP (1) | JPH1098016A (en) |
KR (1) | KR20000036250A (en) |
TW (1) | TW344107B (en) |
WO (1) | WO1998012739A1 (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6062954A (en) * | 1998-01-09 | 2000-05-16 | Speedfam Co., Ltd. | Semiconductor wafer surface flattening apparatus |
US6905957B2 (en) | 2001-10-19 | 2005-06-14 | Nec Corporation | Polishing method and polishing apparatus permitting control of polishing time at a high accuracy |
JP2018518050A (en) * | 2015-05-29 | 2018-07-05 | サンエディソン・セミコンダクター・リミテッドSunEdison Semiconductor Limited | Method for processing a semiconductor wafer having a polycrystalline finish |
US11688653B2 (en) | 2020-03-06 | 2023-06-27 | Kioxia Corporation | Semiconductor manufacturing apparatus and method of manufacturing semiconductor device |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
IL150438A0 (en) | 2002-06-26 | 2002-12-01 | Nova Measuring Instr Ltd | Method of thin films measurement |
KR100641489B1 (en) * | 2003-12-30 | 2006-10-31 | 동부일렉트로닉스 주식회사 | CMP equipment and how it works |
US7732332B2 (en) * | 2006-03-10 | 2010-06-08 | United Microelectronics Corp. | Chemical mechanical polishing method with inspection pre and post processing |
KR100914578B1 (en) * | 2007-12-12 | 2009-08-31 | 주식회사 실트론 | Apparatus and Method for Manufacturing a Wafer |
KR102203419B1 (en) * | 2013-12-09 | 2021-01-15 | 주식회사 케이씨텍 | Chemical mechanical polishing method and apparatus |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5081796A (en) * | 1990-08-06 | 1992-01-21 | Micron Technology, Inc. | Method and apparatus for mechanical planarization and endpoint detection of a semiconductor wafer |
JPH07285069A (en) * | 1994-04-18 | 1995-10-31 | Shin Etsu Handotai Co Ltd | Automatic taper removal polishing method and device of wafer in sheet type polishing |
-
1996
- 1996-09-20 JP JP24972796A patent/JPH1098016A/en not_active Withdrawn
-
1997
- 1997-09-19 EP EP97940435A patent/EP1017090A1/en not_active Withdrawn
- 1997-09-19 TW TW086113653A patent/TW344107B/en active
- 1997-09-19 KR KR1019997002343A patent/KR20000036250A/en not_active Application Discontinuation
- 1997-09-19 WO PCT/JP1997/003341 patent/WO1998012739A1/en not_active Application Discontinuation
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6062954A (en) * | 1998-01-09 | 2000-05-16 | Speedfam Co., Ltd. | Semiconductor wafer surface flattening apparatus |
US6905957B2 (en) | 2001-10-19 | 2005-06-14 | Nec Corporation | Polishing method and polishing apparatus permitting control of polishing time at a high accuracy |
JP2018518050A (en) * | 2015-05-29 | 2018-07-05 | サンエディソン・セミコンダクター・リミテッドSunEdison Semiconductor Limited | Method for processing a semiconductor wafer having a polycrystalline finish |
JP2020025110A (en) * | 2015-05-29 | 2020-02-13 | グローバルウェーハズ カンパニー リミテッドGlobalWafers Co.,Ltd. | Method of processing semiconductor wafer having polycrystalline finish |
US10699908B2 (en) | 2015-05-29 | 2020-06-30 | Globalwafers Co., Ltd. | Methods for processing semiconductor wafers having a polycrystalline finish |
US11355346B2 (en) | 2015-05-29 | 2022-06-07 | Globalwafers Co., Ltd. | Methods for processing semiconductor wafers having a polycrystalline finish |
US11688653B2 (en) | 2020-03-06 | 2023-06-27 | Kioxia Corporation | Semiconductor manufacturing apparatus and method of manufacturing semiconductor device |
Also Published As
Publication number | Publication date |
---|---|
EP1017090A4 (en) | 2000-07-05 |
EP1017090A1 (en) | 2000-07-05 |
WO1998012739A1 (en) | 1998-03-26 |
TW344107B (en) | 1998-11-01 |
KR20000036250A (en) | 2000-06-26 |
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