JPH10336486A - Video signal processing device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To perform a gamma correction process or a video signal transmitted or read from a storage medium for the first time after quantization and compression encoding after photoelectric conversion and recording on a transmission or storage medium. Provided is a video signal processing device that performs contour correction processing to reduce the amount of information during transmission and storage. SOLUTION: An output signal of a solid-state imaging device 111 is quantized by a pre-processing circuit 112, then encoded by an inter-frame encoding circuit 113, and is transmitted by a transmission encoding circuit 114 so that the data sequence of the video signal matches the line protocol. And transmitted to the receiving unit 12. The transmission decoding circuit 121 and the inter-frame decoding circuit 122 restore the transmitted data sequence to a one-dimensional digital video signal in the same format as that at the time of quantization. Since the digital video signal is processed by the gamma correction circuit 123 and the contour correction circuit 125 of the receiving unit 12, the encoding of the noise component is suppressed and the amount of information to be transmitted can be reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video signal processing apparatus for transmitting and displaying a video signal obtained from an image pickup tube or a solid-state image pickup device using a dedicated line or a public line, and an image pickup tube or a solid-state image pickup device. The present invention relates to a video signal processing apparatus that encodes and records video signals obtained from a storage medium on a storage medium, reads the video signals from the storage medium, and reproduces the video signals, and is particularly configured to reduce the amount of information to be transmitted and stored. .

[0002]

2. Description of the Related Art An apparatus which performs imaging by photoelectric conversion using a solid-state imaging device or an imaging tube on a transmission side, encodes and transmits an obtained video signal, decodes on a reception side, and decodes and displays the image on a monitor is known. As a video signal transmission device, for example,
No. 2-253781. According to this, the transmitting side performs video transmission by connecting an existing television camera and an encoder in series.

FIG. 13 shows a conventional video signal transmission method.
This will be described with reference to FIG. FIG. 13 shows an image transmission device described in Japanese Patent Application Laid-Open No. H2-253781, which includes a transmission unit 1303 and a reception unit.
Equipped with a digital interface to connect to 1304,
It is configured to be able to transmit and receive digital video signals.

The output video signal of the TV camera 1301
The quantization is performed by the A / D converter 13031 of 1303. On the other hand, a digital input device 1302 such as a scanner captures an image and outputs a digital video signal. The digital input interface 13032 performs voltage conversion so as to have the same logic level as the A / D converter 13031. Switch 13033
Is the A / D converter 13031 and digital input interface 13
One of the video signals from 032 is selected and the video signal is input to the encoder 13034.

[0005] The encoder 13034 encodes the video signal and outputs it to the receiving unit 1304 via a line. The video signal from the line is decoded by the decoder 13041. The switch 13042 selects one of the D / A converter 13043 and the digital output interface 13044 as the output destination of the decoded video signal.

[0006] When the video signal is output to the television monitor 1305, the decoded video signal is converted into an analog signal by the D / A converter 13043.
In the case of outputting to a digital output device 1306 such as a printer, the interface is converted so that the decoded video signal can be output to the digital output device 1306 by the digital output interface 13044. In this way, the transmitting side can input and encode a video and transmit it, and the receiving side can display and print the transmitted video signal.

A method of capturing an image by photoelectric conversion using a solid-state imaging device or an imaging tube, encoding the obtained video signal, and recording the encoded video signal on a storage medium is described in, for example, JP-A-6-309773. FIG. 14 shows a signal processing storage device described in Japanese Patent Laid-Open No. 6-309773, which is configured to store a video output from a television camera on a disk.

[0008] The video signal of the television camera 1401 is encoded and compressed by the encoder 14021 of the signal processing storage device 1402. The encoded signal is temporarily stored in the buffer memory 14022, and is modulated by the modulation recording circuit 14023 into a format recordable on a disk. Controller 14024
Monitors the amount of modulated data and controls the disk changer 14025 to replace the disk when the amount of data exceeds the storage capacity of the disk. Thus, the video signal can be stored in the storage medium.

[0009]

In the transmission of a video signal, if the amount of information to be transmitted increases, the communication cost increases. In recording the video signal, the recording time is limited because the capacity of a recording medium is limited. Would. Therefore,
In order to reduce communication costs and enable long-time recording, it is required to reduce the amount of information while maintaining high image quality.

FIG. 15 shows a problem of the conventional image transmission apparatus. In the conventional image transmission apparatus shown in FIG. 13, the television camera 1301 emphasizes noise components to perform gamma correction processing and contour correction processing. FIGS. 15 and 16 show the principle that the noise component is emphasized. When the linear signal without gamma correction of FIG. 15A is gamma-corrected to obtain the nonlinear signal of FIG. At the video signal level, the amplification factor increases, so that the noise amplitude increases. Further, if the contour is corrected for the video signal of FIG. 16A, the noise component is emphasized as shown in FIG. 16B. If these emphasized noises change in a spatially or temporally uncorrelated manner, the compression efficiency of the noise component is low even if the image is compressed, and the amount of information to be transmitted increases.

An object of the present invention is to meet a demand for reducing the amount of information transmitted and stored in such an image signal processing device. On the other hand, not only the miniaturization of the camera but also the miniaturization of the system for all the devices that perform imaging, transmission, and storage is required, so that the circuit scale must be further reduced, and the present invention meets this demand. It is also intended.

[0012]

SUMMARY OF THE INVENTION In order to solve this problem, the present invention provides a method of quantizing and compressing and encoding after photoelectric conversion, recording the encoded data on a transmission or storage medium, and reading from the transmitted video signal or storage medium. The gamma correction processing or the contour correction processing is performed on the output video signal for the first time.

Thus, the amount of information to be transmitted and stored can be reduced. Further, by providing a noise reduction unit before transmission or recording, it is possible to further improve the S / N and reduce the amount of information to be transmitted and stored. By configuring the coding means with means for performing inter-field coding or inter-frame coding, it is possible to improve the compression rate and further reduce the amount of information to be transmitted and stored. When the aperture of the lens is gradually opened at the time of starting the power supply and encoding is performed, it is possible to suppress abrupt generation of information. Also, for the gamma correction processing and the contour correction processing, the execution procedure is described in the storage means on the receiving side, and the calculation means reads the execution procedure and performs the processing, so that a dedicated processing circuit is not provided. A video signal processing device with a reduced circuit scale can be provided.

[0014]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The invention according to claim 1 of the present invention is a video signal processing apparatus for transmitting a video signal picked up by an image pickup tube or a solid-state image pickup device, wherein the transmission side is obtained from the solid-state image pickup device. Means for amplifying, quantizing and compressing the video signal to be received and means for transmitting the coded video signal, and the receiving side having means for decoding the coded video signal and displaying the video. In addition, only the receiving side is provided with the gamma correction means or the contour correction means, and has an effect that the amount of information to be transmitted can be reduced.

According to a second aspect of the present invention, there is provided a video signal processing apparatus for transmitting a video signal picked up by an image pickup tube or a solid-state image pickup device, wherein the transmission side is obtained from the image pickup tube or the solid-state image pickup device. Means for amplifying, quantizing and compressing the video signal and means for transmitting the coded video signal, and the receiving side having means for decoding the coded video signal and displaying the video; ,
The transmitting side is provided with a means for reducing noise, and has an effect that the amount of information to be transmitted can be reduced while improving the S / N.

According to a third aspect of the present invention, there is provided a video signal processing apparatus for transmitting a video signal picked up by an image pickup tube or a solid-state image pickup device, wherein the transmission side is obtained from the image pickup tube or the solid-state image pickup device. Means for amplifying, quantizing and compressing the video signal and means for transmitting the coded video signal, and the receiving side having means for decoding the coded video signal and displaying the video; ,
The receiving side is provided with storage means for storing the gamma correction execution procedure or the contour correction execution procedure, and the arithmetic processing means reads the correction execution procedure from the storage means and executes the calculation, thereby reducing the circuit scale. Has the effect of being able to

According to a fourth aspect of the present invention, the transmitting side amplifies and quantizes a video signal obtained from an image pickup tube or a solid-state image pickup device and compresses it by encoding. A video signal processing device having means for transmitting, and a receiving side having a means for decoding the encoded video signal and displaying a video, and gradually opening the aperture of the lens of the imaging means at the start of power supply. This device has means for controlling so as to start imaging and encoding, and has an effect that a rapid increase in the amount of information to be transmitted can be suppressed.

According to a fifth aspect of the present invention, the encoding on the transmitting side is inter-field or inter-frame encoding.
When used in combination with any one of the video signal processing devices described above, the amount of information to be transmitted can be further reduced.

According to a sixth aspect of the present invention, there is provided a video signal processing apparatus for recording a video signal picked up by an image pickup tube or a solid-state image pickup device in a storage medium, reading the video signal from the storage medium, and reproducing and displaying the video signal. The recording side has a means for amplifying and quantizing a video signal obtained from an image pickup tube or a solid-state imaging device and compressing it by encoding, and a means for accumulating and recording an encoded video signal. It has means for reading out the coded video signal and then decoding and displaying the video, and gamma correction means or contour correction means are provided only on the reproduction side, so that the amount of information to be stored can be reduced. Has the effect of being able to.

According to a seventh aspect of the present invention, there is provided a video signal processing apparatus for recording a video signal picked up by an image pickup tube or a solid-state image pickup device in a storage medium, reading the video signal from the storage medium, and reproducing and displaying the video signal. The recording side has a means for amplifying and quantizing a video signal obtained from an image pickup tube or a solid-state imaging device and compressing it by encoding, and a means for accumulating and recording an encoded video signal. It has a means to read out the coded video signal and then decode it to display the video, and to provide a noise reduction means only on the recording side to reduce the amount of information to be recorded while improving the S / N. It has the effect that it can be achieved.

An eighth aspect of the present invention is a video signal processing apparatus for recording a video signal picked up by an image pickup tube or a solid-state image pickup device on a storage medium, reading the video signal from the storage medium, and reproducing and displaying the video signal. The recording side has a means for amplifying and quantizing a video signal obtained from an image pickup tube or a solid-state imaging device and compressing it by encoding, and a means for accumulating and recording an encoded video signal. Means for reading out the coded video signal and then decoding and displaying the video, and a storage means for storing a gamma correction execution procedure or a contour correction execution procedure provided on the reproduction side, and an arithmetic processing circuit for performing the correction from the storage means. The processing is performed by reading the execution procedure, and has an effect that the circuit scale can be reduced.

According to a ninth aspect of the present invention, the encoding on the recording side is inter-field or inter-frame encoding.
When used in combination with any one of the video signal processing devices described above, the amount of information to be recorded can be further reduced.

Hereinafter, an embodiment of the present invention will be described with reference to FIG.
This will be described with reference to FIG.

(First Embodiment) FIGS. 1 and 2 show the configuration of a video signal processing apparatus according to a first embodiment of the present invention. As shown in FIG. In a video signal processing apparatus including a means for encoding, transmitting, decoding and displaying a video signal obtained by an element, a gamma correction means or a contour correction means is provided only on the receiving side so as to reduce the amount of information to be transmitted. In detail, the gamma correction circuit in the receiving unit 12 of FIG.
This is provided with 123 and an outline correction circuit 125. It is preferable that the gamma correction circuit 123 and the contour correction circuit 125 are internal circuits of the LSI from the viewpoint of miniaturization.

In FIG. 1, a transmitting unit 11 captures an image of a subject and outputs a video signal to a line. In the transmission section 11, the solid-state imaging device 111 performs imaging and photoelectric conversion of a subject, and the obtained video signal is quantized by a pre-processing circuit 112 as quantization means.

FIG. 2 shows the details of the preprocessing circuit 112. In FIG. 2, a preprocessing circuit 112 includes an amplifying circuit 201 for amplifying a video signal to an amplitude that can be quantized and a
02.

In FIG. 1, an inter-frame encoding circuit 113 as means for encoding and compressing a quantized video signal.
Is compressed by digital signal processing. Transmission encoding circuit 114 as a means for transmitting an encoded video signal
Generates a data stream of a video signal so as to match the line protocol, and outputs the data stream to the receiving unit 12.

A transmission decoding circuit 121 and an inter-frame decoding circuit 122 as means for decoding the coded video signal are respectively provided with a video signal data sequence capable of inter-frame decoding the video signal data sequence from the transmission unit 11. , And performs inter-frame decoding to generate a one-dimensional digital video signal in the same format as that at the time of quantization.

Next, a gamma correction circuit 123 as gamma correction means performs gamma correction, and a contour correction circuit 125 as contour correction means extracts a specific frequency component to be emphasized by filtering.

The adder 124 adds the signal of the specific frequency component and the respective gamma-corrected digital video signals, and the post-processing circuit 126 D / A converts the digital video signals and displays them on the television monitor 13.

As described above, the video signal processing apparatus according to the first embodiment performs encoding before performing gamma correction or contour correction for emphasizing noise, transmits the encoded data, and performs gamma correction or contour correction processing for the first time on the receiving side. Therefore, it is possible to suppress an increase in transmission information caused by encoding the emphasized noise component as in the related art.

(Second Embodiment) FIGS. 1, 3 and 4 show the configuration of a video signal processing apparatus according to a second embodiment of the present invention. As shown in FIG. Alternatively, the video signal obtained by the solid-state imaging device is encoded and transmitted, and in a video signal processing device including a unit for decoding and displaying, a noise reduction unit is provided on the transmission side,
The amount of information to be transmitted is reduced. Specifically, in the preprocessing circuit of FIG. 3, the noise reduction circuit 302 as a noise reduction unit and the preprocessing circuit of FIG.
A noise reduction circuit 403 as noise reduction means is provided. As the noise reduction circuit, a circuit that can sufficiently reduce noise that is spatially or temporally uncorrelated is desirable.

A video signal obtained from the solid-state image pickup device 111 shown in FIG. 1 is amplified by the amplifying circuit 301 shown in FIG. 3 as the pre-processing circuit 112, and the noise is reduced by the noise reducing circuit 302 as an analog signal. The noise-reduced analog video signal is quantized by the quantization circuit 303, encoded by the inter-frame encoding circuit 113 of FIG. 1, and transmitted to the receiving side in the same manner as in the first embodiment. The processing on the receiving side is the same as that of the first embodiment.

The pre-processing circuit shown in FIG. 4 shows an example in which noise is reduced by digital signal processing. A video signal obtained from the solid-state image pickup device 111 shown in FIG. After being amplified by the amplifying circuit 401 and quantized by the quantizing circuit 402, the noise is reduced by the noise reducing circuit 403 using digital signal processing, and the coding is performed by the inter-frame coding circuit 113 in FIG. And transmitted to the receiving side in the same manner as in the first embodiment.

As described above, the video signal processing apparatus according to the second embodiment of the present invention performs noise reduction and encoding before performing gamma correction or contour correction for emphasizing noise.
Since transmission is configured, it is possible to suppress an increase in information to be transmitted caused by encoding a noise component as in the related art.

(Third Embodiment) FIGS. 5 and 6 show the structure of a video signal processing apparatus according to a third embodiment of the present invention. As shown in FIG. Encoding and transmitting the video signal obtained by
In a video signal processing apparatus having means for decoding and displaying, a storage means in which an execution procedure of gamma correction or an execution procedure of contour correction is stored only on the receiving side, and an arithmetic circuit for reading and executing the correction execution procedure Is provided to reduce the amount of circuitry. More specifically, the receiving unit 52 in FIG. 5 includes an arithmetic circuit 523 and a storage circuit 524. The arithmetic circuit 523 and the storage circuit 524 are each preferably a plurality of microprocessors capable of high-speed arithmetic processing, a ROM, and a RAM in terms of miniaturization.

In FIG. 5, a transmitting section 51 captures an image of a subject and outputs a video signal to a line. In the transmission unit 51, the solid-state imaging device 511 captures an image of a subject and performs photoelectric conversion. The obtained video signal is quantized by a pre-processing circuit 512 as a quantization unit. FIG. 2 or FIG.
Alternatively, it has the same configuration as that of FIG. 4 and includes an amplification circuit and a quantization circuit for amplifying a video signal to an amplitude that can be quantized, or an amplification circuit, a quantization circuit, and a noise reduction circuit.

The quantized video signal is compressed by digital signal processing in an inter-frame coding circuit 513 as means for coding and compressing. A transmission encoding circuit 514 as means for transmitting the encoded video signal generates a data sequence of the video signal so as to match the line protocol and outputs the data sequence to the receiving unit 52.

The transmission decoding circuit 521 and the inter-frame decoding circuit 522 as means for decoding the coded video signal respectively convert the video signal data stream from the transmission unit 51 into a video signal data stream that can be inter-frame decoded. Then, decoding is performed and inter-frame decoding is performed to generate a one-dimensional digital video signal in the same format as that at the time of quantization.

Next, the arithmetic circuit 523 reads the procedure for executing the gamma correction processing or the procedure for executing the contour correction stored in the storage circuit 524 and performs the gamma correction or the contour correction. The contour correction is performed in such a procedure that a specific frequency component to be emphasized of the gamma-corrected signal is extracted by filter processing and added to the gamma-corrected signal. The post-processing circuit 525 converts the digital video signal from digital to analog and displays it on the television monitor 53.

FIG. 6 shows details of an arithmetic circuit and a storage circuit according to the third embodiment of the present invention. The arithmetic circuit 523 includes a processor section 61 for performing arithmetic processing and an operating section 62 including switches, a volume, or a rotary encoder for controlling gamma correction processing or contour correction processing.
The processor unit 61 further performs a gamma correction process or an outline correction process on the video signal 60 subjected to the field or inter-frame decoding by software, and outputs the output to an operation output 65. And a computing unit B612 for monitoring.

The storage circuit 524 stores ROM 63 for storing software for performing gamma correction processing or contour correction processing and software for monitoring the state of the operation unit 62, and stores intermediate results of calculations performed by the calculation units A611 and B612. It consists of RAM64.

When the state of a switch or the like of the operation unit 62 changes, the arithmetic unit B612 instructs the arithmetic unit A611 to perform a process corresponding to the change based on the software stored in the ROM 63. Control becomes possible.

As described above, the video signal processing apparatus according to the third embodiment of the present invention is a micro-processor capable of performing a plurality of arithmetic processes so as to perform an arithmetic operation on a video signal while monitoring the state of the operation unit 62. In the case of a processor, other software, for example, control software of a personal computer can be started simultaneously by the arithmetic unit B612 using the time during which the state of the operation unit 62 is not monitored. Therefore, when the personal computer and the camera are integrated, the video signal processing of the camera can be performed by the microprocessor of the personal computer. Therefore, the circuit scale of the personal computer with the integrated camera can be reduced, and the imaging and compression can be performed. -The circuit scale of the entire transmission can be reduced.

(Fourth Embodiment) FIG. 7 shows a fourth embodiment of the present invention.
FIG. 7 shows a configuration of a video signal processing apparatus according to an embodiment of the present invention. As shown in FIG. In the video signal processing apparatus, means for controlling the aperture of the lens is provided on the transmission side to reduce the amount of information to be transmitted. More specifically, the lens 715 and the aperture control circuit 716 in the transmission unit 71 of FIG.
And a switch 717.
Preferably, the aperture of the lens can be controlled when the power is turned on.

In FIG. 7, a transmitting unit 71 images a subject,
Output video signal to line. In the transmission unit 71, the solid-state imaging device 711 captures an image of a subject and performs photoelectric conversion. The obtained video signal is a pre-processing circuit as a quantization unit.
Quantized at 712. The preprocessing circuit 712 has the same configuration as that of FIG. 2, FIG. 3, or FIG. 4, and includes an amplification circuit and a quantization circuit for amplifying a video signal to an amplitude that can be quantized, or an amplification circuit, a quantization circuit, and a noise reduction circuit. It is configured.

The quantized video signal is compressed by digital signal processing in an inter-frame encoding circuit 713 as means for encoding and compressing. A transmission encoding circuit 714 as means for transmitting the encoded video signal generates a data sequence of the video signal so as to conform to the line protocol, and outputs it to the receiving unit 72.

The receiving section 72 has the same configuration as the receiving section 12 of FIG. 1 in the first embodiment. That is, a transmission decoding circuit as a means for decoding an encoded video signal
721 and the inter-frame decoding circuit 722 return the data sequence of the video signal from the transmission unit 71 to the data sequence of a video signal that can be decoded between frames, and perform inter-frame decoding to perform one-dimensional decoding in the same format as the quantization time. Generate a digital video signal.

Next, a gamma correction circuit 723 as gamma correction means performs gamma correction, and a contour correction circuit 725 as contour correction means extracts a specific frequency component to be emphasized by filtering. The adder 724 adds the signal of the specific frequency component and each gamma-corrected digital video signal, and the post-processing circuit 726 performs D / A conversion of the digital video signal and displays it on the television monitor 73.

FIG. 8 illustrates the principle of operation of the video signal processing apparatus according to the fourth embodiment of the present invention.
Indicates the amount of information to be transmitted to the receiving unit 72. FIG.
(A) shows the case without aperture control and inter-frame coding at power-on, and since the video signal is transmitted uncompressed, there is always information to be transmitted at a certain level or more. Also
(B) shows a case where transmission is performed by inter-frame coding, and a video signal having a high correlation between frames is compressed. When the power is turned on, there is no correlation between frames, so the amount of information when encoded is large, but information to be transmitted is gradually reduced by compression. (C) shows the case of the fourth embodiment of the present invention. In the case of (B), the aperture control is further added. That is, when the power is turned on, the aperture is closed, and the solid-state imaging device or the imaging tube captures an image at a black level. When the operation of performing the inter-frame coding by erasing the frame memory instantly when the power is turned on is compared with the erased level of the frame memory and the video signal of the black level obtained by imaging, there is little information to be transmitted. It is. After that, by gradually opening the aperture, the video signal level changes smoothly and the amount of information to be transmitted can be increased smoothly, so that the amount of information to be transmitted as shown in (A) and (B) above Does not occur.

As described above, the video signal processing apparatus according to the fourth embodiment of the present invention is configured so as to combine the control for opening the aperture at power-on and the inter-frame coding at a time. It is possible to transmit a video signal through a transmission path having a narrower band as compared with (A) and (B). For example, in FIG. 8, (A) and (B) require the line capacity of the amount of information A that can be transmitted, whereas in the fourth embodiment of the present invention, the line capacity of the amount of information B that can be transmitted is large. If it can be transmitted, the communication cost can be reduced.

(Fifth Embodiment) FIGS. 9 and 10 show the configuration of a video signal processing apparatus according to a fifth embodiment of the present invention. There is provided means for modulating the video signal obtained by the element and recording it on a storage medium. The reproducing side in FIG. 10 reads out the video signal recorded on the storage medium, demodulates the video signal and displays the video on a television monitor. When means is provided, a means for reducing noise is provided on the recording side, or a means for performing gamma processing or contour correction processing is provided on the reproducing side so as to reduce the amount of information to be recorded. More specifically, it is provided with a preprocessing circuit and an inter-frame encoding circuit on the recording side in FIG. 9 or an inter-frame decoding circuit, a gamma correction circuit and a contour correction circuit in FIG. Gamma correction circuit and contour correction circuit are LSI
It is preferable from the viewpoint of miniaturization that the internal circuit be configured as the internal circuit.

In the recording section 91 shown in FIG.
Reference numeral 1 denotes an image of a subject and performs photoelectric conversion. The obtained video signal is quantized by a pre-processing circuit 912 as a quantization means. The pre-processing circuit 912 has the same configuration as that of FIG. 2, FIG. 3, or FIG. 4, and includes an amplification circuit and a quantization circuit for amplifying a video signal to an amplitude that can be quantized, or an amplification circuit, a quantization circuit, and a noise reduction circuit. It is configured. The quantized video signal is compressed by digital signal processing in an inter-frame encoding circuit 913 as a means for encoding and compressing. The encoded video signal is stored in a buffer memory 914.
And is modulated by the modulation recording circuit 915 into a format recordable on a disk. controller
The 916 monitors the amount of modulated data, and when data exceeding the storage capacity of the disk occurs, the disk changer
Control to change the disk to 917.

The reproduction unit 1001 shown in FIG.
The disk to be read by the disk changer 10012 controlled by 1 is selected. The demodulation / reproduction circuit 10013 demodulates the video signal stored on the disc, and the inter-frame decoding circuit 10014 inter-frame decodes the demodulated video signal to generate a one-dimensional digital video signal in the same format as the quantization time. .

Next, a gamma correction circuit 10015 as gamma correction means performs gamma correction, and a contour correction circuit 10017 as contour correction means extracts a specific frequency component to be emphasized by filtering. The adder 10016 adds the signal of the specific frequency component and each of the gamma-corrected digital video signals, and the post-processing circuit 10018 performs D / A conversion of the digital video signal and displays it on the television monitor 1002.

As described above, the video signal processing apparatus according to the fifth embodiment of the present invention performs storage on a storage medium before performing gamma correction or contour correction for reducing noise and enhancing noise on the recording side. Since the gamma correction processing and the outline correction processing are performed on the reproduction side, it is possible to prevent an increase in the amount of information to be recorded, which is caused by encoding the emphasized noise component as in the related art. Recording on a medium having a large storage capacity can be performed for a longer time than before.

(Sixth Embodiment) FIGS. 11 and 12 show the structure of the video signal processing apparatus on the reproduction side according to a sixth embodiment of the present invention. As shown in FIG. In a video signal processing apparatus comprising means for modulating a video signal obtained by a solid-state imaging device and storing the modulated video signal in a storage medium such as a disk, and decoding and displaying the video signal recorded in the storage medium, a gamma signal is provided only to the reproduction side. A memory means for storing a correction execution procedure or an outline correction execution procedure, and an arithmetic circuit for reading and executing the correction execution procedure are provided to reduce the circuit amount.
Specifically, the reproducing unit 1101 shown in FIG. 11 includes an arithmetic circuit 11015 and a storage circuit 11016.
The arithmetic circuit 11015 and the storage circuit 11016 are each preferably a plurality of myroprocessors capable of high-speed arithmetic processing, ROM and RAM in terms of miniaturization.

The reproducing unit 1101 shown in FIG.
The disk to be read by the disk changer 11012 controlled by is selected. The demodulation / reproduction circuit 11013 demodulates the video signal stored on the disc, and the inter-frame decoding circuit 11014 inter-frame decodes the demodulated video signal to generate a one-dimensional digital video signal in the same format as the quantization time. .

Next, the arithmetic circuit 11015 reads the procedure for executing the gamma correction or the procedure for executing the contour correction stored in the storage circuit 11016 and performs the gamma correction or the contour correction. The contour correction is performed in such a procedure that a specific frequency component to be emphasized of the gamma-corrected signal is extracted by filter processing and added to the gamma-corrected signal. The post-processing circuit 11017 performs D / A conversion on the calculated digital video signal and displays it on the television monitor 1102.

FIG. 12 shows details of the arithmetic circuit and the storage circuit according to the fifth embodiment of the present invention. The arithmetic circuit 11015 includes a processor unit 1201 for performing arithmetic processing and a switch for controlling gamma correction processing or contour correction processing, an operation unit 1202 including a volume or a rotary encoder, and the processor unit 1201 is subjected to field or inter-frame decoding. An arithmetic unit C12011 that performs gamma correction processing and contour correction processing of the video signal 1200 by software and outputs the result to an arithmetic output 1205, and an arithmetic unit D12012 that monitors the state of the operation unit 1202.

A storage circuit 11016 stores software for performing gamma correction processing and contour correction processing and software for monitoring the state of the operation unit 1202, and a ROM 1203 for storing software and a calculation unit C12011.
And a RAM 1204 for storing an intermediate result of the operation of the operation unit D12012. Operation unit when the state of the operation unit 1202 changes
D12012 instructs the arithmetic unit C12011 based on software stored in the ROM 1203 to perform processing in accordance with the change, so that gamma correction processing and contour correction processing can be controlled.

As described above, the video signal processing apparatus according to the sixth embodiment of the present invention is capable of performing a plurality of arithmetic processings capable of performing an arithmetic operation on an image signal while monitoring the state of the operation unit 1202. In the case of a processor, other software, for example, control software for a personal computer, can also be started at the same time in the arithmetic unit D12012 using the time during which the state of the operation unit 1202 is not monitored. Therefore, in a system in which a personal computer and a device for reproducing storage media are integrated, video signal processing can be performed by the microprocessor of the personal computer, so that the circuit scale of the entire system can be reduced.

In each of the above embodiments, the solid-state imaging device and the inter-frame coding are used. However, the present invention is not limited to this, and the imaging tube and the inter-field coding may be used.

[0064]

As described above, according to the first embodiment of the present invention, the gamma correction processing or the contour correction processing is not performed on the video signal transmitting side, and the gamma correction processing or the contour correction processing is first performed on the video signal receiving side. Since the contour correction processing is performed, an advantageous effect that the amount of information to be transmitted can be reduced can be obtained.

According to the second embodiment of the present invention, noise reduction is performed on the video signal transmitting side, and gamma correction processing or contour correction processing is performed on the video signal receiving side for the first time. The advantageous effect that the amount of information to be performed can be reduced is obtained.

According to the third embodiment of the present invention, the gamma correction processing or the contour correction processing does not use a dedicated circuit, and the gamma correction execution procedure and the contour correction execution procedure stored in the storage circuit are performed by the arithmetic circuit. Is read and executed, and by performing gamma correction processing or contour correction processing by software processing of the microprocessor, the circuit scale of the personal computer integrated with the camera can be reduced.
An advantageous effect is obtained that the circuit scale of the whole system of imaging, compression and transmission can be reduced.

According to the fourth embodiment of the present invention, when the power is turned on, the aperture is gradually opened on the transmitting side to perform imaging and start the encoding operation, thereby performing inter-field encoding or inter-frame encoding. In the used video transmission, a sudden increase in transmission information can be suppressed, so that a narrow band transmission path can be used, and the advantageous effect of reducing communication costs can be obtained.

According to the fifth embodiment of the present invention, on the video signal storage side, the photoelectrically converted signal is subjected to noise reduction and inter-frame encoding and recorded on a storage medium, and the reproduction side is subjected to inter-frame decoding. Since the gamma correction processing or the contour correction processing is performed only after this, the advantageous effects of reducing the amount of information recorded on the storage medium and extending the recording time can be obtained.

According to the sixth embodiment of the present invention, after performing decoding between fields or decoding between frames on the reproduction side of the video signal, the arithmetic means executes the gamma correction execution procedure or the outline correction execution stored in the storage means. The gamma correction or contour correction processing is performed by reading the procedure, so that the gamma correction processing or contour correction processing can be performed by the software processing of the microprocessor, and in a system in which a storage medium reproducing system and a personal computer are integrated. An advantageous effect that the circuit scale of the entire system can be reduced is obtained.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a video signal processing device according to first and second embodiments of the present invention;

FIG. 2 is a block diagram showing a configuration of a preprocessing circuit according to the first embodiment of the present invention;

FIG. 3 is a block diagram showing a configuration of a preprocessing circuit according to a second embodiment of the present invention;

FIG. 4 is a block diagram showing a configuration of another preprocessing circuit according to the second embodiment of the present invention;

FIG. 5 is a block diagram showing a configuration of a video signal processing device according to a third embodiment of the present invention;

FIG. 6 is a block diagram illustrating a configuration of an arithmetic circuit and a storage circuit according to a third embodiment of the present invention;

FIG. 7 is a block diagram showing a configuration of a video signal processing device according to a fourth embodiment of the present invention;

FIG. 8 is a diagram illustrating the operation principle of a video signal processing device according to a fourth embodiment of the present invention;

FIG. 9 is a block diagram showing a configuration on a storage side of a video signal processing device according to a fifth embodiment of the present invention;

FIG. 10 is a block diagram showing a configuration on a reproduction side of a video signal processing device according to a fifth embodiment of the present invention;

FIG. 11 is a block diagram showing a configuration on a reproduction side of a video signal processing device according to a sixth embodiment of the present invention;

FIG. 12 is a block diagram illustrating a configuration of an arithmetic circuit and a storage circuit according to a sixth embodiment of the present invention;

FIG. 13 is a block diagram illustrating a configuration of a conventional image transmission device.

FIG. 14 is a block diagram showing a configuration of a conventional signal processing storage device;

FIG. 15 is a diagram for explaining the principle that noise is enhanced by gamma correction processing;

FIG. 16 is a diagram for explaining the principle that noise is enhanced by contour correction processing.

[Explanation of symbols]

 11, 51, 71, 1303 Transmitter 111, 511, 711, 911 Solid-state image sensor 112, 512, 712, 912 Preprocessing circuit 113, 513, 713, 913 Interframe coding circuit 114, 514, 714 Transmission coding circuit 12, 52, 72, 1304 Receiver 121, 521, 721 Transmission decoding circuit 122, 522, 722, 10014, 11014 Inter-frame decoding circuit 123, 723, 10015 Gamma correction circuit 124, 724, 10016 Adders 125, 725 , 10017 Contour correction circuit 126, 525, 726, 10018, 11017 Post-processing circuit 13, 53, 73, 1002, 1102, 1305 TV monitor 201, 301, 401 Amplification circuit 202, 303, 402 Quantization circuit 302, 403 Noise reduction Circuits 523, 11015 Arithmetic circuits 524, 11016 Storage circuits 60, 1200 Video signals 61, 1201 Processor 611 Arithmetic unit A 612 Arithmetic unit B 62, 1202 Operation unit 63, 1203 ROM 64, 1204 RAM 65, 1205 Arithmetic output 715 Lens 716 Aperture control circuit 717, 13033, 13042 Switch 91 Recording unit 914, 14022 Buffer memory 915, 14023 Modulation recording circuit 916, 10011, 11011 , 14024 Controller 917, 10012, 11012, 14025 Disc changer 1001, 1101 Reproduction unit 10013, 11013 Demodulation reproduction circuit 12011 Operation unit C 12012 Operation unit D 1301, 1401 TV camera 1302 Digital input device 13031 A / D converter 13002 Digital input interface 13034, 14021 Encoder 13041 Decoder 13043 D / A converter 13044 Digital output interface 1306 Digital output device 1402 Signal processing storage device

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁶ Identification code FI H04N 7/24 H04N 7/13 Z

Claims (9)

[Claims] 1. A video signal processing apparatus for transmitting a video signal picked up by an image pickup tube or a solid-state image pickup device, wherein a transmission side amplifies, quantizes and encodes a video signal obtained from the image pickup tube or the solid-state image pickup device. Means for compression and means for transmitting an encoded video signal, the receiving side has means for decoding the encoded video signal and displaying the video, and only the receiving side has gamma correction means or contours. A video signal processing device comprising a correction unit. 2. A video signal processing apparatus for transmitting a video signal picked up by an image pickup tube or a solid-state image pickup device, wherein a transmitting side amplifies, quantizes and encodes a video signal obtained from the image pickup tube or the solid-state image pickup device. And means for transmitting the coded video signal, and the receiving side has means for decoding the coded video signal and displaying the video, and means for reducing noise on the transmitting side. The video signal processing device according to claim 1, further comprising: 3. A video signal processing device for transmitting a video signal picked up by an image pickup tube or a solid-state image pickup device, wherein a transmission side amplifies, quantizes and encodes a video signal obtained from the image pickup tube or the solid-state image pickup device. And means for transmitting the coded video signal. The receiving side has means for decoding the coded video signal and displaying the video. A video signal processing apparatus, comprising: storage means for storing a correction execution procedure, wherein an arithmetic processing means reads the correction execution procedure from the storage means and executes an operation. 4. The transmitting side has means for amplifying and quantizing a video signal obtained from an image pickup tube or a solid-state imaging device and compressing the same by encoding, and means for transmitting an encoded video signal. What is claimed is: 1. A video signal processing apparatus comprising: means for decoding an encoded video signal and displaying an image, wherein a control is performed such that when power supply is started, an aperture of a lens of said imaging means is gradually opened to start imaging and encoding. A video signal processing device comprising means for performing the following. 5. The video signal processing apparatus according to claim 1, wherein the coding on the transmission side is inter-field or inter-frame coding. 6. A video signal processing device for recording a video signal imaged by an image pickup tube or a solid-state image pickup device on a storage medium, reading out the image signal from the storage medium, and reproducing and displaying the image signal. Means for amplifying, quantizing and compressing the video signal obtained from, and means for storing and recording the coded video signal, and the reproducing side reads out the recorded coded video signal and then decodes it. A video signal processing apparatus comprising: means for displaying an image by means of a gamma correction means or contour correction means only on the reproduction side. 7. A video signal processing apparatus for recording a video signal imaged by an image pickup tube or a solid-state image pickup device on a storage medium, reading the image signal from the storage medium, and reproducing and displaying the image signal. Means for amplifying, quantizing and compressing the video signal obtained from, and means for storing and recording the coded video signal, and the reproducing side reads out the recorded coded video signal and then decodes it. A video signal processing apparatus comprising: means for displaying an image by means of a video signal; and noise reduction means provided on the recording side. 8. A video signal processing apparatus for recording a video signal picked up by an image pickup tube or a solid-state image pickup device on a storage medium, reading the signal from the storage medium, and reproducing and displaying the image signal. Means for amplifying, quantizing and compressing the video signal obtained from, and means for storing and recording the coded video signal, and the reproducing side reads out the recorded coded video signal and then decodes it. Storage means for storing a gamma correction execution procedure or an outline correction execution procedure on the reproduction side, and performing the processing by reading the correction execution procedure from the storage means by an arithmetic processing circuit. Characteristic video signal processing device. 9. The video signal processing apparatus according to claim 6, wherein encoding on the recording side is inter-field or inter-frame encoding.