JPH10303266A - Semiconductor analysis device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To shorten analysis time by means of the automatic recognition of a unique pattern and the automatic extraction of a pertinent lot and a wafer number, to detect a previous process, an abnormal process and an abnormal device in an early stage, to restore yield in the early stage, and to reduce manufacturing loss. SOLUTION: A unique pattern automatic retrieval means 1 analyzes a wafer on the prescribed lot, extracts a feature and automatically detects the unique pattern. A pattern automatic extraction means 2 automatically detects a pattern similar or matched to/with the pattern based on the unique pattern (feature extraction) obtained in the unique pattern automatic retrieval means 1 and obtains the pertinent lot number and the wafer number. A machine common tool 3 specifies by which manufacture device or manufacture process the wafer or lot applied to the obtained unique pattern is made.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a semiconductor analyzer, and more particularly, to a method of automatically detecting a peculiar pattern, detecting a lot number / wafer number similar to the detected peculiar pattern, and finding a corresponding lot number / wafer number. The present invention relates to a semiconductor analyzer for specifying which manufacturing process or manufacturing apparatus is used.

[0002]

2. Description of the Related Art Conventionally, when analyzing a peculiar pattern such as an abnormal pattern or a non-defective pattern in a wafer test of a semiconductor device, an analyst first selects a category to be tested. Here, the categories include, for example, all-bit non-defective products, redundancy non-defective products, DC defects, function defects, margin defects, and the like. In addition, there are hundreds of other test items. Then, the analyst made a judgment based on his / her experience based on whether or not a peculiar pattern was generated by stacking test wafers. Further, when a unique pattern is generated, when searching for the corresponding lot number and wafer number, the analyst looks at the output category wafer map or map sheet for each category for each wafer, and Was looking for a unique pattern.

[0003]

However, in the conventional technology, since the number of items in a category is enormous,
It is difficult and time-consuming to select all these categories and view all category wafer maps. Therefore, the search for the peculiar pattern is executed by narrowing down to a part of lots, representative defective categories, and the like. Conventionally, since the search has not been performed for all lots or wafers, the amount of information on the unique pattern is small, and the analysis on the unique pattern in the previous process cannot be performed accurately. Here, the analysis relating to the peculiar pattern in the pre-process is, for example, identification of a process or an apparatus in which a peculiar pattern such as a defect is generated in a manufacturing process in a clean room.

In view of the above, an object of the present invention is to reduce the analysis time by automatically recognizing a unique pattern and automatically extracting a lot and a wafer number. Further, according to the present invention, it is another object of the present invention to early detect a unique process or a unique device that causes an abnormality, a defect, a non-defective product, or the like due to a previous process or the like, to quickly recover a yield, and reduce a manufacturing loss.

[0005]

SUMMARY OF THE INVENTION A failure analysis apparatus according to the present invention includes a unique pattern automatic detection means for automatically detecting a unique pattern from a category wafer map obtained from a semiconductor memory tester, a lot number similar to the detected unique pattern. Automatic pattern extraction means for detecting the wafer number,
And a machine commonality tool for retrieving which of a preceding process or a manufacturing apparatus the plurality of lot numbers / wafer numbers corresponding to the peculiar pattern are provided.

According to a first solution of the present invention, a search condition specifying means for specifying a search condition for searching for a desired unique pattern, and a plurality of search conditions in accordance with the search condition specified by the search condition specifying means. A semiconductor analyzer comprising: a stacking unit that analyzes a pattern of a wafer to be analyzed and collects the analysis result; and a feature extraction unit that obtains a unique pattern by extracting a feature based on the analysis result stacked by the stacking unit. Provide equipment.

According to a second aspect of the present invention, there is provided a pattern designating interface for designating a pattern condition based on the unique pattern obtained by the feature extracting means,
Pattern analysis means for searching for a similarity or a match between the pattern condition specified by the pattern specification interface and the analyzed wafer and obtaining a corresponding wafer number and / or lot number; Provide equipment.

According to a third aspect of the present invention, there is provided a manufacturing process for manufacturing a wafer having a unique pattern based on a wafer number and / or a lot number corresponding to the unique pattern obtained by the pattern searching means. Alternatively, there is provided a semiconductor analyzing apparatus further comprising a specifying unit for specifying a manufacturing apparatus.

[0009]

FIG. 1 is a functional block diagram showing a semiconductor analyzer according to the present invention. The semiconductor analyzer of the present invention
Automatic unique pattern detection means 1, Automatic pattern extraction means 2
And a machine commonality tool 3.

The unique pattern automatic search means 1 is a means for analyzing a wafer for a predetermined lot, extracting features, and automatically detecting a unique pattern. The pattern automatic extraction means 2 is a means for automatically detecting a pattern similar or coincident with the unique pattern obtained by the unique pattern automatic search means 1, and obtaining a corresponding lot number / wafer number. The machine commonality tool 3 is a means for specifying which manufacturing apparatus or process the wafer or lot corresponding to the obtained unique pattern is.

Next, FIG. 2 shows a function-related diagram according to the semiconductor analyzer of the present invention.

The unique pattern automatic detecting means 1 includes a search condition specifying means 21, a map data stacking means 22, a feature extracting means 23, and a checking means 24.

The category,
The product name, period, process, department code, etc. are specified.
The map data stacking means 22 analyzes the pattern of the wafer according to the designated search condition, and totals and stacks the pattern data of a plurality of wafers. The feature extracting unit 23 extracts a feature based on the stacked pattern data to obtain a unique pattern. Here, the peculiar pattern is a pattern different from the normal one, and various peculiar patterns such as a defective or abnormal pattern, a good or normal pattern, and the like are assumed depending on the designated category. In the checking means 24, the obtained peculiar pattern is displayed by a two-dimensionally displayed contour line or a three-dimensionally displayed bird's-eye view, and the analyst can check this.

FIG. 3 is an explanatory diagram of a method for automatically detecting a unique pattern. Here, as an example, a wafer map showing the yield based on the category information of the non-defective / defective product determination is shown.

First, the automatic detection of the unique pattern is performed as shown in FIG.
As shown in (a), for a certain period (for example, week total)
Is obtained by superimposing the category information of. Further, as shown in FIG. 3B, a pattern is obtained by superimposing category information for a short period (for example, daily total) such as a period in which a peculiar tendency is observed. Next, as shown in FIG. 3 (c), the difference between the superposition patterns of these week totals and day totals is obtained, and it is determined whether or not a peculiar state such as non-defective / defective is generated by a predetermined reference value. Get the pattern.

FIG. 4 shows a unique pattern diagram of the wafer map. Here, as an example, a specific example of an abnormal pattern for a category of good / defective products is shown.

FIG. 4A shows a peripheral defective pattern. FIGS. 4B to 4D show patterns of a common defect, a central defect, and an area defect, respectively. Here, FIG.
In FIG. 4C, the peculiar pattern is set to an area common failure as shown in FIG.

Such a method can be performed for each category (for example, all-bit non-defective product, redundancy non-defective product, DC defect, function defect, margin defect, etc.) to obtain various peculiar patterns.

Returning to FIG. 2, the automatic pattern extracting means 2 includes a search condition specifying means 21, a pattern specifying interface 25, a pattern searching means 26, a display means 27, and a storage means 28.

As shown in FIG. 3C, the peculiar pattern obtained by the characteristic extracting means 23 of the peculiar automatic pattern detecting means 1 is transmitted to the pattern searching means 26 by the pattern specifying interface 25. The pattern specification I / F 25 and the pattern search unit 26 further perform a condition specification, a pattern specification, and a manual specification of a search target area and the like from the search condition specification unit 21. For example, the search condition designation and pattern designation include category designation, pattern file designation, designation pattern matching rate (matching rate) designation, and the like. Here, for the category specification,
For example, designation for outputting any of a non-defective product rate, a defective product rate, a test classification, a test number, and the like is performed. The pattern file specification includes a new specification, a change specification, and an existing file specification.

FIG. 5 is an explanatory view of a peculiar pattern or a pattern designation item. Regarding the designated item, the same applies to the automatically detected pattern and the manually designated pattern.

For the specification of a unique pattern, a value corresponding to a category type is specified in accordance with a search area (map address) on a wafer map. For example, as shown in FIG. 5, by specifying a non-defective product rate or a defective product rate m, n, l in correspondence with each map address, it is possible to specify a coincidence rate for each area. Further, as a search condition, the yield range of the target product can be determined in advance. For example, a plurality of ranges can be designated by classifying into a% or more, c% or more and d% or less, d% or less, and the like. Also,
For a defective area, for example, a plurality of types are designated by classifying the defective area into a coincident area with m% or more and a coincident area with n% or more. Can be. Furthermore, these search conditions can be combined and appropriately specified.

Returning to FIG. 2, the pattern search means 26 compares a large amount of category wafer map data stored in advance for each chip based on the search area and search conditions for the unique pattern, and Check against match rate. Then, in accordance with the search result, a corresponding lot number and / or wafer number for which a peculiar pattern is generated is obtained. The display unit 27 has a function of outputting a contour map, a bird's-eye view, an overlay wafer map, and the like in order to confirm the validity of the obtained information. On the other hand, the obtained information is stored in the storage unit 28.

Next, the machine commonality tool 3 is provided with a specific process specifying means and / or a specific device specifying means. In the machine commonality tool 3, based on the data stored in the storage unit 28, which manufacturing process and / or which manufacturing apparatus manufactured the lot number and wafer number of the unique pattern, a large amount of data ( (Product vs. manufacturing equipment) and specify the relevant manufacturing process and / or manufacturing equipment.

FIG. 6 is an explanatory view of the unique process specifying means according to the semiconductor analyzer of the present invention.

In the peculiar pattern specifying step, first, in the peculiar pattern specifying procedure, information such as a lot number and a wafer number obtained by the storage means 28 or the pattern search means 26 in the pattern automatic extracting means 2 is input or specified. Next, in the lot rearrangement procedure, the lot is rearranged in the order of processing for each process (for each device), and it is analyzed in which process (device) many unique patterns appear. Here, steps A to D
In each case, the appearance of a unique pattern is indicated by a black circle. Finally, in the process specifying procedure, a process in which a wafer having a unique pattern is manufactured is specified based on the analysis data of the lot rearranging procedure. Here, it is specified that the process C is a cause of manufacturing the wafer having the unique pattern.

FIG. 7 is an explanatory view of a unique device specifying means according to the semiconductor analyzer of the present invention.

In the unique pattern specifying procedure, as in FIG. 6, in the unique pattern specifying means, information such as the lot number / wafer number and the corresponding period obtained by the storage means 28 or the pattern search means 26 in the automatic pattern extracting means 2 is used. Is input or specified. Next, in the lot classification procedure, it is analyzed on which apparatus a large number of unique patterns appear. Here, the appearance of a unique pattern is indicated by a black circle for each of the devices A to D. Finally, in the device specifying procedure, the manufacturing apparatus that has manufactured the wafer having the unique pattern is specified based on the analysis data of the lot classification procedure. Here, it is specified that the cause is that the device C manufactured the wafer having the unique pattern.

[0029]

According to the present invention, the analysis time can be reduced by automatically recognizing a unique pattern and automatically extracting a lot and a wafer number. Further, according to the present invention, it is possible to early find a unique process / single device that causes an abnormality / defective or a non-defective product due to a previous process, recover the yield early, and reduce a manufacturing loss.

[Brief description of the drawings]

FIG. 1 is a functional configuration diagram according to a semiconductor analyzer of the present invention.

FIG. 2 is a function-related diagram according to the semiconductor analyzer of the present invention.

FIG. 3 is an explanatory diagram of a method for automatically detecting a unique pattern.

FIG. 4 is a unique pattern diagram of a wafer map.

FIG. 5 is an explanatory diagram of a unique pattern designation item.

FIG. 6 is an explanatory diagram of a unique process specifying method according to the semiconductor analyzer of the present invention.

FIG. 7 is an explanatory diagram of a unique device specifying method according to the semiconductor analyzer of the present invention.

[Explanation of symbols]

 21 search condition specifying means 22 map data stacking means 23 feature extracting means 24 checking means 25 pattern specifying interface 26 pattern searching means 27 display means 28 storage means

Claims (8)

[Claims] A search condition designating means for designating a search condition for searching for a desired unique pattern; analyzing a pattern of a plurality of analyzed wafers according to the search condition designated by the search condition designating means; A semiconductor analyzer comprising: a stacking unit that collects the analysis result; and a feature extraction unit that obtains a unique pattern by extracting a feature based on the analysis result stacked by the stacking unit. 2. The search condition includes: all bit non-defective products, redundancy non-defective products, DC defective products, function defective products,
2. The semiconductor analysis apparatus according to claim 1, wherein the semiconductor analysis apparatus includes one or more of each category of defective margin products. 3. The feature extracting means, wherein the stacking means obtains a long-term pattern obtained by stacking long-term analysis results for each category and a short-term pattern obtained by stacking short-term analysis results for each category. 3. The semiconductor analysis apparatus according to claim 1, wherein the unique pattern is obtained by calculating a difference between the long-term pattern and the short-term pattern obtained by the stacking unit. 4. The semiconductor analysis apparatus according to claim 1, further comprising a confirmation unit for confirming the unique pattern obtained by the feature extraction unit from a contour line or a bird's-eye view. 5. A pattern designating interface for designating a pattern condition by the unique pattern obtained by the feature extracting means, and a similarity or a match between the pattern condition designated by the pattern designating interface and the wafer to be analyzed is retrieved. 5. The semiconductor analyzer according to claim 1, further comprising: a pattern search unit for obtaining a corresponding wafer number and / or lot number. 6. The semiconductor analyzer according to claim 5, wherein said pattern designation interface further designates said pattern condition by said search condition designation means. 7. The semiconductor analysis according to claim 5, further comprising display means for displaying a pattern relating to a predetermined category with respect to the wafer number and / or lot number obtained by said pattern search means. apparatus. 8. A means for specifying a manufacturing process and / or a manufacturing apparatus for manufacturing a wafer having a unique pattern based on a wafer number and / or a lot number corresponding to the unique pattern obtained by the pattern search means. The semiconductor analyzer according to claim 1, further comprising: