JPH1027924A - Nitride-group-iii element compound light emitting element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a light emitting diode of compound of nitride and group-III element which has as improved luminous brightness and a long operating life. SOLUTION: Sequentially formed on a sapphire substrate 1 are a buffer layer 2 of AlN of 500Å thick, an n<+> layer 3 of silicon-doped GaN having a film thickness of about 2.2μm and high electron carrier concentration of 2×10<18> /cm<3> , layer 4 for non-doped GaN having a film thickness of about 1.5μm and a low electron carrier concentration of 1×10<16> /cm<3> , a player 51 of Mg-doped GaN having a film thickness of about 0.5μm and a low positive-hole carrier concentration of 1×10<16> /cm<3> , and a p<+> layer 52 having a film thickness of about 0.2μm and high positive-hole carrier concentration of 2×10<17> /cm<3> . Nickel electrodes 7 and 8 are formed for the high-carrier concentration p<+> layer 52 and high-carrier concentration n<+> layer 3. With such a stricture, a driving voltage can be reduced and a luminous brightness can be improved.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a blue-emitting nitrogen-group III compound semiconductor light emitting device.

[0002]

2. Description of the Related Art Conventionally, a blue light emitting diode using a GaN-based compound semiconductor has been known. The GaN
Attention has been paid to the fact that system compound semiconductors are of direct transition type and thus have high luminous efficiency, and that blue, one of the three primary colors of light, is used as the luminescent color.

Recently, GaN light emitting diodes have
It became clear that p-type GaN can be obtained by adding Mg and irradiating an electron beam. As a result, a pn junction is provided instead of the conventional junction between the n-layer and the semi-insulating layer (i-layer).
GaN light emitting diodes have been proposed. The electrode of this light emitting diode has an n-layer of aluminum (Al) and a p-layer of gold (A
u).

[0004]

However, even with the above-mentioned light emitting diode having a pn junction, the light emission luminance is not yet sufficient, and the driving voltage is high. Accordingly, an object of the present invention is to provide a nitrogen-group III element compound semiconductor (Al _x Ga _Y In _1-XY
N; X = 0, Y = 0, and X = Y = 0) The purpose is to improve the light emission luminance of the light emitting diode and to lower the driving voltage.

[0005]

A first feature of the present invention is as follows.
n-type nitrogen-group III element compound semiconductor (Al _x Ga _Y In _1-XY N; X =
0, Y = 0, X = Y = 0) and p-type nitrogen-3
And a p-layer made of a group III element compound semiconductor (Al _x Ga _Y In _1-XY N; including X = 0, Y = 0, X = Y = 0). The layers are formed, in order from the side joined to the n layer, with a low carrier concentration p layer and a thickness of 0.1 to 0.5 μm.
And a double structure with a high carrier concentration p ⁺ layer.

A second feature is that, in the same structure, the p-layer and the n-layer are joined in order from the low carrier concentration p-layer and the high carrier concentration having a hole concentration of 1 × 10 ¹⁶ / cm ³ or more. It has a double structure with ap ⁺ layer.

The third feature is that the thickness of the high carrier concentration p ⁺ layer is 0.1 to 0.5 μm, and the fourth feature is that the n layer
The double structure of a low carrier concentration n layer having a low electron concentration and a high carrier concentration n ⁺ layer having a high electron concentration in order from the side joined to the p layer. The fifth characteristic is that the n layer having a low carrier concentration has impurities. That is, it is a layer with no addition.

A sixth characteristic is that the low carrier concentration p
The seventh characteristic is that the hole concentration of the p-layer having a low carrier concentration is 1 × 10 ¹⁴ to 1 × 10 ¹⁶ / c.
It is that it has the m ^3.

[0009]

According to the present invention, the p-layer is formed such that a low carrier concentration p-layer and a p-layer having a thickness of 0.1 to
With the double structure of the p ⁺ layer having a high carrier concentration of 0.5 μm, the driving voltage is reduced and the injection current can be increased, so that the light emission luminance is improved.

[0010] Also, the p layer is sequentially joined from the side joined to the n layer.
By having a double structure of a low carrier concentration p layer and a high carrier concentration p ⁺ layer having a hole concentration of 1 × 10 ¹⁶ / cm ³ or more,
Since good ohmic characteristics can be obtained, the driving voltage can be reduced, and the injection current can be increased, the light emission luminance is improved.

Further, as a result of the double structure of the n layer having a low carrier concentration n layer and a high carrier concentration n ⁺ layer, the electron injection efficiency is improved and the light emission luminance is improved. Furthermore, low carrier concentration n
Crystallinity is improved by making the layer an impurity-free layer,
In addition, the electron concentration can be reduced. As a result, electrons and holes were injected into this layer, and in this layer, light emission was enabled by recombination of electrons and holes, so that light emission luminance was improved.

[0012]

【Example】

[First Embodiment] In FIG.
A sapphire substrate 1 is provided.
An AlN buffer layer 2 of 500 mm is formed on the substrate. Of On the buffer layer 2, in turn, a film thickness of about 2.2 [mu] m, the electron concentration of 2 × 10 ¹⁸ / cm high carrier concentration comprising a silicon addition of GaN ³ n ⁺ layer 3, a thickness of about 1.5 [mu] m, the electron concentration of 1 × 10 ¹⁶ / cm ³
A low carrier concentration n-layer 4 made of undoped GaN is formed. Further, on the low carrier concentration n layer 4,
Magnesium with a film thickness of about 0.5 μm and a hole concentration of 1 × 10 ¹⁶ / cm ³
(Mg) Low carrier concentration p layer 51 made of doped GaN, film thickness about
0.2 μm, high carrier concentration p ^{+ with} hole concentration 2 × 10 ¹⁷ / cm ³
A layer 52 has been formed. And a high carrier concentration p ⁺
An electrode 7 made of nickel connected to the layer 52 and an electrode 8 made of nickel connected to the high carrier concentration n ⁺ layer 3 are formed. The electrode 8 and the electrode 7 are electrically insulated and separated by the groove 9.

Next, a method for manufacturing the light emitting diode 10 having this structure will be described. The light emitting diode 10 includes:
It was manufactured by vapor phase growth by the organic metal group vapor phase epitaxy method (hereinafter referred to as “M0VPE”). The gas used was NH
₃ and the carrier gas H ₂ and trimethylgallium (Ga (CH _{3) 3)}
(Hereinafter referred to as "TMG") and trimethylaluminum (Al
(CH ₃ ) ₃ ) (hereinafter referred to as “TMA”), silane (SiH ₄ ), and biscyclopentadienyl magnesium (Mg (C ₅ H ₅ ) ₂ ) (hereinafter referred to as “CP ₂ Mg”).

First, a single-crystal sapphire substrate 1 whose main surface is the a-plane cleaned by organic cleaning and heat treatment is mounted on a susceptor placed in a reaction chamber of an MOVPE apparatus. Next, while flowing H ₂ at normal pressure into the reaction chamber at a flow rate of 2 liter / min, the temperature was 1100
The sapphire substrate 1 was subjected to gas-phase etching at a temperature of ℃.

Next, by lowering the temperature to 400 ° C., and H ₂
20 liter / min, NH ₃ 10 liter / min, TMA 1.8 × 10 ^-5
Supplying at mol / min, an AlN buffer layer 2 was formed to a thickness of about 500 °. Next, the temperature of the sapphire substrate 1 was set to 1150
° C, H ₂ at 20 liter / min, NH ₃ at 10 liter / min,
TMG 1.7 × 10 ^-4 mol / min, supplying 30 minutes silane diluted with H ₂ to 0.86ppm a (SiH ₄₎ at a rate of 200 Milliliter / min, a film thickness of about 2.2 .mu.m, electron concentration 2 × 10 ¹⁸ / A high carrier concentration n ⁺ layer 3 made of GaN of cm ³ was formed.

Subsequently, the temperature of the sapphire substrate 1 is set to 1150 ° C.
, H ₂ at 20 liter / min, NH ₃ at 10 liter / min, TMG
At a rate of 1.7 × 10 ^-4 mol / min for 20 minutes,
A low carrier concentration n-layer 4 made of GaN having a thickness of 1.5 μm and an electron concentration of 1 × 10 ¹⁶ / cm ³ was formed.

Next, while maintaining the sapphire substrate 1 at 1150 ° C., H ₂ is 20 liter / min, NH ₃ is 10 liter / min, and TMG is
1.7 × 10 ⁻⁴ mol / min and CP ₂ Mg were supplied at a rate of 2 × 10 ⁻⁷ mol / min for 7 minutes to form a 0.5 μm-thick low carrier concentration p-layer 51 made of GaN. In this state, the low carrier concentration p layer 51 is still an insulator having a resistivity of 10 ⁸ Ωcm or more.

Next, while maintaining the sapphire substrate 1 at 1150 ° C., H ₂ is 20 liter / min, NH ₃ is 10 liter / min, and TMG is
Was supplied at a rate of 1.7 × 10 ⁻⁴ mol / min and CP ₂ Mg at a rate of 3 × 10 ⁻⁶ mol / min for 3 minutes to form a 0.2 μm thick GaN high carrier concentration p ⁺ layer 52. In this state, the high carrier concentration p ⁺ layer 52 is still an insulator having a resistivity of 10 ⁸ Ωcm or more.

Next, the above-mentioned high carrier concentration p ⁺ layer 52 and low carrier concentration p layer 5
1 was uniformly irradiated with an electron beam. The electron beam irradiation conditions were: acceleration voltage 10 KV, sample current 1 μA, beam moving speed 0.2 mm /
sec, the beam diameter is 60 μmφ, and the degree of vacuum is 2.1 × 10 ⁻⁵ Torr. By the irradiation of the electron beam, the low carrier concentration p layer 51 is formed.
Is a p-type semiconductor having a hole concentration of 1 × 10 ¹⁶ / cm ³ and a resistivity of 40 Ωcm, and the high carrier concentration p ⁺ layer 52 has a hole concentration of 2 × 10 ¹⁶ / cm ³ .
It became a p-type semiconductor having × 10 ¹⁷ / cm ³ and resistivity of 2Ωcm.
Thus, a wafer having a multilayer structure as shown in FIG. 2 was obtained.

FIGS. 3 to 7 described below are cross-sectional views showing only one device on the wafer. Actually, a wafer in which devices having the same structure are continuously formed is shown in FIG.
Processing is performed, and then the wafer is cut for each device.

As shown in FIG. 3, an SiO ₂ layer 11 is formed on the high carrier concentration p ⁺
It was formed in thickness. Next, a photoresist 12 was applied on the SiO ₂ layer 11. Then, by photolithography, on the high carrier concentration p ⁺ layer 52, the electrode formation site A corresponding to the hole 15 formed so as to reach the high carrier concentration n ⁺ layer 3 and the electrode formation portion are formed with the high carrier concentration p ⁺
The photoresist in the portion B where the groove 9 for insulating and separating from the electrode of the layer 52 was formed was removed.

Next, as shown in FIG. 4, the SiO ₂ layer 11 not covered with the photoresist 12 was removed with a hydrofluoric acid-based etchant. Next, as shown in FIG.
The upper surface of the high carrier concentration p ⁺ layer 52 at a portion not covered by the photoresist 12 and the SiO ₂ layer 11 and the lower carrier concentration p layer 51, the low carrier concentration n layer 4, and the high carrier concentration n ⁺ layer 3 The part was dry-etched by supplying a degree of vacuum of 0.04 Torr, high-frequency power of 0.44 W / cm ² , and BCl ₃ gas at a rate of 10 milliliter / min, and then dry-etching with Ar. In this step, a hole 15 for extracting an electrode from the high carrier concentration n ⁺ layer 3 and a groove 9 for insulating and separating were formed.

Next, as shown in FIG. 6, the SiO ₂ layer 11 remaining on the high carrier concentration p ⁺ layer 52 was removed with hydrofluoric acid. Next, as shown in FIG.
The nickel layer 13 was formed by vapor deposition. As a result, the nickel layer 13 electrically connected to the high carrier concentration n ⁺ layer 3 is formed in the hole 15. Then, a photoresist 14 is applied on the nickel layer 13, and a predetermined photolithography is performed so that the photoresist 14 has an electrode portion for the high carrier concentration n ⁺ layer 3 and the high carrier concentration p ⁺ layer 52. A pattern was formed into a shape.

Next, as shown in FIG. 7, the exposed portion of the lower nickel layer 13 was etched with a nitric acid-based etchant using the photoresist 14 as a mask. At this time, the nickel layer 13 deposited on the trench 9 for insulation isolation is completely removed. Next, the photoresist 14 was removed with acetone, and the electrode 8 of the high carrier concentration n ⁺ layer 3 and the electrode 7 of the high carrier concentration p ⁺ layer 52 were left. Thereafter, the wafer processed as described above was cut into individual devices to obtain a gallium nitride-based light emitting device having a pn structure shown in FIG.

The relationship between the voltage V applied to the light emitting diode 10 and the current I flowing was measured. FIG. 8 shows the result. For comparison, FIG. 9 shows the measurement results of the VI characteristics when the electrode was formed of aluminum. The driving threshold voltage dropped from 7V to 3V.

The light emission intensity of the light emitting diode 10 thus manufactured at a driving current of 20 mA was measured.
The emission luminance is 10 mcd, which is equivalent to that of the conventional pn junction GaN.
The luminance was twice as high as that of the light emitting diode. or,
Device lifetime was 10 ⁴ hours, was 1.5 times that of the device life of the GaN light emitting diodes of a conventional pn junction.

The magnesium (Mg) used in the above examples was used.
As the doping gas, methyl cyclopentadienyl magnesium Mg (C ₆ H ₇ ) ₂ may be used in addition to the above-mentioned gases.
Further, the above-mentioned p layer may be formed as a single layer as shown in FIG. In this case, the hole concentration of the p layer 5 is 1 × 10 ¹⁶ to 1
× 10 ¹⁹ / cm ³ . Alternatively, only the electrode 7 for the p layer 52 may be nickel, and the electrode 8 for the high carrier concentration n ⁺ layer 3 may be aluminum.

The hole concentration of the low carrier concentration p layer 51 is
The degree is 1 × 10¹⁴/cm^Three ~ 1 × 10¹⁶/cm ^Three And the film thickness is 0.2 to 1
μm is desirable. Hole concentration is 1 × 10¹⁴/cm^ThreeBecomes
And the series resistance becomes too high,
Concentration 1 × 10¹⁶/cm^ThreeAbove, the low carrier concentration n
Since the matching with the layer 4 becomes poor and the luminous efficiency decreases,
Not desirable. When the film thickness exceeds 1 μm, the series resistance
Is undesired because it becomes high.
This is not desirable because the light brightness is reduced.

Further, the hole concentration of the high carrier concentration p ⁺ layer 52 is desirably 1 × 10 ¹⁶ / cm ³ or more and the film thickness is desirably 0.1 to 0.5 μm. If the hole concentration is less than 1 × 10 ¹⁶ / cm ³ , the series resistance increases, which is not desirable. The film thickness is 0.5 μ
When the thickness is more than m, the series resistance increases, which is not desirable. When the thickness is less than 0.1 μm, the hole injection efficiency decreases, which is not desirable.

Second Embodiment Referring to FIG. 11, the light emitting diode 10 has a sapphire substrate 1, and the sapphire substrate 1
An N 2 buffer layer 2 is formed. The buffer layer 2
On the top, in order, the film thickness is about 2.2 μm, and the electron concentration is 2 × 10 ¹⁸ / c
High carrier concentration n ⁺ layer 3 composed of m ³ silicon-doped GaN, film thickness of about 1.5 μm, electron concentration of 1 × 10 ¹⁶ / cm ³ non-doped Ga
A low carrier concentration n layer 4 made of N 2 is formed. Further, on the low carrier concentration n-layer 4, a film thickness of about 0.2
μm, low impurity concentration i-layer 61 composed of Mg-doped GaN having a Mg concentration of 1 × 10 ¹⁹ / cm ³ , a film thickness of about 0.5 μm, and a Mg concentration of 2 × 10 ²⁰ / cm ³
High impurity concentration i ⁺ layer 62 is formed.

The low-impurity-concentration i-layer 61 and the high-impurity-concentration i.sup. ⁺ Layer 62 are respectively provided in predetermined regions with a low carrier concentration of 1 × 10 ¹⁶ / cm ³ having a hole concentration of 1 × 10 ¹⁶ / cm ³ by irradiation with electron beams. concentration p layer 501, a high carrier concentration p ⁺ layer 502 of the hole concentration 4 × 10 ¹⁷ / cm ³ is formed.

[0032] Further, from the upper surface of the high impurity concentration i ⁺ layer 62, the high impurity concentration i ⁺ layer 62, low impurity concentration i layer 61,
A hole 15 penetrating through the low carrier concentration n layer 4 and reaching the high carrier concentration n ⁺ layer 3 is formed. An electrode 81 made of nickel joined to the high carrier concentration n ⁺ layer 3 through the hole 15 is formed on the high impurity concentration i ⁺ layer 62. Further, on the upper surface of the high carrier concentration p ⁺ layer 502, the electrode 71 formed of nickel for high carrier concentration p ⁺ layer 502 is formed. High carrier concentration n ⁺ layer 3
Is separated from the high carrier concentration p ⁺ layer 502 and the low carrier concentration p layer 501 by the high impurity concentration i ⁺ layer 62 and the low impurity concentration i layer 61.

Next, a method of manufacturing the light emitting diode 10 having this structure will be described. 12 to 17 showing the manufacturing steps are cross-sectional views of only one element in the wafer, and the following manufacturing process is actually performed on a wafer on which the elements shown in the figure are repeatedly formed. Then, finally, the wafer is cut to form each light emitting element.

The wafer shown in FIG. 12 is manufactured in the same manner as in the first embodiment. Next, as shown in FIG. 13, the SiO ₂ layer 1 is formed on the high impurity concentration i ⁺ layer 62 by sputtering.
1 was formed to a thickness of 2000 mm. Next, a photoresist 12 was applied on the SiO ₂ layer 11. Then, the photoresist at the electrode formation site A corresponding to the hole 15 formed to reach the low carrier concentration n layer 4 in the high impurity concentration i ⁺ layer 62 was removed by photolithography.

Next, as shown in FIG. 14, the SiO ₂ layer 11 not covered with the photoresist 12 was removed with a hydrofluoric acid-based etchant. Next, as shown in FIG. 15, the photoresist 12 and the SiO ₂ layer 11 a high impurity concentration of a portion not covered by the i ⁺ layer 62 and the low carrier concentration n layer 4 and the low impurity concentration i layer 61 thereunder A part of the upper surface of the high carrier concentration n ⁺ layer 3 was dry-etched by supplying a degree of vacuum of 0.04 Torr, high-frequency power of 0.44 W / cm ² , and BCl ₃ gas at a rate of 10 milliliter / minute, and then dry-etching with Ar. In this step, a hole 15 for extracting an electrode from the high carrier concentration n ⁺ layer 3 was formed. Next, as shown in FIG. 16, the SiO ₂ remaining on the high impurity concentration i ⁺ layer 62
Layer 11 was removed with hydrofluoric acid.

Next, as shown in FIG. 17, only predetermined regions of the high impurity concentration i.sup. ⁺ Layer 62 and the low impurity concentration i layer 61 are irradiated with an electron beam using a reflection electron beam diffraction device. A high carrier concentration p ⁺ layer 502 having a hole concentration of 4 × 10 ¹⁷ / cm ³ and a low carrier concentration p layer 501 having a hole concentration of 1 × 10 ¹⁶ / cm ³ , which exhibit p conductivity, were formed.

The irradiation conditions of the electron beam were as follows: acceleration voltage 10 KV, sample current 1 μA, beam moving speed 0.2 mm / sec, beam diameter 60
μmφ, vacuum degree 2.1 × 10 ⁻⁵ Torr. At this time, portions other than the high carrier concentration p ⁺ layer 502 and the low carrier concentration p layer 501, that is, the portions not irradiated with the electron beam, are the high impurity concentration i ⁺ layer 62 and the low impurity concentration i layer 6 of the insulator.
It remains at 1. Therefore, the high carrier concentration p ⁺ layer 502
And the low carrier concentration p-layer 501 is:
Conduction is made to the low carrier concentration n layer 4, but in the lateral direction, the high impurity concentration i ⁺ layer 62 and the low impurity concentration i
It is electrically insulated and separated by the layer 61.

Next, as shown in FIG. 18, a high carrier concentration p ⁺ layer 502, a high impurity concentration i ⁺ layer 62, and a high carrier concentration n ^{+ The} nickel layer 20 was formed on the ⁺ layer 3 by vapor deposition. Then, a photoresist 21 is applied on the nickel layer 20, and a predetermined photolithography is performed so that the photoresist 21 has an electrode portion for the high carrier concentration n ⁺ layer 3 and the high carrier concentration p ⁺ layer 502. A pattern was formed into a shape. Next, the photoresist 21
The exposed portion of the lower nickel layer 20 was etched with a nitric acid-based etchant using the mask as a mask, and the photoresist 21 was removed with acetone. Thus, as shown in FIG. 11, the electrode 81 of the high carrier concentration n ⁺ layer 3 and the electrode 71 of the high carrier concentration p ⁺ layer 502 were formed. Thereafter, the wafer formed as described above was cut for each element.

When the VI characteristics of the light emitting diode 10 manufactured as described above were measured, the characteristics similar to those of FIG. 8 were obtained. The driving voltage was 3V. When the luminescence intensity was measured, it was 10 mcd, as in the first embodiment.
Element lifetime was 10 ⁴ hours.

Third Embodiment In the light emitting diode of the first embodiment having the structure shown in FIG. 1, a high carrier concentration n ⁺ layer 3, a low carrier concentration n layer 4,
Low carrier concentration p layer 51, high carrier concentration p ⁺ layer 52
Was set to Al _0.2 Ga _0.5 In _0.3 N, respectively. The high carrier concentration n ⁺ layer 3 has an electron concentration of 2 × 10 ¹⁸ / c
m ³ , and the low carrier concentration n-layer 4 was formed at an electron concentration of 1 × 10 ¹⁶ / cm ³ without adding impurities. Low carrier concentration p layer 5
No. 1 is formed by adding magnesium (Mg) and irradiating an electron beam to form a hole concentration of 1 × 10 ¹⁶ / cm ³ , and a high carrier concentration p ⁺ layer 52.
Was added to magnesium (Mg) and irradiated with an electron beam to form a hole concentration of 2 × 10 ¹⁷ / cm ³ . The electrode 7 made of nickel connected to the high carrier concentration p ⁺ layer 52
And an electrode 8 made of nickel and connected to the high carrier concentration n ⁺ layer 3.

Next, the light emitting diode 10 having this structure can be manufactured similarly to the light emitting diode of the first embodiment. Trimethylindium (In (CH ₃ ) ₃ ) was used in addition to TMG, TMA, silane, and CP ₂ Mg gas. The generation temperature and gas flow rate are the same as in the first embodiment. The flow rates of the other gases are the same as in the first embodiment, except that trimethylindium is supplied at 1.7 × 10 ⁻⁴ mol / min.

Next, similarly to the first embodiment, the high carrier concentration p ⁺ layer 52 and the low carrier concentration p layer 51 are uniformly irradiated with an electron beam using a reflection electron beam diffraction apparatus. A p-type semiconductor was obtained.

Next, similarly to the first embodiment, the electrodes 7 and 8 made of nickel for the high carrier concentration n ⁺ layer 3 and the high carrier concentration p ⁺ layer 52 were formed.

The relationship between the voltage V applied to the light emitting diode 10 and the flowing current I was measured. As compared with the case where the electrodes were formed of aluminum, the drive threshold voltage was reduced from 7 V to 3 V, as in the first embodiment.

[Brief description of the drawings]

FIG. 1 is a configuration diagram showing a configuration of a light emitting diode according to a first specific example of the present invention.

FIG. 2 is a sectional view showing a manufacturing process of the light-emitting diode of the embodiment.

FIG. 3 is a sectional view showing a manufacturing step of the light-emitting diode of the embodiment.

FIG. 4 is a sectional view showing a manufacturing step of the light-emitting diode of the same embodiment.

FIG. 5 is a sectional view showing the manufacturing process of the light emitting diode of the same embodiment.

FIG. 6 is a sectional view showing the manufacturing process of the light-emitting diode of the example.

FIG. 7 is a sectional view showing the manufacturing process of the light emitting diode of the same embodiment.

FIG. 8 is a measurement diagram of a voltage-current characteristic of the light emitting diode of the same example.

FIG. 9 is a measurement diagram of voltage-current characteristics of a light-emitting diode using a conventional aluminum electrode.

FIG. 10 is a configuration diagram showing a configuration of a light emitting diode according to a modification of the first embodiment.

FIG. 11 is a configuration diagram showing a configuration of a light emitting diode according to a second specific example of the present invention.

FIG. 12 is a sectional view showing the manufacturing process of the light-emitting diode of the example.

FIG. 13 is a sectional view showing the manufacturing process of the light-emitting diode of the example.

FIG. 14 is a sectional view showing a manufacturing step of the light-emitting diode of the example.

FIG. 15 is a sectional view showing the manufacturing process of the light-emitting diode of the example.

FIG. 16 is a sectional view showing a manufacturing step of the light-emitting diode of the example.

FIG. 17 is a sectional view showing the manufacturing process of the light-emitting diode of the example.

FIG. 18 is a sectional view showing the manufacturing process of the light-emitting diode of the example.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 10 ... Light-emitting diode 1 ... Sapphire substrate 2 ... Buffer layer 3 ... High carrier concentration n ⁺ layer 4 ... Low carrier concentration n layer 51,501 ... Low carrier concentration p layer 52,502 ... High carrier concentration p ⁺ layer 61 ... Low impurity Concentration i layer 62: High impurity concentration i ⁺ layer 7, 8, 71, 81 ... Electrode 9: Groove

Continued on the front page. (72) Inventor Katsuhide Shinbe 1 Ochiai Nagahata, Kasuga-cho, Nishi-Kasugai-gun, Aichi Prefecture Inside Toyoda Gosei. Inside (72) Inventor Kuki Kato 1 Ochiai Nagahata, Kasuga-machi, Nishi-Kasugai-gun, Aichi Prefecture Inside Toyoda Gosei Co., Ltd. (72) Inventor Isamu Akasaki 1-38-805, Joshin 1-chome, Nishi-ku, Nagoya-shi, Aichi

Claims (7)

[Claims] 1. An n-type nitrogen-group III element compound semiconductor (Al _x
Ga _Y In _1-XY N; X = 0, Y = 0, and X = Y = 0).
p-type nitrogen-group III element compound semiconductor (Al _x Ga _Y In _1-XY N; X =
0, Y = 0, X = Y = 0).
In the group-element compound semiconductor light emitting device, the p layer is formed of a low carrier concentration p layer and a high carrier concentration p ⁺ layer having a thickness of 0.1 to 0.5 μm in order from the side joined to the n layer. Nitrogen-3 characterized by having a structure
Group element compound semiconductor light emitting device. 2. An n-type nitrogen-group III element compound semiconductor (Al _x
Ga _Y In _1-XY N; X = 0, Y = 0, and X = Y = 0).
p-type nitrogen-group III element compound semiconductor (Al _x Ga _Y In _1-XY N; X =
0, Y = 0, X = Y = 0)
In the group-element compound semiconductor light emitting device, the p layer is formed of a low carrier concentration p layer and a high carrier concentration p ⁺ layer having a hole concentration of 1 × 10 ¹⁶ / cm ³ or more in order from the side joined to the n layer. A nitrogen-group III element compound semiconductor light-emitting device having a double structure. 3. The high carrier concentration p ⁺ layer has a thickness of 0.1
The nitrogen-group III element compound semiconductor light-emitting device according to claim 2, wherein the thickness is from 0.5 to 0.5 m. 4. The n layer has a double structure of a low carrier concentration n layer having a low electron concentration and a high carrier concentration n ⁺ layer having a high electron concentration in order from the side joined to the p layer. The nitrogen-group III element compound semiconductor light-emitting device according to any one of claims 1 to 3, wherein 5. The nitrogen-containing layer according to claim 4, wherein the low carrier concentration n layer is a layer to which no impurity is added.
Group 3 element compound semiconductor light emitting device. 6. The low carrier concentration p layer has a thickness of 0.2 to 0.2.
6. The method according to claim 1, wherein the thickness is 1.0 μm.
The nitrogen-group III element compound semiconductor light-emitting device according to any one of the above. 7. The low carrier concentration p layer has a hole concentration of
1 × 10¹⁴~ 1 × 10 ¹⁶/cm^ThreeA contract characterized by being
The nitrogen-3 group according to any one of claims 1 to 6.
Element compound semiconductor light emitting device.