JPH10256309A - Method for mounting semiconductor element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method by which a semiconductor element can be mounted on a circuit board without using any flux. SOLUTION: A method for mounting semiconductor element includes a preheating process in which bumps 2 are formed on the electrode of a semiconductor element 1 and, at the same time, joining pads 6 are formed on the electrode of a circuit board 4 and the joints between the bumps 2 and pads 6 are heated to a prescribed temperature for a prescribed period of time, a tentatively joining process in which metal welding is performed by exciting the joints with ultrasonic waves while the joints are heated, a main joining process in which the joints are alloyed by performing metal diffusion between the pads 6 and bumps 2 by heating the joints to a prescribed temperature, and a sealing process in which a cap 7 is attached to a circuit board 4 for sealing a semiconductor element 1 bonded to the board 4.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of mounting a semiconductor device on a circuit board.

[0002]

2. Description of the Related Art Along with the miniaturization of semiconductor devices due to the progress of high integration, there is a demand for the mounting density of the mounting technology. Therefore, the semiconductor device before the resin molding is directly mounted on the substrate, and then the resin molding is performed. Mounting technology to be applied has been developed. As a technique for directly mounting this semiconductor element on a substrate, bumps are formed on electrodes on the semiconductor element by soldering or the like, and the electrodes formed on the substrate are directly connected to the bumps. A mounting technique for performing hermetic sealing is known.

FIGS. 9A and 9B show a conventional method of the above mounting technology. In FIG. 1A, a bump 31 is formed on an element electrode 32 of a semiconductor element 30. The bump 31 is formed by joining a solder ball 31a made of a high melting point solder to an element electrode 32 with a low melting point solder 31b. On the other hand, a low melting point solder paste 35 is applied to a substrate electrode 34 formed on the substrate 33. The bump 31 and the substrate electrode 34 are brought into contact with each other as shown in FIG. 3B and heated at a temperature at which the low-melting-point solder melts, so that the low-melting-point solder paste 35 is melted and the solder ball 31 is melted.
a and the substrate electrode 34 are connected to each other,
And the substrate electrode 34 are connected, and the substrate 3 of the semiconductor element 30 is
3 is implemented.

[0004]

However, in the above-mentioned prior art, since a flux is used for soldering, a flux cleaning step is indispensable. Since this washing step is a wet step, equipment such as treatment of a washing liquid is required, and there is a problem that mounting cost is increased. Also, there is a problem that it is difficult to determine whether or not the cleaning has been completed. If cleaning is insufficient, ions such as halogens contained in the flux may cause corrosion on the electrode. .

Further, at the time of electrical inspection of a semiconductor element, an inspection probe is brought into contact with a bump formed of a relatively soft material (in the above conventional example, the high melting point solder portion 31a corresponds thereto). There is a problem that probe contamination in which foreign metal adheres to the surface of the inspection probe occurs.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems of the conventional mounting technology, and enables a semiconductor element to be directly mounted on a substrate without using a flux.
An object of the present invention is to provide a mounting method and a mounting structure of a semiconductor element that do not cause probe contamination during inspection of the semiconductor element.

[0007]

According to a first aspect of the present invention, there is provided a semiconductor device having a bump formed on an element electrode for connection to a circuit board at a mounting position of the circuit board. After arranging and bonding the bump and the substrate electrode formed on the circuit board, the semiconductor element is subjected to a hermetic sealing process, and the semiconductor element is heated in a method for mounting a semiconductor element on a circuit board. A preheating step of saturating a bonding portion where the bump and the heated substrate electrode are in contact with each other to a predetermined temperature, and a temporary bonding in which heating and ultrasonic vibration are applied to the bonding portion to fuse the metal to the bonding portion Process and
A main bonding step of heating the bonding portion in a metal fusion state to a predetermined temperature to promote metal diffusion and bonding, and a sealing step of attaching a cap for hermetically sealing the semiconductor element bonded to the circuit board. And mounting the semiconductor element on the circuit board.

The preheating step in this mounting method has the function of facilitating metal fusion in the next temporary bonding step. The temporary bonding step involves heating and ultrasonic vibration to cause metal fusion at the joint. It acts to temporarily join the joints.
By heating in a state where the metal fusion is generated at the bonding portion, metal diffusion is promoted, and a main bonding step of bonding the bump and the substrate electrode is performed. Since the semiconductor element is attached to the circuit board by the above steps, the semiconductor element is completely sealed by sealing the semiconductor element with a cap. In this mounting method, no flux is used in the conventional method, so that equipment and cost for corrosion and flux cleaning can be reduced.

The heating temperature in the preheating step is 300 to 400 ° C. for the semiconductor element side and 150 to 400 ° C. for the circuit board side.
By setting the heating temperature to 250 ° C. and the heating time in the preheating step to 1 to 5 seconds, a thermal adverse effect on the semiconductor element is avoided, the generation of an oxide film is suppressed, and metal fusion in the next step becomes easy. The optimum heating temperature and heating time are obtained.

By setting the ultrasonic vibration output in the temporary bonding step to 30 to 80 mW per bump and setting the ultrasonic vibration time in the temporary bonding step to 10 to 100 msec, the adverse effect on the semiconductor element is reduced. The optimum vibration output and vibration time can be obtained for removing the oxide film at the junction and fusing the metal while avoiding the problem.

By performing the ultrasonic vibration in the temporary bonding step from the circuit board side, the adverse effect on the semiconductor element can be further reduced.

In the above-mentioned temporary joining step, the heating temperature of the joint is 300 to 400 ° C. for the semiconductor element side and 15 ° C. for the circuit board side.
By setting the temperature to 0 to 250 ° C., the optimum heating temperature is set to remove the oxide film at the junction and promote metal fusion while avoiding adverse effects on the semiconductor element.

The heating temperature in the main bonding step is set to 200
By setting the heating time in the main bonding step to 60 to 120 seconds, the adverse effect on the semiconductor element is avoided, and the optimum heating temperature and heating time for alloying and bonding the bonding portion are obtained. .

According to a second aspect of the present invention, there is provided a semiconductor device having a bump formed on an element electrode for connection to a circuit board at a mounting position of the circuit board. And a substrate electrode formed on the circuit board, and then performing a hermetic sealing process on the semiconductor element, and mounting the semiconductor element on the circuit board. Forming a bonding pad made of a predetermined metal material on the substrate electrode, and saturating a bonding portion where the heated bump and the heated bonding pad are in contact with each other to a predetermined temperature; and A temporary joining step of applying heat and ultrasonic vibration to the joined portion to fuse the joined portion with a metal, and heating the joined portion in a metal-fused state to a predetermined temperature and diffusing the metal. And the bonding step of bonding the engaging portion,
The semiconductor element is mounted on the circuit board by performing a sealing step of attaching a cap for hermetically sealing the semiconductor element bonded to the circuit board in each of the steps.

In this mounting method, the structure of the bump is not formed of a relatively soft material as in the conventional structure. Therefore, even if the inspection probe is brought into contact with the semiconductor element during the electrical inspection, no probe contamination occurs. In addition, since the bonding pad is formed on the substrate electrode, bonding when the above mounting method is used is easily performed.

The above-mentioned bump is formed by providing a Ti layer on the device electrode, forming a Ni layer on the Ti layer, and forming an Au layer on the entire exposed surface. Prevents formation of an intermetallic compound with the Ni layer. In addition, the Ni layer contributes to forming the bump height to a required height and secures thermal reliability. Also,
The Au layer ensures reliability against pump corrosion.

The thickness of the Ti layer for forming the bumps is set to 0.
When the thickness of the Ni layer is 1 to 0.5 μm, the thickness of the Ni layer is 5 to 15 μm, and the thickness of the Au layer is 1 to 3 μm, it is possible to prevent an increase in cost and to prevent generation of an intermetallic compound by the Ti layer.
An optimal configuration can be obtained to ensure a buffer effect from thermal shock by the layer and reliability against corrosion by the Au layer.

The above bonding pad is formed on a substrate electrode by Sn, P
When formed of any one or more kinds of metals, b, Ag, Bi, In, and Sb, these are materials that melt at a temperature lower than the temperature at which diffusion into the semiconductor material occurs, so that the characteristics of the semiconductor element change. Can be prevented.

By forming an elution preventing wall around the bonding pad for preventing the elution of the bonding pad, elution of the bonding metal to an unnecessary portion can be prevented and the bonding state can be stabilized.

By forming the elution preventing wall at a height of 2 to 5 μm, elution of the bonding metal can be prevented, and an optimum state in which the bonding between the bump and the bonding pad is not hindered can be obtained.

By forming the elution preventing wall from an insulating material having poor wettability with the molten metal in which the bonding pad is melted, the eluting bonding metal does not adhere to the elution preventing wall, thereby facilitating elution prevention.

The cap is formed of an insulating material, a conductor layer is formed on the inner surface or outer surface thereof, and the conductor layer is connected to a ground potential portion on the circuit board, thereby hermetically sealing the semiconductor element to prevent moisture absorption. The effect of the electrostatic shield can be imparted to the cap that ensures reliability.

By forming the cap from a metal material and connecting the cap to a ground potential portion on the circuit board,
An effect of an electrostatic shield can be imparted to a cap that hermetically seals a semiconductor element and ensures reliability against moisture absorption.

By forming the fin-like irregularities on the surface of the cap, the surface area of the cap for ensuring the reliability against moisture absorption by hermetically sealing the semiconductor element increases, and the semiconductor element is operated during operation. External heat dissipation of the generated heat can be facilitated.

[0025]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the accompanying drawings to provide an understanding of the present invention.
The following embodiments are examples embodying the present invention and do not limit the technical scope of the present invention.

FIGS. 1A to 1D show a method of mounting the semiconductor element 1 on the circuit board 4 in order. In FIG. 1A, bumps 2 are formed on electrodes (not shown) of the semiconductor element 1, and bonding pads 6 are formed on substrate electrodes 5 of the circuit board 4. Semiconductor device 1 is shown in FIG.
As shown in (a), a mounting jig 3 such as a vacuum suction nozzle
The bump 2 is moved to a mounting position on the circuit board 4 fixed at a predetermined position by a substrate fixing stage (not shown), and the bump 2 and the bonding pad 6 are brought into contact with each other.

The mounting jig 3 is heated to a predetermined temperature, and the circuit board 4 is also heated to a predetermined temperature. In this preheating step, the heating temperature from the mounting jig 3 side is set to 300 to
400 ° C., the heating temperature from the circuit board 4 side is 150 to 25
By setting the heating time at 0 ° C. to 1 to 5 seconds, the junction where the bump 2 and the bonding pad 6 are in contact with each other is saturated to a predetermined temperature. Heating at a temperature higher than the above-mentioned heating temperature and heating time not only increases the thickness of the oxide film on the bonding pad 6, but also adversely affects the electrical characteristics of the semiconductor element 1, resulting in wasteful mounting time.

Next, while maintaining the above-mentioned heating temperature and heating time, a temporary bonding step of temporarily bonding the bonding portion between the bump 2 and the bonding pad 6 by applying ultrasonic vibration is performed. In this temporary joining step, as shown in FIG. 1B, ultrasonic vibration is applied from the mounting jig 3 side. The heating temperature during the temporary bonding is 300 to 400 ° C. on the mounting jig 3 side, and 1 on the fixed stage side of the substrate 4.
An appropriate temperature is 50 to 250 ° C., and a temporary bonding cannot be performed at a temperature lower than the above temperature. On the other hand, at a high temperature, the electrical characteristics of the semiconductor element 1 may be changed, or the oxidation on the bonding pad 6 may be changed. The film becomes thick and temporary bonding becomes impossible. The output of ultrasonic vibration is 30 per bump.
If the output is lower than 80 mW, temporary junction is impossible, and if the output is higher, the semiconductor element 1 is damaged. Further, the output time of the ultrasonic wave is 10 to 100 msec. If the output time is shorter than this, the temporary bonding is not performed, and if the output time is longer, the semiconductor element 1 is damaged.

This ultrasonic vibration removes an oxide film on the bonding pad 6 and facilitates metal fusion between the bump 2 and the bonding pad 6, and this state is shown in an enlarged scale in FIG. As described above, the bump 2 and the bonding pad 6 come into contact with each other, and the heating and the ultrasonic vibration have an effect of progressing from metal contact to metal fusion.

The ultrasonic vibration may be performed from the circuit board 4 side, and the vibration to the semiconductor element 1 is reduced.
An adverse effect on the semiconductor element 1 due to ultrasonic waves can be reduced.

After the temporary joining step, as shown in FIG. 1C, the heating temperature is 200 to 400 ° C., and the heating time is 60 to 12 hours.
By heating for 0 seconds, alloying between the bumps 2 and the bonding pads 6 in the metal fusion state occurs due to metal diffusion at the bonding portions, and the main bonding with high reliability is performed. The heating temperature in this main bonding step is 200 ° C.
In the following, the alloying is not performed, and at 400 ° C. or more, there is an adverse effect of changing the electrical characteristics of the semiconductor element 1. The heating time is 60 to 120 seconds. If the heating time is shorter than this, the alloying becomes insufficient, and if the heating time is longer, the mounting time becomes too long. Therefore, the heating time is optimal. By this heating, as shown in FIG. 2 (b), metal diffusion from the bumps 2 closely contacted by the temporary bonding step to the bonding pads 6 occurs, and alloying between the two is promoted, and highly reliable bonding is performed.

After the above-mentioned joining process is completed, FIG.
As shown in (1), a cap 7 covering the semiconductor element 1 is attached to improve the sealing performance of the semiconductor element 1 mounted on the circuit board 4 to improve the reliability against moisture absorption.

Next, a mounting structure for implementing the above mounting method will be described.

FIG. 3 shows bumps 2 formed on semiconductor element 1.
2 is a cross-sectional view showing the structure of FIG. 1. A Ti layer 9 is formed on an element electrode 8 provided on the semiconductor element 1, and an N
An Au layer 12 is formed so as to cover the surface of the i-layer 11 and the Ni layer 11, thereby forming a pump 2. The Ti layer 9
Has a function of preventing generation of a metal compound between the device electrode 8 and the Ni layer 11, and the Ni layer 11 has a function of obtaining a mounting height required at the time of mounting and improving a reliability against thermal shock, The Au layer 12 functions to prevent the Ni layer 11 from being oxidized and corroded.

The thickness of the Ti layer 9 is 0.1 to 0.5 μm.
The thickness of the m and Ni layer 11 is suitably 5 to 15 μm, and the thickness of the Au layer 12 is suitably 1 to 3 μm. When the thickness of the Ti layer 9 is made smaller than 0.1 μm, a metal compound is generated from the vacancies in the Ti layer 9. Further, by setting the Ni layer 11 to 5 μm or more, a buffering effect against thermal shock can be obtained. Furthermore, if the Au layer 12 is 1 μm or more, reliability against corrosion can be ensured. Although the thicknesses of these layers may be increased, the cost increases in any case, so the above-mentioned thickness ranges of the respective layers are optimal.

FIG. 4 is a cross-sectional view of the substrate electrode 5 formed on the circuit board 4. A bonding pad 6 for bonding the pump 2 and the substrate electrode 5 is formed on the substrate electrode 5.
The bonding pad 6 is formed of one of Sn / Pb, Sn, and Sn / Ag metal materials. These metal materials are melted at the heating temperature when the above-described mounting method is performed, and the substrate electrode 5 and the bump 2 are joined. Since the metal material forming the bonding pad 6 is melted at a temperature lower than the temperature at which diffusion into the semiconductor material occurs, the electrical characteristics of the semiconductor element 1 do not change during mounting.

FIG. 5 is a cross-sectional view of the circuit board 4 on which the bonding pads 6 are formed, and shows an effective structure for implementing the above mounting method. As described above, the bonding pad 6
As shown in the figure, an elution preventing wall 13 is formed around a bonding pad 6 formed on the substrate electrode 5 so as to prevent the molten metal from flowing out of an unnecessary place when the metal is melted. I have. The elution preventing wall 13 is made of an insulating material such as a polymer material, glass, or ceramic, and has a height of 2 to 5 μm.
Formed in the range. The insulating material has poor wettability with the molten metal in which the bonding pad 6 is melted, effectively acts to prevent elution, and facilitates formation of a fillet for bonding the bump 2 and the bonding pad 6.

Next, the structure of the cap 7 for hermetically sealing the semiconductor element 1 after the semiconductor element 1 is bonded on the circuit board 4 will be described.

Conventionally, a resin mold is often used to hermetically seal the semiconductor element. In this embodiment, however, the semiconductor element 1 is hermetically sealed using the cap 7 that covers the semiconductor element 1, and the reliability against moisture absorption and the like is improved. Has secured. According to this configuration, the stray capacitance between the electrodes is less generated by the resin mold, and the circuit operation can be stabilized. The material for forming the cap 7 is resin, ceramic, glass,
Any of the metals can be employed.

FIG. 6 is a sectional view showing an embodiment of the cap 7, in which a conductor layer 15 is formed on the inner surface of a cap body 7a made of an insulating material. By connecting this conductor layer 15 to a ground potential portion on the circuit board 4 as shown in FIG. 7, the cap 7 also has an effect of electrostatic shielding. Even when the conductive layer 15 is formed on the outer surface of the cap body 7a, the same function and effect can be exerted. When the cap 7 is formed of a metal material, the formation of the conductive layer 15 is unnecessary, and the same operation and effect can be obtained by connecting the cap 7 to ground.

FIG. 8 is a sectional view showing another embodiment of the cap 7, in which fin-shaped irregularities 17 are formed on the surface of the cap 7. FIG. With such a shape, the surface area of the cap 7 increases, so that the external heat generated during operation of the semiconductor element 1 is effectively dissipated. This structure is effective for stably operating the semiconductor element 1 that generates a relatively large amount of heat.

The mounting method described in the above embodiment was proved by checking the bonding strength and the mounting performance based on the following specific data.

Each of the device electrodes 8 of the semiconductor device 1 having six device electrodes is provided with a bump 2 in the structure shown in FIG.
Was formed by a plating method. The material of the device electrode 8 is Al
The Ti layer 9 is 0.5 μm, the Ni layer 11 is 12 μm, and A
The u layer 12 was 3 μm.

On the other hand, the circuit board 4 having the wiring and the substrate electrode 5 formed on the ceramic substrate is plated in such a structure as shown in FIG. 4 so that the bonding pad 6 is formed on the substrate electrode 5. Sn was formed to a thickness of 5 μm by the method.

The semiconductor element 1 formed in the above mounting structure is
The circuit board 4 is mounted by the mounting method shown in FIGS.
Implemented. The semiconductor element 1 was sucked by the mounting jig 3 heated to 350 ° C., moved to a predetermined position on the circuit board 4 heated to 200 ° C., and the bump 2 and the bonding pad 6 were brought into contact. After waiting for one second in this contact state, a preheating step of saturating the temperature of the joined portion to 230 to 250 ° C. was performed. Next, a temporary bonding step of applying ultrasonic vibration to the bonding portion at 50 mW per bump and an output time of 50 ms was performed. Next, a heating temperature of 280 ° C. and a heating time of 50 m were applied to the circuit board 4.
In a second, the main bonding process of the bump 2 and the bonding pad 6 was performed. Finally, the semiconductor element 1 was covered with a cap 7, and the circuit board 4 was fixed by applying a temperature of 200 ° C. to a thermosetting adhesive, and hermetically sealed.

When a test was conducted in which the semiconductor element 1 mounted by using the above mounting method was peeled off from the circuit board 4, it was confirmed that the bump bonding strength was 30 gf or more per bump. The semiconductor element itself has been destroyed. That is, the bonding strength is shown to be higher than the semiconductor element strength, and it is understood that the bonding strength is sufficient. This is equivalent to the strength of heat bonding using a conventional flux.

The mounting structure in which the elution preventing wall 13 is formed around the bonding pad 6 as shown in FIG. 5 is such that the 3 μm height elution preventing wall 13 is formed around the bonding pad 6 by printing and curing an epoxy resin. It was formed at a curing temperature of 150 ° C. When the elution preventing wall 13 was not formed, the bonding pad 6 was eluted, and the fillet was not sufficiently formed on the side surface of the bump 2. The formation of the fillet of Sn on the side surface was surely performed, and the improvement of the joining reliability was confirmed.

In the cap structure as shown in FIG. 7, the cap 7 is made of ceramic, and Pb, Cu, Ni, Au
In this order, the conductor layer 15 was formed by plating. Sn was formed on the wiring connected to the ground potential by plating. In this state, the cap 7 is arranged at a predetermined position,
When Sn was heated and melted at a heating temperature of 280 ° C. and a heating time of 60 seconds to connect the conductive layer 15 and the wiring, it was confirmed that the effect of the electrostatic shield was achieved. Further, when the fin-shaped irregularities 17 as shown in FIG. 8 are formed on the cap 7, the heat dissipation of the semiconductor element 1 is promoted, so that the temperature rise during operation is suppressed within 30 ° C. Was confirmed.

[0049]

As described above, according to the method for mounting a semiconductor device according to the first invention of the present application, the preheating step has an effect of facilitating metal fusion in the next temporary bonding step. Heating and ultrasonic vibration cause metal fusion to occur at the joints and perform the function of temporarily joining the joints.By heating while the metal fusion occurs at the joints, metal diffusion is promoted, A main bonding step is performed in which the bump and the substrate electrode are bonded. Since the semiconductor element is attached to the circuit board by the above steps, the semiconductor element is completely sealed by sealing the semiconductor element with a cap. In this mounting method, no flux is used in the conventional method, so that equipment and cost for corrosion and flux cleaning can be reduced.

Further, according to the method of mounting a semiconductor device according to the second aspect of the present invention, the bump structure is not formed of a relatively soft material as in the conventional structure. Contact of the probe does not cause probe contamination. In addition, since the bonding pad is formed on the substrate electrode, bonding when the above mounting method is used is easily performed.

[Brief description of the drawings]

FIG. 1 is an explanatory view showing a procedure of an example of a method for mounting a semiconductor device of the present invention.

FIGS. 2A and 2B are diagrams illustrating a change in the state of a bonding portion according to the mounting method, wherein FIG. 2A illustrates a state at a time of temporary bonding, and FIG.

FIG. 3 is a cross-sectional view showing one embodiment of the bump.

FIG. 4 is a cross-sectional view showing one embodiment of the bonding pad.

FIG. 5 is a sectional view showing an embodiment of an elution preventing wall formed around the bonding pad.

FIG. 6 is a cross-sectional view showing one embodiment of the cap.

FIG. 7 is a sectional view showing a mounting structure of the cap.

FIG. 8 is a cross-sectional view showing another embodiment of the cap.

FIG. 9 is a cross-sectional view illustrating a mounting method according to the related art.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Semiconductor element 2 Bump 4 Circuit board 5 Substrate electrode 6 Bonding pad 7 Cap 8 Element electrode 13 Elution prevention wall 15 Conductive layer 17 Fin-like unevenness

Claims (19)

[Claims] A semiconductor device having a bump formed on an element electrode for connection to a circuit board is disposed at a mounting position of the circuit board, and the bump and the board electrode formed on the circuit board are connected to each other. After the bonding, the semiconductor element is hermetically sealed, and in a semiconductor element mounting method of mounting the semiconductor element on a circuit board, a bonding portion where the heated bump and the heated substrate electrode are brought into contact with each other is fixed. A preheating step of saturating to a temperature, a temporary joining step of applying heat and ultrasonic vibration to the joint to fuse the joint to a metal, and heating the joint in a metal-fused state to a predetermined temperature. The semiconductor device is mounted on the circuit board by performing a main bonding step of bonding by promoting metal diffusion and a sealing step of attaching a cap for hermetically sealing the semiconductor element bonded to the circuit board. semiconductor Element mounting method. 2. The heating temperature in the preheating step is 300 to 400 ° C. for the semiconductor element side and 150 to 400 ° C. for the circuit board side.
2. The method according to claim 1, wherein the temperature is 250 [deg.] C. 3. The heating time in the preheating step is 1
3. The method according to claim 2, wherein the time is from 5 to 5 seconds. 4. The method according to claim 1, wherein the ultrasonic vibration output in the temporary bonding step is 30 to 80 mW per bump. 5. The ultrasonic vibration time in the temporary bonding step is 10 to 100 msec.
A mounting method of the semiconductor element described in the above. 6. The ultrasonic vibration in the temporary joining step is performed from the circuit board side.
A mounting method of the semiconductor element described in the above. 7. The heating temperature of the bonding portion in the temporary bonding step is 300 to 400 ° C. for the semiconductor element side and 1 for the circuit board side.
The temperature is 50 to 250 ° C.,
7. The mounting method of the semiconductor element according to 5 or 6. 8. The heating temperature in the main bonding step is 200
2. The method for mounting a semiconductor device according to claim 1, wherein the temperature is from 400 to 400 [deg.] C. 9. The heating time in the main bonding step is 60 to
9. The method according to claim 8, wherein the time is 120 seconds. 10. A semiconductor device in which a bump for connecting to a circuit board is formed on an element electrode is provided at a mounting position of the circuit board, and the bump and the board electrode formed on the circuit board are connected to each other. After the bonding, the semiconductor element is hermetically sealed, and in a semiconductor element mounting method of mounting the semiconductor element on a circuit board, the bump is formed by a laminated structure of a predetermined metal material, and a predetermined metal A bonding pad made of a material is formed, a preheating step of saturating a bonding portion where the heated bump and the heated bonding pad are brought into contact with each other to a predetermined temperature, and heating and ultrasonic vibration to the bonding portion. A temporary joining step of adding the metal to the joining portion, and a main joining step of heating the joining portion in a metal-fused state to a predetermined temperature and joining the joining portion by metal diffusion. And mounting a semiconductor element on the circuit board by performing a sealing step of attaching a cap for hermetically sealing the semiconductor element bonded to the circuit board. 11. The bump according to claim 1, wherein a Ti layer is provided on the device electrode, a Ni layer is formed on the Ti layer, and an Au layer is formed on the entire exposed surface.
0. A method for mounting a semiconductor device according to item 0. 12. A Ti layer forming a bump having a thickness of 0.1 mm.
12. The thickness of the Ni layer is 5 to 15 [mu] m, and the thickness of the Au layer is 1 to 3 [mu] m.
A mounting method of the semiconductor element described in the above. 13. A bonding pad comprising Sn, P on a substrate electrode.
The method for mounting a semiconductor device according to claim 10, wherein the method is formed of at least one metal selected from the group consisting of b, Ag, Bi, In, and Sb. 14. The method for mounting a semiconductor device according to claim 10, wherein an elution preventing wall for preventing elution of the bonding pad is formed around the bonding pad. 15. The method according to claim 14, wherein the elution preventing wall is formed at a height of 2 to 5 μm. 16. The method for mounting a semiconductor element according to claim 14, wherein the elution preventing wall is formed of an insulating material having poor wettability with a molten metal in which a bonding pad is melted. 17. The cap according to claim 10, wherein the cap is formed of an insulating material, a conductor layer is formed on an inner surface or an outer surface thereof, and the conductor layer is connected to a ground potential portion on the circuit board. How to mount a semiconductor device. 18. The method according to claim 10, wherein the cap is formed of a metal material, and the cap is connected to a ground potential portion on the circuit board. 19. The method according to claim 10, wherein fin-like irregularities are formed on the surface of the cap.