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JPH10248176A - Battery charger - Google Patents

Battery charger

Info

Publication number
JPH10248176A
JPH10248176A JP4663997A JP4663997A JPH10248176A JP H10248176 A JPH10248176 A JP H10248176A JP 4663997 A JP4663997 A JP 4663997A JP 4663997 A JP4663997 A JP 4663997A JP H10248176 A JPH10248176 A JP H10248176A
Authority
JP
Japan
Prior art keywords
charging current
operational amplifier
charging
voltage
current
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4663997A
Other languages
Japanese (ja)
Inventor
Toshihiro Shima
嶋  敏洋
Yoshio Iimura
良雄 飯村
Takero Ishimaru
健朗 石丸
Kazuhiko Funabashi
一彦 船橋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koki Holdings Co Ltd
Original Assignee
Hitachi Koki Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Koki Co Ltd filed Critical Hitachi Koki Co Ltd
Priority to JP4663997A priority Critical patent/JPH10248176A/en
Publication of JPH10248176A publication Critical patent/JPH10248176A/en
Pending legal-status Critical Current

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  • Measurement Of Current Or Voltage (AREA)
  • Charge And Discharge Circuits For Batteries Or The Like (AREA)

Abstract

(57)【要約】 【課題】 充電可能な2次電池を充電する充電装置にお
いて、検出した充電電流を増幅する過程で発生する演算
増幅器のオフセット電圧の影響を排除し、充電電流の誤
差をなくすことである。 【解決手段】 充電電流検出用抵抗6に充電電流以外の
回路消費電流すなわちマイコン8、反転増幅手段7、位
相制御信号伝達手段9、ゼロクロス信号検出手段10等
を流れた回路消費電流を流し、反転増幅手段7の出力オ
フセット電圧を正とする。
(57) Abstract: In a charging device for charging a rechargeable secondary battery, an influence of an offset voltage of an operational amplifier generated in a process of amplifying a detected charging current is eliminated to eliminate a charging current error. That is. A circuit consumption current other than a charging current, that is, a circuit consumption current flowing through a microcomputer, an inverting amplification unit, a phase control signal transmission unit, a zero-cross signal detection unit, and the like, flows through a charging current detection resistor. Assume that the output offset voltage of the amplifying means 7 is positive.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明はニッケル・カドミウ
ム電池等の2次電池を充電する充電装置に関するもので
ある。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a charging device for charging a secondary battery such as a nickel-cadmium battery.

【0002】[0002]

【従来の技術】充電装置は精度よい充電を行うために、
充電電流を検出し演算増幅器等で増幅してマイコンで読
み込み、充電電流を所定値となるように制御する定電流
充電を行っている。図3に電流検出手段の一例を示す。
図3において電流検出抵抗をRs、出力電圧をVopと
する。この場合、演算増幅器GのゲインはRf/Riで
表される。図4に充電電流Ijに対する演算増幅器Gの
出力電圧Vopの特性を示す。
2. Description of the Related Art In order to perform accurate charging, a charging device is used.
Constant current charging is performed in which the charging current is detected, amplified by an operational amplifier and read by a microcomputer, and the charging current is controlled to a predetermined value. FIG. 3 shows an example of the current detecting means.
In FIG. 3, the current detection resistor is Rs, and the output voltage is Vop. In this case, the gain of the operational amplifier G is represented by Rf / Ri. FIG. 4 shows characteristics of the output voltage Vop of the operational amplifier G with respect to the charging current Ij.

【0003】理想的な演算増幅器の場合、出力電圧Vo
pAは、 VopA=Ij×Rs×Rf/Ri と表され、その出力特性は図4において特性aで示され
る。ところが、厳密には演算増幅器Gは入力オフセット
電圧や入力オフセット電流の影響を受ける。演算増幅器
Gの入力オフセット電圧をVosG、演算増幅器Gの入
力オフセット電流をIosGとすると、出力電圧に現れ
るオフセット電圧±Vosは、 ±Vos=(VosG×(Rf/Ri))+(IosG
×Rf) となる。オフセット電圧±Vosの影響を受け演算増幅
器Gの出力特性は特性bや特性−bとなり出力電圧Vo
pB(−VopB)は、 VopB=Ij×Rs×Rf/Ri±Vos となる。
In the case of an ideal operational amplifier, the output voltage Vo
pA is expressed as VopA = Ij × Rs × Rf / Ri, and its output characteristic is indicated by characteristic a in FIG. However, strictly speaking, the operational amplifier G is affected by the input offset voltage and the input offset current. Assuming that the input offset voltage of the operational amplifier G is VosG and the input offset current of the operational amplifier G is IosG, the offset voltage ± Vos appearing in the output voltage is ± Vos = (VosG × (Rf / Ri)) + (IosG
× Rf). Under the influence of the offset voltage ± Vos, the output characteristic of the operational amplifier G becomes the characteristic b or the characteristic −b, and the output voltage Vo
pB (−VopB) is as follows: VopB = Ij × Rs × Rf / Ri ± Vos

【0004】すなわち演算増幅器Gの出力電圧Vopの
バラツキは、演算増幅器Gのオフセット電圧により大き
く左右されてしまい、これをもとに制御する充電電流I
jも大きなバラツキが発生する。例えば充電電流を制御
するための値すなわち充電電流制御値Sを特性aの理想
的な演算増幅器Gを前提に固定してしまうと、値Sを元
に制御する充電電流はIj1からIj2の範囲となり演
算増幅器Gの性能に大きく左右されてしまう。演算増幅
器Gを単電源演算増幅器とすると、特性−bに示すよう
な負オフセット電圧が発生する演算増幅器Gの出力電圧
は、充電電流Ij0まで0Vとなってしまう。このた
め、従来の充電装置では、例えば、図6に示すように演
算増幅器Gの非反転端子にオフセット電圧分の正電圧
(例えば、抵抗R1、R2による分電圧等)を入力し演
算増幅器Gの出力電圧を常に正電圧となるようにして、
充電電流Ijが0の時の演算増幅器Gの出力電圧すなわ
ちオフセット電圧をマイコンで取り込み充電電流Ijが
流れている時の演算増幅器Gの出力電圧から減算するこ
とでオフセット電圧の影響を排除し充電電流Ijのバラ
ツキをなくしていた。また上記方法以外にもオフセット
電圧調整可能な演算増幅器を用いオフセット電圧の0調
整をすることによりオフセット電圧を排除する方法があ
る。
That is, the variation of the output voltage Vop of the operational amplifier G is greatly affected by the offset voltage of the operational amplifier G, and the charging current I.sub.
j also has a large variation. For example, if the value for controlling the charging current, that is, the charging current control value S is fixed on the premise of the ideal operational amplifier G having the characteristic a, the charging current controlled based on the value S is in the range from Ij1 to Ij2. It is greatly affected by the performance of the operational amplifier G. If the operational amplifier G is a single-supply operational amplifier, the output voltage of the operational amplifier G in which a negative offset voltage as shown by the characteristic -b occurs becomes 0 V up to the charging current Ij0. For this reason, in the conventional charging device, for example, as shown in FIG. 6, a positive voltage (for example, a divided voltage by the resistors R1 and R2) corresponding to the offset voltage is input to the non-inverting terminal of the operational amplifier G, and Make the output voltage always positive,
The output voltage of the operational amplifier G when the charging current Ij is 0, that is, the offset voltage, is taken in by the microcomputer and subtracted from the output voltage of the operational amplifier G when the charging current Ij is flowing, thereby eliminating the influence of the offset voltage and thereby reducing the charging current. Ij variation was eliminated. In addition to the above method, there is a method of eliminating the offset voltage by adjusting the offset voltage to 0 using an operational amplifier capable of adjusting the offset voltage.

【0005】[0005]

【発明が解決しようとする課題】しかしながら、上記方
法によれば負オフセット電圧を排除するために抵抗R
1、R2の追加が必要となり部品点数の増加となる。ま
たオフセット電圧の0調整によりオフセット電圧を排除
する方法は、可変抵抗をマニュアルで調整する操作が必
要で操作が面倒であるという問題がある。以上の方法以
外にもオフセット電圧が微少な低オフセットタイプ演算
増幅器を用いる方法があるが汎用の演算増幅器と比較し
て高価となってしまう。本発明の目的は、上記した従来
技術の欠点をなくし、追加部品等を用いることなく演算
増幅器のオフセット電圧の影響を簡単に排除し、充電電
流の誤差をなくすことである。
However, according to the above-described method, the resistance R is reduced to eliminate the negative offset voltage.
1, R2 needs to be added, and the number of parts increases. Further, the method of eliminating the offset voltage by adjusting the offset voltage to 0 has a problem in that an operation of manually adjusting the variable resistor is required and the operation is troublesome. In addition to the above method, there is a method using a low offset type operational amplifier having a small offset voltage, but it is more expensive than a general-purpose operational amplifier. SUMMARY OF THE INVENTION It is an object of the present invention to eliminate the above-mentioned drawbacks of the prior art, to easily eliminate the influence of the offset voltage of the operational amplifier without using additional components and the like, and to eliminate a charging current error.

【0006】[0006]

【課題を解決するための手段】上記目的は、充電電流検
出用抵抗に充電電流以外の回路消費電流を流し、演算増
幅器の出力オフセット電圧を正とすることにより達成さ
れる。
The above object can be achieved by supplying a circuit consumption current other than the charging current to the charging current detecting resistor and making the output offset voltage of the operational amplifier positive.

【0007】[0007]

【発明の実施の形態】図1は本発明の一実施例を示すブ
ロック回路図である。図において、1は交流電源、2は
トランス、3はダイオード3a〜3d及びサイリスタ3
e、3fから構成される全波整流回路、ダイオード3
a、3bとサイリスタ3e、3fで整流された電圧はサ
イリスタ3e、3fで導通角が調整され複数の充電可能
な素電池を直列に接続した電池組4を充電電流Iで充電
する。ダイオード3a〜3dで整流された電圧は、コン
デンサ5a、5b、ボルテージレギュレータ5c、ダイ
オード5dからなる定電圧電源回路5を介して、後述の
反転増幅手段7、マイコン8、位相制御信号伝達手段
9、ゼロクロス信号検出手段10、表示手段11等の電
源となる。充電電流Iは、低抵抗からなる充電電流検出
手段6で検出・電圧変換され、反転増幅手段7を介して
マイコン8に入力される。反転増幅手段7は、単電源演
算増幅器7a(以下演算増幅器7aという)、抵抗7
b、7c、コンデンサ7dから構成され、マイコン8
は、周知の如く、CPU81、ROM82、RAM8
3、タイマ84、A/Dコンバータ85、出力ポート8
6、入力ポート87、リセット回路88等から構成され
る。ROM82内部の821は、充電電流Iを所定値と
するための設定値Sを記憶する充電電流制御値S記憶手
段であり、RAM83内部の831は、充電していない
時の反転増幅手段7の出力電圧すなわち演算増幅器7a
のオフセット電圧とマイコン8、電流増幅手段等の回路
消費電流で発生する電圧を記憶するドリフト電圧記憶手
段である。9は、トランジスタ9a、抵抗9b、ダイオ
ード9c等からなる位相制御信号伝達手段で、マイコン
8の出力ポート86より出力される位相制御信号をサイ
リスタ3e、3fに伝達する。10は、演算増幅器10
a、トランジスタ10b、抵抗10c〜10g、コンデ
ンサ10hからなるゼロクロス信号検出手段で、全波整
流回路3の出力電圧の0V付近(抵抗10e〜10gで
決定される電圧)を検出したゼロクロス信号をマイコン
8に入力する。11は、LED11a、抵抗11bから
なる表示手段で、電池組4の充電中、充電完了等の充電
状態を表示する。12は抵抗12a、12bからなる電
池電圧検出手段で電池組4の電圧を検出する。マイコン
8は、ゼロクロス信号検出毎に充電電流検出手段6と反
転増幅手段7で検出され電圧変換された充電電流をA/
Dコンバータ85を介して読み込み、所定値より小さけ
れば出力ポート86より出力される位相制御信号を早め
て充電電流を大きくするように制御する。反対に充電電
流が大きければ出力ポート86より出力される位相制御
信号を遅らせて充電電流を小さくする制御を行う。この
ようにして、電池組4を充電する充電電流Iが一定の値
に維持される。
FIG. 1 is a block circuit diagram showing an embodiment of the present invention. In the figure, 1 is an AC power supply, 2 is a transformer, 3 is diodes 3a to 3d and thyristor 3
e, full-wave rectifier circuit composed of 3f, diode 3
The voltages rectified by the a and 3b and the thyristors 3e and 3f are adjusted in conduction angle by the thyristors 3e and 3f, and the battery set 4 in which a plurality of rechargeable cells are connected in series is charged with the charging current I. The voltage rectified by the diodes 3a to 3d passes through a constant voltage power supply circuit 5 including capacitors 5a and 5b, a voltage regulator 5c, and a diode 5d. It serves as a power source for the zero-cross signal detection means 10, the display means 11, and the like. The charging current I is detected and converted by a charging current detecting means 6 having a low resistance, and is input to a microcomputer 8 via an inverting amplifying means 7. The inverting amplification means 7 includes a single power supply operational amplifier 7a (hereinafter referred to as an operational amplifier 7a), a resistor 7
b, 7c and a capacitor 7d.
As is well known, a CPU 81, a ROM 82, a RAM 8
3, timer 84, A / D converter 85, output port 8
6, an input port 87, a reset circuit 88 and the like. 821 in the ROM 82 is a charging current control value S storing means for storing a set value S for setting the charging current I to a predetermined value, and 831 in the RAM 83 stores the output of the inverting amplifying means 7 when not charging. Voltage, ie, operational amplifier 7a
Drift voltage storage means for storing the offset voltage and the voltage generated by the current consumption of the circuit such as the microcomputer 8 and the current amplification means. Reference numeral 9 denotes a phase control signal transmitting unit including a transistor 9a, a resistor 9b, a diode 9c, and the like, and transmits a phase control signal output from an output port 86 of the microcomputer 8 to the thyristors 3e and 3f. 10 is an operational amplifier 10
a, a transistor 10b, resistors 10c to 10g, and a capacitor 10h, a zero-cross signal detecting means for detecting a zero-cross signal near 0 V of the output voltage of the full-wave rectifier circuit 3 (a voltage determined by the resistors 10e to 10g). To enter. Reference numeral 11 denotes a display unit including an LED 11a and a resistor 11b, and displays a state of charge such as charging or completion of charging of the battery set 4. Reference numeral 12 denotes a battery voltage detecting means including resistors 12a and 12b, which detects the voltage of the battery set 4. The microcomputer 8 converts the charging current detected by the charging current detecting means 6 and the inverting amplifying means 7 and converted into a voltage every time a zero-cross signal is detected into A / A.
It is read via the D converter 85, and if it is smaller than the predetermined value, the phase control signal outputted from the output port 86 is advanced so as to increase the charging current. Conversely, if the charging current is large, control is performed to delay the phase control signal output from the output port 86 to reduce the charging current. In this way, the charging current I for charging the battery set 4 is maintained at a constant value.

【0008】本発明の動作を説明する前に本発明の原理
を説明する。前記反転増幅手段7は、図3の電流検出手
段と同じ構成で出力特性も図4に示す特性と同等にな
る。すなわち反転増幅手段7は単電源演算増幅器7aを
用いているため、負オフセット電圧が発生すると反転増
幅手段7の出力電圧は充電電流が流れない限り0Vとな
ってしまい、オフセット電圧の補正ができなくなる。そ
こで本発明は、図1に示すように充電電流検出手段6に
充電電流I以外にマイコン8、位相制御信号伝達手段
9、ゼロクロス信号検出手段10を流れた回路消費電流
iも同時に流し、演算増幅器7aを反転増幅器として構
成することにより負オフセット電圧と回路消費電流iに
よる出力電圧Viの検出を行いオフセット電圧の補正を
可能とした。図1によれば、充電電流が0の時の反転増
幅手段7の出力電圧Vopは、 Vop=Vi±Vos となり負電圧の発生要因は、 0>Vi−Vos となる。なお、Viは充電装置が消費する回路消費電流
により発生する反転増幅手段7の出力電圧、Vosは反
転増幅手段7のオフセット電圧である。すなわち Vi≧Vos となるようにすれば、図4の特性−bに示すような演算
増幅器7aの負オフセット電圧(−Vos)が回路消費
電流iにより出力電圧Vi分正側に上昇し、図5の反転
増幅手段7の出力特性に示す特性−Bとなる。すなわち
どのような状態においても反転増幅手段7の出力は総て
正電圧となるので、A/Dコンバータ85での検出が可
能となる。従って、充電電流Iが流れていない時の反転
増幅手段7の出力電圧Vopすなわちドリフト電圧を検
出して充電電流制御値Sに加算して充電電流制御値ΔS
を算出し、その値ΔSをもとに充電電流の制御を行えば
特性−bを有する反転増幅手段7であっても、オフセッ
ト電圧Vosや回路消費電流による出力電圧Viに左右
されることなく常に所定の充電電流Iでの充電が可能と
なる。
Before describing the operation of the present invention, the principle of the present invention will be described. The inverting amplifying means 7 has the same configuration as that of the current detecting means of FIG. 3 and has the same output characteristics as those shown in FIG. That is, since the inverting amplifying means 7 uses the single power supply operational amplifier 7a, when a negative offset voltage is generated, the output voltage of the inverting amplifying means 7 becomes 0 V unless a charging current flows, and the offset voltage cannot be corrected. . Therefore, according to the present invention, as shown in FIG. 1, in addition to the charging current I, the circuit consumption current i flowing through the microcomputer 8, the phase control signal transmitting means 9, and the zero-crossing signal detecting means 10 also flows through the charging current detecting means 6 at the same time. By configuring the inverting amplifier 7a, the output voltage Vi can be detected based on the negative offset voltage and the circuit consumption current i, and the offset voltage can be corrected. According to FIG. 1, when the charging current is 0, the output voltage Vop of the inverting amplifying means 7 is Vop = Vi ± Vos, and the cause of the negative voltage is 0> Vi−Vos. Here, Vi is an output voltage of the inverting amplifier 7 generated by a circuit current consumed by the charging device, and Vos is an offset voltage of the inverting amplifier 7. That is, if Vi ≧ Vos is satisfied, the negative offset voltage (−Vos) of the operational amplifier 7a as shown by the characteristic −b in FIG. 4 rises toward the positive side by the output voltage Vi due to the circuit consumption current i. The characteristic -B shown in the output characteristic of the inverting amplification means 7 is obtained. That is, in any state, the output of the inverting amplification means 7 becomes a positive voltage, so that the detection by the A / D converter 85 becomes possible. Therefore, the output voltage Vop of the inverting amplifier 7 when the charging current I is not flowing, that is, the drift voltage is detected and added to the charging current control value S to add the charging current control value ΔS
If the charging current is controlled based on the value ΔS, even if the inverting amplifier 7 has the characteristic −b, it is always independent of the offset voltage Vos and the output voltage Vi due to the circuit consumption current. Charging with a predetermined charging current I becomes possible.

【0009】次に図1のブロック回路図、図2のフロー
チャートを参照して本発明の動作を説明する。電源を投
入すると、マイコン8はゼロクロス信号検出手段10の
ゼロクロス信号により交流電源1の周波数判別を行い
(ステップ200)、マイコン8内部のタイマ84をカ
ウントして表示手段11のLED11aを点滅させる
(ステップ201)。次いで電池組4の接続待機状態と
なり、電池組4の接続を電池電圧検出手段12の信号に
より判別する(ステップ202)。電池組4を接続する
と、LED11aを点灯し接続待機状態から充電状態に
入ったことを表示する(ステップ203)。充電状態に
入ると、反転増幅手段7の出力電圧VopをA/Dコン
バータ85を介して取り込み、ドリフト電圧記憶手段8
31に記憶する(ステップ204)。ROM821に記
憶する所定の充電電流制御値Sに先程記憶された反転増
幅手段7の出力電圧Vopを加算し充電電流制御値ΔS
を算出する(ステップ205)。ステップ205で充電
電流制御値ΔSが算出されれば、出力ポート86より位
相制御信号伝達手段9を介して最小導通角でサイリスタ
3e、3fをオンし充電を開始する(ステップ20
6)。なお最小導通角は、ゼロクロス信号検出手段10
で検出されたゼロクロス信号を元にタイマ84をカウン
トして交流電源1の周波数に応じたROM82内部に記
憶する所定の時間後位相制御信号を出力して得られる。
充電が開始されると電池組4に流れる充電電流を電流検
出手段6で検出し反転増幅手段7を介してA/Dコンバ
ータ85で読み込む充電電流検出処理を行い(ステップ
207)、ステップ205で算出された充電電流制御値
ΔSと比較を行う。比較を行った結果、検出された充電
電流が算出された充電電流制御値ΔSよりも小さければ
(ステップ208)、充電電流を上げるように出力ポー
ト86より出力される位相制御信号の導通角を広げる
(ステップ209)。また、検出された充電電流が算出
された充電電流制御値ΔSよりも大きければ(ステップ
210)、充電電流を下げるように出力ポート86より
出力される位相制御信号の導通角を狭くする(ステップ
211)。検出された充電電流と算出された充電電流制
御値ΔSが等しい場合には位相制御信号の導通角は変更
しない。検出した充電電流と算出した充電電流制御値Δ
Sが等しい場合か、ステップ209、ステップ211処
理後に、電池電圧検出手段12で検出される電池組4の
電圧をもとに満充電になったか否かの判別を行い、満充
電でなければステップ207の充電電流検出処理に戻
り、以上の処理を繰り返す(ステップ212)。また満
充電と検出されれば、出力ポート86より出力される位
相制御信号を遮断し電池組4の充電を終了する(ステッ
プ213)。その後、LED11aを点滅させ(ステッ
プ214)、一連の充電処理を完了し電池組4の取り出
しを待ち(ステップ215)、電池組4が取り出された
のを判別すれば、ステップ202に戻り次の電池組4の
接続を待つ。
Next, the operation of the present invention will be described with reference to the block circuit diagram of FIG. 1 and the flowchart of FIG. When the power is turned on, the microcomputer 8 determines the frequency of the AC power supply 1 based on the zero-cross signal of the zero-cross signal detecting means 10 (step 200), counts the timer 84 inside the microcomputer 8, and blinks the LED 11a of the display means 11 (step 200). 201). Next, the connection of the battery set 4 is awaited, and the connection of the battery set 4 is determined by the signal of the battery voltage detecting means 12 (step 202). When the battery set 4 is connected, the LED 11a is turned on to indicate that the charging state has been entered from the connection standby state (step 203). When the charging state is entered, the output voltage Vop of the inverting amplification means 7 is taken in through the A / D converter 85, and the drift voltage storage means 8
31 (step 204). The output voltage Vop of the inverting amplifying means 7 previously stored is added to a predetermined charging current control value S stored in the ROM 821 to add a charging current control value ΔS
Is calculated (step 205). When the charging current control value ΔS is calculated in step 205, the thyristors 3e and 3f are turned on at the minimum conduction angle from the output port 86 via the phase control signal transmitting means 9 to start charging (step 20).
6). Note that the minimum conduction angle is determined by the zero-cross signal detection means 10.
The timer 84 is counted based on the zero-cross signal detected in step (1), and a phase control signal is output after a predetermined period of time stored in the ROM 82 corresponding to the frequency of the AC power supply 1.
When the charging is started, the charging current flowing through the battery set 4 is detected by the current detecting means 6, and the charging current detecting process is performed by the A / D converter 85 via the inverting amplifying means 7 (step 207), and the calculation is performed at step 205. A comparison is made with the set charging current control value ΔS. As a result of the comparison, if the detected charging current is smaller than the calculated charging current control value ΔS (step 208), the conduction angle of the phase control signal output from the output port 86 is increased so as to increase the charging current. (Step 209). If the detected charging current is larger than the calculated charging current control value ΔS (step 210), the conduction angle of the phase control signal output from output port 86 is reduced so as to reduce the charging current (step 211). ). When the detected charging current is equal to the calculated charging current control value ΔS, the conduction angle of the phase control signal is not changed. Detected charging current and calculated charging current control value Δ
If S is equal, or after Steps 209 and 211, it is determined whether or not the battery is fully charged based on the voltage of the battery set 4 detected by the battery voltage detecting means 12. Returning to the charging current detection process of 207, the above process is repeated (step 212). If full charge is detected, the phase control signal output from the output port 86 is cut off, and charging of the battery set 4 is terminated (step 213). Thereafter, the LED 11a is turned on and off (step 214), a series of charging processes are completed, and the removal of the battery set 4 is waited for (step 215). If it is determined that the battery set 4 has been removed, the process returns to step 202 and returns to the next battery. Wait for connection of set 4.

【0010】[0010]

【発明の効果】本発明によれば、充電可能な2次電池を
充電する充電装置において検出した充電電流を電圧変換
し増幅する過程で発生する演算増幅器のバラツキをマイ
コン、演算増幅器等の回路消費電流により検出して、最
低限の部品で精度の良い充電をすることができる。
According to the present invention, variations in operational amplifiers generated in the process of converting and amplifying a charging current detected in a charging device for charging a rechargeable secondary battery are reduced by the circuit consumption of microcomputers, operational amplifiers and the like. It is possible to detect with an electric current and charge with high accuracy with a minimum number of components.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施例を示すブロック回路図。FIG. 1 is a block circuit diagram showing one embodiment of the present invention.

【図2】本発明の一実施例を示すフローチャート。FIG. 2 is a flowchart showing one embodiment of the present invention.

【図3】演算増幅器を用いた電流検出手段の一例を示す
回路図。
FIG. 3 is a circuit diagram showing an example of a current detection unit using an operational amplifier.

【図4】演算増幅器の出力特性を示すグラフ。FIG. 4 is a graph showing output characteristics of an operational amplifier.

【図5】本発明を構成する反転増幅手段の出力特性を示
すグラフ。
FIG. 5 is a graph showing the output characteristics of the inverting amplification means constituting the present invention.

【図6】オフセット電圧の補正が可能な演算増幅器を用
いた増幅手段の一例を示す回路図。
FIG. 6 is a circuit diagram showing an example of an amplifier using an operational amplifier capable of correcting an offset voltage.

【符号の説明】[Explanation of symbols]

6は充電電流検出手段、7は反転増幅手段、8はマイコ
ンである。
6 is a charging current detecting means, 7 is an inverting amplifying means, and 8 is a microcomputer.

───────────────────────────────────────────────────── フロントページの続き (72)発明者 船橋 一彦 茨城県ひたちなか市武田1060番地 日立工 機エンジニアリング株式会社内 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Kazuhiko Funabashi 1060 Takeda, Hitachinaka-shi, Ibaraki Prefecture Within Hitachi Koki Engineering Co., Ltd.

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 充電される2次電池と直列に接続された
充電電流検出用抵抗の端子電圧を演算増幅器により増幅
し、演算増幅器の出力により充電電流を制御するように
した電池の充電装置であって、 前記充電電流検出用抵抗に充電電流以外の回路消費電流
を流し、演算増幅器の出力オフセット電圧を正としたこ
とを特徴とする電池の充電装置。
1. A battery charging device in which a terminal voltage of a charging current detecting resistor connected in series with a secondary battery to be charged is amplified by an operational amplifier, and a charging current is controlled by an output of the operational amplifier. A battery charging device characterized in that a circuit consumption current other than the charging current flows through the charging current detection resistor, and the output offset voltage of the operational amplifier is made positive.
【請求項2】 前記演算増幅器の出力をマイコンに送
り、マイコンにより充電電流を制御するようにしたこと
を特徴とする請求項1記載の電池の充電装置。
2. The battery charging device according to claim 1, wherein an output of the operational amplifier is sent to a microcomputer, and the charging current is controlled by the microcomputer.
【請求項3】 前記回路消費電流を、マイコン、ゼロク
ロス信号検出回路等を流れた電流としたことを特徴とす
る請求項2記載の電池の充電装置。
3. The battery charging device according to claim 2, wherein the circuit consumption current is a current flowing through a microcomputer, a zero-cross signal detection circuit, and the like.
【請求項4】 充電電流が流れていない時の演算増幅器
の出力電圧を検出し、検出出力電圧と制御する充電電流
に対応する電圧との和を記憶し、充電電流を流した時の
演算増幅器の出力電圧が前記和と等しくなるように充電
電流を制御するようにしたことを特徴とする請求項1ま
たは3記載の電池の充電装置。
4. An operational amplifier for detecting an output voltage of an operational amplifier when a charging current is not flowing, storing a sum of a detected output voltage and a voltage corresponding to a charging current to be controlled, and operating the operational amplifier when a charging current flows. 4. The battery charging device according to claim 1, wherein the charging current is controlled so that the output voltage of the battery becomes equal to the sum.
JP4663997A 1997-02-28 1997-02-28 Battery charger Pending JPH10248176A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4663997A JPH10248176A (en) 1997-02-28 1997-02-28 Battery charger

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4663997A JPH10248176A (en) 1997-02-28 1997-02-28 Battery charger

Publications (1)

Publication Number Publication Date
JPH10248176A true JPH10248176A (en) 1998-09-14

Family

ID=12752884

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4663997A Pending JPH10248176A (en) 1997-02-28 1997-02-28 Battery charger

Country Status (1)

Country Link
JP (1) JPH10248176A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008261763A (en) * 2007-04-13 2008-10-30 Hitachi Industrial Equipment Systems Co Ltd Power converter
JP2011257416A (en) * 2011-07-22 2011-12-22 Hitachi Industrial Equipment Systems Co Ltd Electric power converting device
CN108258763A (en) * 2018-01-29 2018-07-06 江苏万帮德和新能源科技股份有限公司 For adjusting output current error precision methods and charging pile

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008261763A (en) * 2007-04-13 2008-10-30 Hitachi Industrial Equipment Systems Co Ltd Power converter
JP2011257416A (en) * 2011-07-22 2011-12-22 Hitachi Industrial Equipment Systems Co Ltd Electric power converting device
CN108258763A (en) * 2018-01-29 2018-07-06 江苏万帮德和新能源科技股份有限公司 For adjusting output current error precision methods and charging pile

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