JPH10208002A - Information read control method and information reader - Google Patents

Abstract

PROBLEM TO BE SOLVED: To limit the frequency in read of recorded information from a recording medium by inhibiting read in the case that the frequency in write of a flag exceeds a prescribed value. SOLUTION: In the information read control operation which a CPU 4 of an information reader performs, a word area for reproducing inhibition control provided in an index information part of a PC card memory 1 is used. A flag to detect whether a card has been already reproduced or not is written in the word area for reproducing inhibition control, and a read inhibition command is outputted to perform the reproducing inhibition control if it is detected that this flag is written a prescribed number of times. Especially, the flag write control is performed when a PC card memory 1 is set to the information reader. In this case, the frequency in setting operation of the PC card memory 1 and the frequency in reproducing operation of voice data in the PC card memory 1 are set in accordance with the number of bits of a shift register of the card reproducing detection flag in the PC card memory 1, thereby limiting the frequency in use of the PC card memory 1.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an information reading control method and an information reading apparatus for reading recorded program information (for example, music information) from a solid-state memory such as a semiconductor memory card used in a computer or the like. About.

[0002]

2. Description of the Related Art A semiconductor (IC) memory card uses an excellent digital signal encoding / compression processing technology such as MPEG audio to replace an optical information recording medium with the miniaturization and large capacity of a semiconductor memory. It is drawing attention as a next-generation information recording medium. However, a method of editing recorded information such as music information and the like and a special reproduction method using such an information recording medium has not been proposed yet.

Conventionally, a so-called compact disk (CD-DA) has been known as an information recording medium.
Once the user obtains the compact disc, the user can repeatedly reproduce the recorded information such as the recorded music information with various CD players or the like as long as the disc is not damaged. Further, a so-called cassette tape is also known as an information recording medium on which record information can be recorded or erased. In this case as well, the user can erase the recorded information by himself / herself as unnecessary, or can reproduce the information repeatedly as long as the cassette tape is not denatured, damaged or destroyed. Software, which is a recording medium on which such music information is recorded, can be reproduced repeatedly as many times as possible, so that the cost of the software is added to the cost of copyright.

[0004]

However, conventionally, in any of the above-mentioned recording media, the number of times of reproduction of recorded information such as music information is restricted for a user, or the use (reproduction) of the information recording medium is restricted. ) Software could not be provided cheaply because the number of times could not be limited. In other words, software whose number of uses is limited can be provided at a low price according to the number of uses. The present invention
In view of the above-mentioned problems, an information reading control method and an information reading method for restricting the number of times of reproduction of recorded information on a writable recording medium for a user in order to enable use of low-cost software. An apparatus is provided.

[0005]

According to the first aspect of the present invention,
In the information reading control method for recording information recorded on a writable recording medium, every time the recording information is read, a flag for indicating that the recording information has been read is written to the recording medium,
When it is detected that the number of times of the written flag is a predetermined number, reading of the recording information is prohibited.

According to a second aspect of the present invention, in the information reading control method for recording information recorded on a writable recording medium, the recording information is rewritten at the time of reading the recording information a predetermined number of times. It is characterized in that the same recorded information as before the predetermined number of times is not reproduced when reading the recorded information after the number of times.

According to a third aspect of the present invention, there is provided a method for recording from a recording medium recording ID information for identifying the recording information together with the recording information or identifying the recording medium on which the recording information is recorded. In an information reading apparatus for reading information, a storage means for storing ID information, and each time the recorded information is read, compares the ID information recorded on the recording medium with the ID information already stored in the storage means. A match detecting means for detecting a match, and a control means for prohibiting reading of the recorded information when the match detecting means detects that the ID information recorded on the recording medium matches the predetermined number of times. It is characterized by having.

[0008]

According to the information reading control method of the first aspect of the present invention, every time recording information is read from a writable recording medium, a flag indicating that the recording information has been read is written to the recording medium. It is. At this time, when it is detected that the number of times the flag is written is a predetermined number, reading of the record information is prohibited. Therefore, the number of times that the recorded information can be reproduced can be limited.

According to the information reading control method of the present invention, when reading recorded information from a writable recording medium a predetermined number of times, the read recorded information is rewritten. Therefore, it is possible to prevent the same recorded information as before the predetermined number of times from being reproduced when reading the recorded information after the predetermined number of times.

In the information reading apparatus according to the third aspect of the present invention, each time the recorded information is read, the coincidence detecting means detects the ID information recorded on the recording medium and the ID information already stored in the storage means. To find a match,
When it is detected that the ID information recorded on the recording medium matches the predetermined number of times, reproduction of the recorded information is prohibited by the control means. Therefore, the number of times that the recorded information can be reproduced can be limited.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention relates to an information reading control method and an information reading apparatus which enable use of low-cost software, which will be described below with reference to the drawings. FIG. 1 is a system block diagram of an information reading device according to the present invention. In FIG. 1, the key input unit 3 includes various operation buttons such as music selection, reproduction (Play), stop (Stop), and the like, and various instruction data for each program is output by a user's instruction operation. The PC card memory 1 is a recordable card-like data memory using a solid-state memory such as a semiconductor. For example, the PC card memory 1 is attached to a drive unit through a card insertion slot provided in an information reading device.
It is connected to a system bus via a card memory I / F (interface) not shown.

The LCD display unit 2 includes a liquid crystal display and the like, and is recorded in the PC card memory 1 under the control of the CPU 4 based on a command from the key input unit 3 and the detection of the attachment of the PC card memory 1. For example, data on various programs such as music, program name, recording time for each program, elapsed time information of each program, card memory ID information, etc. are obtained from a system bus via a display I / F (not shown). Display based on these various information is performed.

The CPU 4 controls the mounting of the PC card memory 1 and the display based on various commands from the key input unit 3 on the LCD display unit 2.
The reproduction command or the reproduction prohibition command of the PC card memory 1 or each music data in the PC card memory 1 is performed. When the CPU 4 issues a reproduction command, each music data in the PC card memory 1 is temporarily stored in the buffer RA through the system bus.
After being transmitted to M8, it is transmitted to the Audio output unit 5 via a D / A converter (not shown), and is reproduced as an audio signal corresponding to each music data.

The history memory 6 stores information unique to each PC card memory 1 and stores information indicating the number of times of use of each PC card memory 1 in correspondence with information unique to each PC card memory 1. It is stored. The buffer RAM 8 temporarily stores the various data transmitted to the system bus under the control of the CPU 4. In addition, the backup power supply 9
Are used to drive the timer 7 and the buffer RAM 8.

The system of the information reading apparatus of the present invention is configured as described above, and includes a PC mounted on the information reading apparatus.
When reproducing each music data in the card memory 1, the CP
U4 limits the number of uses (reproduction) of the PC card memory 1 or each music data in the PC card memory 1 from the next time.

Next, the configuration of the PC card memory 1 will be described with reference to FIG. The PC card memory 1 includes a flash memory 10 having a capacity of, for example, about 40 MB in which various data are recorded, and a buffer RAMA and a buffer RAMB having a capacity of, for example, about 512B.

The buffer RAMA is a flash memory 1
This is a storage unit for temporarily storing a Write signal, an address value of audio data, and the like at a predetermined timing by the CPU 4 when writing various data into 0. Further, the write data stored in the buffer RAMA
The signals are transmitted to the flash memory 10 under the control of the CPU 4.
Is overwritten on the audio data block of an arbitrary address value. The buffer RAMB is a flash memory 1
This is storage means for temporarily storing audio data in an audio data block, data transferred from the index information section, and the like by the CPU 4 at a predetermined timing when reading various data in 0. Further, the data stored in the buffer RAMB is transferred to the buffer RAM 8 via the system bus under the control of the CPU 4. These buffer RAMA and buffer RAMB
Are switched by the mode switching control of the CPU 4, and the above-described operations of the switched buffer RAM are performed.

FIG. 3 shows the data structure of the flash memory 10. The flash memory 10 is provided with a plurality of audio data blocks in which audio data corresponding to each song is recorded, an index information section, and the like.
In the index information section in the flash memory 10, data for specifying each audio data number, and a start address and an end address of each audio data block are recorded in association with each other. Further, data corresponding to the number of audio data blocks, the last address of the recorded audio data block, data corresponding to the card ID number, and the like are also recorded. Further, an area for recording a reproduction prohibition control word is provided.

FIG. 4 shows an example of the structure of the reproduction prohibition control word provided in the index information section of the flash memory 10. As shown in FIG. The reproduction prohibition control word is composed of allocated n blocks of shift registers (d1 to dn). Each shift register is composed of one or a plurality of bits, and is updated and recorded by bit addition.

The reproduction prohibition control word is used for detecting whether or not the corresponding PC card memory 1 or each audio data recorded in the PC card memory 1 is reproduced. For example, d
If 1 is a card playback detection flag and d2 to dn are song playback detection flags from the first song to the (n-1) th song, P
When the C card memory 1 is not used (reproduced), a flag (0 data) indicating an unreproduced state is previously written in each register as an initial value as shown in FIG.

When reproducing the PC card memory 1 or each audio data recorded in the PC card memory 1,
The flag (0 data) indicating the unreproduced state of the corresponding register is set by the CPU 4 to the flag (1) indicating the already reproduced state.
Data). By being rewritten in this manner, the CPU can confirm whether the PC card memory 1 or the audio data recorded in the PC card memory 1 has not been reproduced or has been reproduced.

In FIG. 4, the configuration of each shift register is 1 bit, and it is shown as a configuration in which it is possible to confirm whether the data has not been reproduced or has already been reproduced. However, the present invention is not limited to this. Thereby, the PC card memory 1 or the number of times of reproduction of each audio data recorded in the PC card memory 1 can be confirmed.

Hereinafter, the CP of the information reading device according to the present invention will be described.
Each embodiment of the information reading control operation performed by U4 will be described using a flowchart. The first embodiment is a PC
This uses a reproduction prohibition control word area provided in the index information section of the card memory 1. A flag for detecting whether or not the card has been reproduced is written in the reproduction prohibition control word area, and when it is detected that the flag has been written a predetermined number of times, a read prohibition command is output to prohibit the reproduction. In this embodiment, the flag writing control is performed when the PC card memory 1 is mounted on the information reading device.

FIG. 5 shows the CPU in the first embodiment.
4 is a flowchart showing a control operation of No. 4. In the figure, the CPU 4 first determines in step S1 whether or not the PC card memory 1 has been mounted on the information reading device, and when the PC card memory 1 has been mounted, proceeds to step S2. Step S2
Then, the index information of the inserted PC card memory 1 is read out and stored in the buffer RAM 8.

In step S3, the CPU 4 detects whether or not the card reproduction detection flag of the reproduction prohibition control word of the index information is 0. Here, if the card reproduction detection flag is configured by a multi-bit shift register,
A flag corresponding to the most significant bit of the card reproduction detection flag is detected, and if the card reproduction detection flag is configured by a 1-bit shift register, a flag corresponding to the bit is detected. In step S3, if the flag corresponding to the card reproduction detection flag is not 0 (ie, P
CPU card memory 1 has reached the number of times of reproduction)
In step S9, an error message indicating that the inserted PC card memory 1 cannot be reproduced any more is displayed on the LCD display unit 2 and a reproduction prohibition command is issued to execute all reproduction in the PC card memory 1. After the audio data is controlled not to be transmitted to the system bus, the control operation ends. On the other hand, if the detected flag is 0
In the case of the PC card memory 1 being unused or usable, the process proceeds to step S4, and after adding one bit to the card reproduction detection flag, the process proceeds to step S5.

After issuing a reproduction command in step S5, the CPU 4 controls to start reproduction in step S6, and sequentially transfers the audio data in the PC card memory 1 to the buffer RAM 8 via the system bus. The audio data transferred to the buffer RAM 8 is output to the audio output unit 5.
Output from

In step S7, the CPU 4 detects that all the audio data recorded in the PC card memory 1 has been reproduced, for example, by detecting that the address of the audio data to be sequentially reproduced matches the end address. Move to S8. In step S8, the CPU 4
Determines whether audio data recorded in the PC card memory 1 is to be reproduced again according to, for example, a command from the key input unit 3, and if it is to be reproduced again, the CPU 4 proceeds to the previous step S3. And the subsequent control operations are repeated. On the other hand, when the reproduction is not performed again, the control operation is ended (end).
I do. At this time, the CPU 4 may cause the PC card memory 1 to be ejected from the information reading device upon completion of the control operation. In step S8, C
The PU 4 also determines that the audio data will not be reproduced again even if no command is received from the key input unit 3 until a predetermined time has elapsed from the end of the reproduction of the audio data.

As described above, when the card reproduction detection flag is constituted by the shift register of a plurality of bits, the shift register adds one bit each time the audio data in the PC card memory 1 is reproduced. The audio data in the PC card memory 1 can be reproduced a number of times based on the number of bits constituting the shift register. In addition, PC
Each time the card memory 1 is mounted on the information reading device, the card reproduction detection flag is incremented by one bit. Therefore, when the PC card memory 1 is removed from the information reading device by an eject operation or the like, the audio data is reproduced again. The number of times audio data is reproduced is reduced by the number of times the PC card memory 1 is mounted.

In the case where the card reproduction detection flag is constituted by a 1-bit shift register, when the PC card memory 1 is mounted on the information reading device, the CPU 4
Rewrites the card reproduction detection flag from the initial value 0 to 1, so that the next time the PC card memory 1 is inserted, the reproduction of audio data can be disabled. Since the control operation of the CPU 4 in the first embodiment is performed as described above, the number of mounting operations of the PC card memory 1 and the PC card memory 1 in accordance with the bit number of the shift register of the card reproduction detection flag of the PC card memory 1 By setting the number of times that the number of reproduction operations of the audio data in 1 is added, the PC
The number of times the card memory 1 is used can be limited.

Next, a second embodiment will be described. In the second embodiment, similar to the first embodiment, the reproduction inhibition control of each PC card memory is performed by using the reproduction inhibition control word area provided in the index information section of the PC card memory 1. However, the second embodiment is different from the first embodiment in that the flag writing control is performed after the reproduction of the audio data recorded in the PC card memory 1 is completed or immediately before the ejection operation.

FIG. 6 shows a CPU according to the second embodiment.
4 is a flowchart showing a control operation of No. 4. In FIG. 6, steps S11 to S13 and step S19 are:
5 correspond to Steps S1 to S3 and Step S9 in FIG. 5, respectively, and operate in the same manner. Therefore, description thereof will be omitted. Here, each step operation after Step S14 will be described.

In step S13 in FIG. 6, if the detected flag is 0 (ie, the PC card memory 1 is unused or usable), the process proceeds to step S15, where a reproduction command is issued, and then the process proceeds to step S16. The audio data in the PC card memory 1 is sequentially transferred to the buffer RAM 8 via the system bus, and the audio data transferred to the buffer RAM 8 is output from the audio output unit 5.

In step S17a, the CPU 4 detects the presence or absence of an eject command of the PC card memory 1 during reproduction of audio data. The eject command is a command that is performed using the operation buttons of the key input unit 3 when, for example, the user wants to remove the PC card memory 1 from the information reading device. At the step S17a, the CPU 4
If it is determined that the eject command is present, the process proceeds to step S14, and after adding one bit to the card reproduction detection flag, the control operation ends. If the CPU 4 determines in step S17a that there is no ejection command, the process proceeds to step S17.

In step S17, the fact that all the audio data recorded in the PC card memory 1 has been reproduced is determined by C
When PU4 is detected, the process moves to step S18. In step S18, the CPU 4 determines whether or not to reproduce the audio data recorded in the PC card memory 1 again according to a command from the key input unit 3, for example. Return and repeat step S15
Steps S18 to S18 are repeated. On the other hand, when the reproduction is not performed again, the process proceeds to step S14 described above, and the subsequent operation is performed in the same manner.

In the second embodiment, as in the first embodiment, the PC
The number of times of reproduction of the PC card memory 1 can be limited according to the number of bits constituting the shift register of the card reproduction detection flag of the card memory 1. However, in the second embodiment, the number of times the PC card memory 1 is used by inserting it into the information reading device is limited. For this reason, unless the audio data in the PC card memory 1 cannot be reproduced and the PC card memory 1 is not removed from the information reading device, one bit is not added to the card reproduction detection flag. But it can be played repeatedly.

In the first and second embodiments described above, the CPU 4
This is an example in which the reproduction inhibition control of the PC card memory 1 is performed by using the card reproduction detection flag in the reproduction inhibition control word area provided in the index information section of the PC card memory, and the number of times of reproduction is limited. However, the present invention is not limited to this. For example, the CPU 4 may use a reproduction inhibition control word area provided in the index information section of the PC card memory as an area for a music reproduction detection flag, and The number of uses may be limited. The control operation of the CPU 4 in that case will be described as the following third to fifth embodiments with reference to flowcharts.

In the third embodiment, a reproduction prohibition control word area provided in the index information section of the PC card memory 1 is used. A flag for detecting whether or not the audio data has been reproduced is written in the reproduction prohibition control word area. When it is detected that the flag corresponding to the audio data has been written a predetermined number of times, the reading is prohibited. A command is output to perform reproduction inhibition control. Particularly, in the present embodiment, when each audio data is selected, writing control of a flag is performed.

FIG. 7 shows a CPU according to the third embodiment.
4 is a flowchart showing a control operation of No. 4. In the figure, the CPU 4 sends a P to the information reading device in step S21.
It is determined whether or not the C card memory 1 has been mounted, and if so, the process proceeds to step S22. Step S22
Then, the index information of the inserted PC card memory 1 is read out and stored in the buffer RAM 8.

In step S23, for example, when the user selects an audio data number using the operation button of the key input unit 3, the process proceeds to step S24, where the CPU 4
It is detected whether the music reproduction detection flag corresponding to the audio data number in the reproduction prohibition control word area is 0 or not. In step S24, the CPU 4 detects the flag corresponding to the most significant bit of the music reproduction detection flag if the music reproduction detection flag of the mounted PC card memory 1 is constituted by a shift register of a plurality of bits. If the music reproduction detection flag of the PC card memory 1 is constituted by a 1-bit shift register, the flag corresponding to the bit is detected, and the detected flag is set to 0 (that is, the corresponding audio data in the PC card memory 1 is not stored). If it is in a usable or usable state), the process proceeds to step S25, and after adding 1 bit to the music reproduction detection flag corresponding to the audio data,
Move to step S26.

In step S26, the CPU 4 issues a command to reproduce the corresponding audio data, and the audio data is sequentially transferred from the PC card memory 1 to the buffer RAM 8 via the system bus, and transferred to the buffer RAM 8. The audio data is output from the audio output unit 5. In step S27, the CPU 4 detects that the audio data corresponding to the end address of the audio data block whose reproduction has been started in step S26 has been output, thereby detecting that the reproduction has ended, and then in step S2.
Move to 8.

In step S28, the CPU 4 determines whether or not the next audio data number selected in the previous step S23 still exists. If it determines that there is no more, the control operation ends (ends). At this time, the CPU
4 may cause the PC card memory 1 to be ejected from the information reading device upon completion of the control operation. If the CPU 4 determines in step S28 that the next audio data number selected in step S23 still exists, the process returns to step S24 again.

On the other hand, in step S24, the CPU 4
When the flag corresponding to the corresponding music reproduction detection flag is not 0 (ie, when the corresponding audio data in the PC card memory 1 has reached the number of times of reproduction), the process proceeds to step S29, and, for example, the inserted PC card memory In step 1, an error message indicating that the audio data corresponding to the audio data number cannot be reproduced any more is displayed on the LCD display unit 2, and a reproduction prohibition command is issued so that the corresponding audio data in the PC card memory 1 is transmitted to the system. After controlling not to send the data to the bus, the process proceeds to step S28, and the control operation from step S28 described above is performed.

Since the control operation of the CPU 4 in the third embodiment is performed as described above, the control operation of the CPU 4 according to the bit number of the shift register of the music reproduction detection flag corresponding to each audio data in the PC card memory 1 is performed. The number of times audio data can be reproduced can be limited. Further, in this embodiment, when each audio data is selected, a flag is written. Therefore, if the music reproduction detection flag is constituted by a 1-bit shift register, once the reproduction of the audio data is once selected, It is possible to prohibit the music data from being selected and reproduced again.

Next, a fourth embodiment will be described. In the fourth embodiment, similar to the third embodiment, the reproduction prohibition control of each audio data is performed using the reproduction prohibition control word area provided in the index information section of the PC card memory 1. In particular, this embodiment is different from the third embodiment in that the CPU 4 controls the writing of the flag when the reproduction of each audio data is completed.

FIG. 8 shows a CPU according to the fourth embodiment.
8 is a flowchart showing the control operation of FIG. 4. FIG. 8 is a flowchart showing step S25 in the flowchart of FIG.
27 is formed after the completion of step 27.
Therefore, since each step in FIG. 8 performs the same control operation as each step denoted by the same reference numeral in FIG. 7, the description of steps S21 to S24 and step S29 is omitted, and here, FIG. Will be described below.

At step S24 in FIG. 8, the CPU 4
If the music reproduction detection flag corresponding to the audio data number selected in the previous step S23 is 0 (ie, the corresponding audio data in the PC card memory 1 is unused or usable), the process proceeds to step S26. Control to start playback. That is, after the reproduction command of the corresponding audio data is issued, the audio data selected from the PC card memory 1 is sequentially transferred to the buffer RAM 8 via the system bus, and the audio data transferred to the buffer RAM 8 is transferred to the Au.
Output from the dio output unit 5.

In step S27, the CPU 4 detects that the audio data started to be reproduced in step S26 has been reproduced, and then proceeds to step S25 to add 1 bit to the music reproduction detection flag corresponding to the audio data. After the addition, the process moves to step S28. In step S28, the CPU 4 determines whether or not the next audio data number selected in the previous step S23 still exists. If it is determined that there is no more, the control operation ends (ends).
At this time, the CPU 4 sets P
The C card memory 1 may be ejected from the information reading device. In step S28, C
When the PU 4 determines that the next audio data number selected in the previous step S23 still exists, the process returns to the previous step S24 again.

Since the control operation of the CPU 4 in the fourth embodiment is performed as described above, each of the music reproduction detection flags corresponding to each audio data in the PC card memory 1 is changed according to the bit number of the shift register. By setting the number of times the audio data has been reproduced, the number of times the recorded information in the PC card memory 1 can be reproduced can be limited. However, the fourth
In the embodiment of the present invention, a flag is written when the reproduction of each audio data is completed. Therefore, unless the PC card memory 1 is mounted on the information reproducing apparatus, the CPU 4 operates the PC 4 unless the audio data can be reproduced. Unless the end of reproduction of the selected audio data in the card memory 1 is detected,
It becomes possible to rewind and reproduce the audio data from the start address any number of times.

Next, a fifth embodiment will be described. The fifth embodiment is an example in which the above-described first embodiment and the fourth embodiment are combined, and the CPU 4 of the information reading device detects whether or not each PC card memory has been used. At the same time, it detects whether or not each audio data in the PC card memory 1 has been reproduced.
That is, in the present embodiment, the reproduction prohibition control word area provided in the index information section in the PC card memory 1 is used, and the PC card memory and the audio in the PC card memory 1 are stored in the reproduction prohibition control word area. Write a flag to detect whether the data has been reproduced
When it is detected that the card memory and the flag corresponding to the audio data have been written a predetermined number of times, a read prohibition command is output, and the reproduction prohibition control is performed. Particularly, in this embodiment, the writing control of the flag for the PC card memory 1 is performed when the PC card memory 1 is mounted, and the writing control of the flag for each audio data is performed when the reproduction of each audio data is completed.

FIG. 9 shows a CPU according to the fifth embodiment.
4 is a flowchart showing a control operation of No. 4. Steps S1 to S4, S9, and S23 to S29 in FIG. 9 perform the same control operations as the steps denoted by the same reference numerals in FIGS. In FIG. 9, the CPU 4 first determines in step S1 whether or not the PC card memory 1 has been mounted on the information reading device, and if the PC card memory 1 has been mounted, proceeds to step S2. In step S2, the index information of the inserted PC card memory 1 is read out and the buffer R
Store it in AM8.

In step S3, the CPU 4 detects whether the card reproduction detection flag of the reproduction inhibition control word of the index information is 0 or not. Here, if the card reproduction detection flag is configured by a multi-bit shift register,
A flag corresponding to the most significant bit of the card reproduction detection flag is detected, and if the card reproduction detection flag is configured by a 1-bit shift register, a flag corresponding to the bit is detected. In step S3, the CPU 4
If the flag corresponding to the card reproduction detection flag is not 0 (that is, if the PC card memory 1 has reached the number of times of reproduction), the process proceeds to step S9, for example, indicating that the inserted PC card memory 1 cannot be reproduced any more. Is displayed on the LCD display unit 2 and a reproduction prohibition command is issued to control not to transmit all the audio data in the PC card memory 1 to the system bus, and then the control operation is ended (end). At this time, the CPU 4
Alternatively, the PC card memory 1 may be ejected from the information reading device at the end of the control operation. on the other hand,
If the detected flag is 0 (that is, the PC card memory 1 is unused or usable), the process proceeds to step S4,
After adding one bit to the card reproduction detection flag, the process proceeds to step S23.

In step S23, for example, when the user selects an audio data number using the operation button of the key input unit 3, the process proceeds to step S24, where the CPU 4 determines the audio data number in the reproduction inhibition control word area. Is detected as to whether or not the music reproduction detection flag corresponding to.

In step S24, the CPU 4 detects the flag corresponding to the most significant bit of the music reproduction detection flag if the music reproduction detection flag is a multi-bit shift register, and sets the music reproduction detection flag to 1 bit. , The flag corresponding to the corresponding bit is detected. In step S24, the CPU
4 indicates that the flag corresponding to the corresponding music reproduction detection flag is 0
If not (ie, when the corresponding audio data in the PC card memory 1 has reached the number of times of reproduction), the process proceeds to step S29. For example, in the attached PC card memory 1, the audio data corresponding to the corresponding audio data number is no more. An error message indicating that data cannot be reproduced is displayed on the LCD display unit 2.
And a command to prohibit reproduction is issued to control the corresponding audio data in the PC card memory 1 not to be transmitted to the system bus.
And the subsequent control operation is performed. On the other hand, if the detected flag is 0 (that is, the corresponding audio data in the PC card memory 1 is unused or usable), the process proceeds to step S2.
Move to 6.

After instructing the reproduction of the relevant audio data in step S26, the CPU 4 sequentially transfers the relevant audio data from the PC card memory 1 to the buffer RAM 8 via the system bus, and transfers the data to the buffer RAM 8. The output audio data is output from the audio output unit 5 via the D / A converter of the information reading device. Step S2
At 7, the CPU 4 detects that the audio data started to be reproduced in step S26 has output the audio data corresponding to the end address of the audio data block, thereby detecting that the reproduction has been completed. The process proceeds to step S25, and after adding one bit to the music reproduction detection flag, the process proceeds to step S28.

In step S28, the CPU 4 determines whether or not the next audio data number selected in the previous step S23 is still present. If it is determined that there is no more, the control operation ends (ends). At this time, the CPU 4
Alternatively, the PC card memory 1 may be ejected from the information reading device at the end of the control operation. Also,
In step S28, the CPU 4 executes the processing in step S2.
If it is determined that the next audio data number selected in step 3 still exists, the process returns to step S24.

Since the control operation of the CPU 4 in the fifth embodiment is performed as described above, the control of the CPU 4 according to the shift register configuration of the card reproduction detection flag of the PC card memory 1 is performed.
The number of mounting operations of the C card memory 1 is limited, and P
The number of times the recorded information in the PC card memory 1 is reproduced can be limited according to the bit number of the shift register of the music reproduction detection flag corresponding to each audio data in the C card memory 1. However, in the fifth embodiment, a flag is written when the reproduction of each audio data is completed. Therefore, unless the audio data can be reproduced, the PC card memory 1 is not mounted in the information reproducing apparatus. , CPU4 is PC
Unless the end of reproduction of the selected audio data in the card memory 1 is detected, the audio data can be rewound and reproduced from the start address any number of times.

In each of the first to fifth embodiments described above, the CP
U4 reproduces all audio data or the corresponding audio data in the PC card memory 1 based on the card reproduction detection flag or the music reproduction detection flag in the reproduction prohibition control word area provided in the index information section of the PC card memory. This is an example of a case where the prohibition control is performed to limit the number of times the PC card memory 1 is used. However, the present invention is not limited to this. For example, the CPU 4 performs a write control operation of overwriting all or part of the audio data in the PC card memory 1 so as to prevent the audio data from being reproduced. The number of uses of the PC card memory 1 may be limited using the above-described reproduction detection flag. The control operation of the CPU 4 in such a case will be described below as sixth and seventh embodiments using flowcharts.

In the sixth embodiment, the CPU 4 sequentially reads out audio data in the PC card memory 1 from the PC card memory 1 and transfers it to the buffer RAM 8, and reads out the transferred audio data from the buffer RAM 8. The audio data in the PC card memory 1 is erased by repeatedly performing an operation of performing reproduction and an operation of sequentially overwriting a portion where the read audio data is recorded in the PC card memory 1 with 0 data. Then, the audio data is not reproduced from the next time. In particular, in this embodiment, by combining with the above-described third embodiment,
The number of times of reproduction is controlled. Note that reading of audio data from the PC card memory 1 controlled by the CPU 4 and
The switching timing for writing 0 data to the audio data in the PC card memory 1 is set based on the transfer rate, the reproduction rate, the capacity of the buffer RAM 8, and the writing speed.

FIG. 10 shows the CP in the sixth embodiment.
It is a flowchart which shows the control operation of U4. In FIG. 10, the CPU 4 first determines in step S31 whether or not the PC card memory 1 has been mounted on the information reading device, and proceeds to step S32 if the PC card memory 1 has been mounted. In step S32, the index information of the inserted PC card memory 1 is read and stored in the buffer RAM 8. In step S33, for example, the user
When the audio data number is selected by using the operation button, the process proceeds to step S34, and the CPU 4 detects whether or not the music reproduction detection flag corresponding to the audio data number in the reproduction prohibition control word area is 0.

In step S34, the CPU 4 detects the flag corresponding to the most significant bit of the music reproduction detection flag if the music reproduction detection flag is constituted by a shift register of a plurality of bits, and sets the music reproduction detection flag to 1 bit. In the case of a configuration using a shift register, a flag corresponding to a corresponding bit is detected, and if the detected flag is not 0 (that is, P
If the corresponding audio data in the C card memory 1 has reached the number of times of reproduction), the process proceeds to step S49. For example, the attached PC card memory 1 cannot reproduce the audio data corresponding to the relevant audio data number any more. An error message to that effect is displayed on the LCD display unit 2 and a reproduction prohibition command is issued to control the corresponding audio data in the PC card memory 1 not to be transmitted to the system bus, and then the control operation ends (ends). At this time, the CPU 4 may cause the information reading device to eject the PC card memory 1 at the same time as the end of the control operation. On the other hand, if the flag corresponding to the corresponding music reproduction detection flag is 0 (that is, the corresponding audio data in the PC card memory 1 is unused or usable) in step S34, the process proceeds to step S35 and the CPU 4 Sets an area in the buffer RAM 8 for transferring audio data. Setting of this area means buffer RAM
8, for example, to secure a free space of N bytes.

Next, the CPU 4 shifts to step S36, and sets the music reproduction detection flag corresponding to the audio data to 1
After adding the bits, the process proceeds to step S37. In step S37, the CPU 4 detects the music reproduction detection flag to which 1 bit has been added in step S36, and when the detected flag is 0 (that is, the corresponding audio data in the PC card memory 1 has not reached the number of times of reproduction). In this case, that is, when reproduction is possible again, the process proceeds to step S38, in which a reproduction instruction of the corresponding audio data is issued, and then the audio data is sequentially transferred to the buffer RAMB in the PC card memory 1 and accumulated. Further, the CPU 4 includes a buffer RAMB
Is sequentially transferred to the buffer RAM 8 via the system bus, and the audio data transferred to the buffer RAM 8 is output from the Audio output unit 5.

In step S39, the CPU 4 detects that the audio data corresponding to the end address of the audio data block started to be reproduced in step S38 has been output, thereby detecting that the reproduction has been completed.
Then, control goes to a step S40. In step S40, the CPU 4 determines whether or not there is still the next audio data number selected in step S33. If it is determined that there is no more, the process proceeds to step 49 described above. If the CPU 4 determines in step S40 that the next audio data number selected in step S33 still exists, the process returns to step S34 again.

On the other hand, in step S37, the CPU 4
Indicates that the detected flag is not 0 (ie, step S3
If one bit of the music reproduction detection flag is added in step 6 and the corresponding audio data in the PC card memory 1 cannot be reproduced again (that is, reproduction can be performed only this time), the process proceeds to step S41. Then, after issuing a reproduction command of the corresponding audio data, the audio data is sequentially transferred from the PC card memory 1 to the buffer RAM 8 and the audio data transferred and accumulated in the buffer RAM 8 is output from the audio output unit 5. , And the reproduction is started, and the routine goes to Step S42.

Since the transfer speed at which the audio data is transferred from the PC card memory 1 to the buffer RAM 8 is faster than the transfer speed at which the audio data is transferred from the buffer RAM 8 to the audio output unit 5, the audio data within the buffer RAM 8 is transferred. Accumulates in increasing capacity. Therefore, in step S42, the CPU 4 detects the amount of audio data gradually accumulated in the buffer RAM 8 in parallel with the audio data reproduction operation, and reaches the above-mentioned Nbytes set in the buffer RAM 8 (that is, Nbyte
If the RAM has been filled with audio data) or if all of the audio data has been transferred within Nbytes, the process proceeds to step S43 to perform an operation of transferring the audio data in the flash memory 10 to the buffer RAM 8. At the same time, the mode is switched from the read operation to the write operation in the PC card memory 1. That is, CPU4
Performs switching from the read operation buffer RAMB in the PC card memory 1 to the write operation buffer RAMA.

In step S44, the CPU 4 detects the head address of the data that has been transferred to the buffer RAMB among the audio data currently recorded in the flash memory 10, and thereby determines the buffer RAM.
The address for writing the 0 data already stored in A is designated, and then the process proceeds to step S45. In step S45, the CPU 4 performs control to transfer the 0 data already stored in the buffer RAMA to the flash memory 10 and to sequentially overwrite the audio data from the above-mentioned head address.

At the same time that the 0 data in the buffer RAMA is transferred to the flash memory 10, the CPU 4 sends out the Write signal (0 data) to the buffer RAMA via the system bus, so that the 0 data is again stored in the buffer RAMA. Data is accumulated. Since 0 data is overwritten on the audio data by these writing control operations, the overwritten audio data is erased and cannot be reproduced.

Next, the CPU 4 shifts to a step S46, and detects whether or not the 0 data overwritten on the audio data by the write control operation has reached Nbytes.
If it is detected that Nbytes have been reached, or if it is detected whether or not a predetermined amount of audio data stored in the buffer RAM 8 has been transmitted to the audio output unit 5 to the system bus, the process proceeds to step S47. .

In step S47, if the CPU 4 detects that all the audio data has been transmitted to the system bus by transmitting the data corresponding to the end address of the audio data, the CPU 4 reads out the audio data selected this time. It is determined that the process has been completed, and the process returns to step S40 described above. If the CPU 4 detects in step S47 that all of the audio data has not been transmitted to the system bus, the CPU 4 determines that reading of the audio data selected this time has not been completed, and proceeds to step S48. Transition. In step S48, the CPU 4 suspends the write control operation in step S45,
Buffer RA for read operation in PC card memory 1
After switching from the MB to the buffer RAMA for the write operation, the process returns to step S41 described above.

Accordingly, the CPU 4 repeats the operations of steps S41 to S48 described above to sequentially reproduce the selected audio data, and overwrites the portion of the audio data for which reproduction has been completed with 0 data. Therefore, the audio data can be prevented from being reproduced from the next time.
Is performed as described above, and in the same manner as in the third embodiment described above, according to the number of bits of the shift register of the music reproduction detection flag corresponding to each audio data in the PC card memory 1, The number of times of reproduction of the audio data can be limited.

In the above-described sixth embodiment, the control of adding one bit to the music reproduction detection flag in step S36 by using the third embodiment is performed in steps S38 and S4.
This is performed after the first music reproduction start operation and the data read operation. For example, using the fourth embodiment, step S36 is performed.
Control to add one bit to the music reproduction detection flag of
The control operation of Step S36 performed by Step 4 is performed in Step S39.
And after the detection of the end of reproduction in S47.
FIG. 11 shows a flowchart of the control operation of the CPU 4 using this example as a seventh embodiment. Here, the description of each step is omitted.

In the seventh embodiment as well, the selected audio data is sequentially reproduced, and 0 data is overwritten on the portion of the audio data for which reproduction has been completed. Therefore, the audio data can be prevented from being reproduced from the next time, and according to the bit number of the shift register of each music reproduction detection flag corresponding to each audio data in the PC card memory 1, You can limit the number of playbacks. However, in the seventh embodiment, similarly to the fourth embodiment, when the reproduction of each audio data is completed, a flag is written. Therefore, unless the audio data cannot be reproduced, the PC card memory 1 reproduces the information. When the CPU 4 does not detect the end of reproduction of the selected audio data in the PC card memory 1 in the state of being mounted on the apparatus, the audio data can be rewound and reproduced from the start address any number of times. I will.

Each of the sixth and seventh embodiments described above uses a PC
Based on the music reproduction detection flag in the reproduction prohibition control word area provided in the index information section of the card memory,
This is an example of a case where the number of uses of the PC card memory 1 is limited by overwriting all or a part of the corresponding audio data in the C card memory 1.

However, the present invention is not limited to this. Each of the PC card memories 1 for limiting the number of times of use is provided with a unique ID for identifying the PC card memory 1 or information recorded in the PC card memory 1. It is also possible to record the number as a number and use the card ID number to limit the number of uses. That is, when the card is mounted on the information reading device, the card ID number is stored in the history memory 6 and the unique card ID already recorded is stored.
The number may be compared with the card ID number of the PC card memory 1 being mounted to determine whether or not the PC card memory 1 has been used. The control operation of the CPU 4 in that case will be described below as eighth and ninth embodiments.

FIG. 12 shows the CP in the eighth embodiment.
It is a flowchart which shows the control operation of U4. In FIG. 12, in step S51, it is determined whether or not the PC card memory 1 is mounted on the information reading apparatus. If the PC card memory 1 is mounted, the process proceeds to step S52 to switch the insertion detection bit in the CPU 4 from 0 to 1. Thereby, the operation of each section of the information reading device is started, and the routine goes to Step S53. In step S53, the CPU 4 reads out the card ID number from the index information of the inserted PC card memory 1, and proceeds to step S54.

At step S54, the CPU 4 compares the read card ID number with the card ID number provided in the history memory 6 and proceeds to step S5.
Move to 5. In step S55, the CPU 4
The card I provided in the history memory 6 by the above comparison
The installed PC card memory 1 in the D number register
If it does not match the card ID number read from the PC card memory 1, it is considered that the currently mounted PC card memory 1 will be used for the first time, and the process proceeds to step S56. Step S56
Then, the card ID number read from the currently mounted PC card memory 1 is written into the card ID number register provided in the history memory 6, and the process proceeds to step S57.

After issuing a reproduction command in step S57, the CPU 4 controls in step S58 to start reproduction. That is, the audio data in the PC card memory 1 being loaded is transferred to the buffer RAM 8 via the system bus, and the audio data transferred to the buffer
Output from the audio output unit 5. In step S64,
The CPU 4 detects that all the audio data recorded in the PC card memory 1 has been completed, and then proceeds to step S6.
Then, the process goes to 3 to eject the mounted PC card memory 1 from the information reading device, and then ends the control operation (end).

On the other hand, in step S55, the data matching the data corresponding to the card ID number read from the PC card memory 1 being loaded is stored in the card ID number register provided in the history memory 6 by the above comparison. If there is, the CPU 4 determines that the installed PC card memory 1 has already been used at least once,
The process moves to step S59. In step S59,
The CPU 4 performs control for writing a match detection flag based on data corresponding to the card ID number read from the PC card memory 1 being mounted.

Here, the match detection flag corresponds to the card reproduction detection flag recorded in the reproduction prohibition control word area in the first to seventh embodiments. In the eighth and ninth embodiments, a card reproduction detection flag for limiting the number of times of use of the PC card memory 1 is not recorded in the PC card memory 1, but the name is set as a match detection flag in the history memory 6. Is recorded in the reproduction prohibition control word area provided in the area. The reproduction prohibition control words in the eighth and ninth embodiments are constituted by shift registers provided corresponding to the stored card ID numbers. The shift register is composed of one or more bits, and the initial state is set to 0 data. Therefore, when the match detection flag is written in step S59, the shift register adds one bit. After controlling to write the coincidence detection flag into the shift register in step S59, the CPU 4 proceeds to step S60.

In step S60, the CPU 4 detects the bit data of the shift register, detects whether or not the coincidence detection flag has been written a predetermined number of times, and determines that the detection flag has not yet been written a predetermined number of times. Shifts to step S57 described above, and executes the subsequent operations in the same manner. If the CPU 4 determines in step S60 that the detection flag has been written a predetermined number of times, the process proceeds to step S61, in which a reproduction prohibition command is output, and the audio data in the PC card memory 1 being mounted is output to the system. Control is performed so as not to be sent to the bus, and the process proceeds to step S62. In step S62, the CPU 4 controls the LCD display unit 2 to display an error message indicating that, for example, the mounted PC card memory 1 cannot be reproduced any more.
After the card memory 1 is ejected from the information reading device, the control operation ends (ends).

Since the control operation of the CPU 4 in the eighth embodiment is performed as described above, when the PC card memory 1 is mounted on the information reading device, the card ID number of the PC card memory 1 being mounted is replaced by The card ID number is compared with the card ID number already stored in the history memory 6, and if it does not match, it is newly stored in the history memory 6. If it matches, the number of matches is detected by the match detection flag. As a result, the number of times the PC card memory 1 can be used can be limited. However, in the eighth embodiment, the comparison of the card ID numbers (steps S53 to S55)
Since the reproduction is performed prior to the reproduction command (step S57), when the usable PC card memory 1 is attached to the information reading device, the reproduction of the audio data in the PC card memory 1 is completed or the PC card memory 1 is ejected. Unless this is done, the audio data in the PC card memory 1 can be reproduced repeatedly from the start address.

In the above-described eighth embodiment,
Comparison of card ID numbers (steps S53 to S55)
Is performed prior to the reproduction command. However, after the reproduction command, the card ID numbers are compared (steps S53 to S5).
Step 5) may be performed. FIG. 13 shows a flowchart of the control operation of the CPU 4 using this example as a ninth embodiment. In the ninth embodiment, the number of uses of the audio data can be limited even if the reproduction of the audio data in the PC card memory 1 is not completed or the PC card memory 1 is not ejected.

The history memory 6 in each of the above-described eighth and ninth embodiments stores all the ID numbers of the PC card memories reproduced in the past by the information reading apparatus. 6 has a limited storage capacity, the number of card ID numbers to be stored may be set to a predetermined number (for example, 10). In this case, when it is necessary to store more card ID numbers than a predetermined number, the old card ID number stored earlier may be deleted. Further, the time for which the history memory 6 stores the card ID number may be set to a predetermined time (for example, about 48 hours) by using the timer 7. In this case, after storing the card ID number, it is retained until a predetermined time elapses, and after the elapse, the card ID number is erased to secure free space. In this case, the history memory 6
The timer 7 is driven by the backup power supply 9 so that the operation of the timer and the storage operation of the history memory can be continued even when the power of the information reading device is turned off.

Although the present invention is configured based on the control operation of the CPU 4 in each of the embodiments described above, the above embodiments may be combined as appropriate. Further, in each of the above-described embodiments, the data in the PC card memory 1 reproduced by the information reading device has been described as the audio data whose number of uses is limited. However, the present invention is not limited to this. There may be.

[0084]

According to the information reading control method of the first aspect of the present invention, the present invention is configured as described above.
Each time the recording information is read from the writable recording medium, a flag indicating that the recording information has been read is written to the recording medium,
By prohibiting reading when it is detected that the flag is written a predetermined number of times, the number of times of reading the recording information from the recording medium can be limited, so that low-cost software can be used. be able to.

According to the information read control method of the present invention, when the record information is read out from the writable recording medium a predetermined number of times, the read record information is rewritten, so that the subsequent information read is performed. Sometimes, the same recorded information is not reproduced as before the predetermined number of times, so that the number of times of reading the recorded information from the recording medium can be limited, so that low-cost software can be used.

According to the information reading apparatus of the present invention, every time the recorded information is read, the coincidence detecting means and the ID information recorded on the recording medium are already stored in the storage means. By comparing the ID information with the ID information and detecting a match, and when it is detected that the ID information recorded on the recording medium matches the predetermined number of times, the reading of the record information is prohibited by the control means, so that the recording is performed. Since the number of times of reading the recorded information from the medium can be limited, low-cost software can be used.

[Brief description of the drawings]

FIG. 1 is a system block diagram of an information reading device according to an embodiment of the present invention.

FIG. 2 is a diagram illustrating an example of a configuration of a PC card memory.

FIG. 3 is a diagram showing a data configuration of a flash memory in a PC card memory.

FIG. 4 is a diagram showing an example of a structure of a reproduction prohibition control word in an index information section.

FIG. 5 is a diagram showing a control operation flowchart of a CPU 4 in the first embodiment.

FIG. 6 is a diagram illustrating a flowchart of a control operation of a CPU 4 in a second embodiment.

FIG. 7 is a diagram showing a control operation flowchart of a CPU 4 in a third embodiment.

FIG. 8 is a diagram showing a control operation flowchart of a CPU 4 in a fourth embodiment.

FIG. 9 is a diagram showing a control operation flowchart of a CPU 4 in a fifth embodiment.

FIG. 10 is a diagram showing a control operation flowchart of a CPU 4 in a sixth embodiment.

FIG. 11 is a diagram illustrating a flowchart of a control operation of a CPU 4 in a seventh embodiment.

FIG. 12 is a diagram showing a control operation flowchart of a CPU 4 in an eighth embodiment.

FIG. 13 is a diagram illustrating a flowchart of a control operation of a CPU 4 in a ninth embodiment.

[Explanation of symbols] 1 ... PC card memory 2 ... LCD display unit 3 ... Key input unit 4 ... CPU 5 ... Audio output unit 6 ... ... History memory 7 .. Timer 8... Buffer RAM 9... Backup power supply 10... Flash memory

Claims (3)

[Claims] 1. An information reading control method for recording information recorded on a writable recording medium, wherein a flag for indicating that the recording information has been read is written to the recording medium every time the recording information is read. An information reading control method, wherein when the number of times of writing of the flag is detected to be a predetermined number, reading of the recording information is prohibited. 2. The information reading control method for recording information recorded on a writable recording medium, wherein the recording information is rewritten at a predetermined number of times of reading of the recording information, whereby the recording information after the predetermined number of times is rewritten. When reading
An information reading control method, wherein the same recorded information as before the predetermined number of times is not reproduced. 3. The recording information is read from the recording medium which records the recording information and ID information for identifying the recording information or identifying a recording medium on which the recording information is recorded. In the information reading device, a storage unit for storing the ID information, and every time the recording information is read, the ID information recorded on the recording medium and the ID already stored in the storage unit.
A match detecting means for comparing the information with the information and detecting a match; and when the match detecting means detects that the ID information recorded on the recording medium matches a predetermined number of times, An information reading device comprising: a control unit for prohibiting reading.