JPH10200382A - Voltage controlled oscillator circuit for low voltage driving - Google Patents
Voltage controlled oscillator circuit for low voltage drivingInfo
- Publication number
- JPH10200382A JPH10200382A JP9015920A JP1592097A JPH10200382A JP H10200382 A JPH10200382 A JP H10200382A JP 9015920 A JP9015920 A JP 9015920A JP 1592097 A JP1592097 A JP 1592097A JP H10200382 A JPH10200382 A JP H10200382A
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- JP
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- Prior art keywords
- voltage
- circuit
- output
- frequency
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000010355 oscillation Effects 0.000 claims abstract description 34
- 239000004065 semiconductor Substances 0.000 claims 1
- 230000011664 signaling Effects 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 4
- 238000001514 detection method Methods 0.000 description 3
- 238000006243 chemical reaction Methods 0.000 description 2
- 230000007423 decrease Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 230000002250 progressing effect Effects 0.000 description 1
- 238000011144 upstream manufacturing Methods 0.000 description 1
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- Logic Circuits (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Amplifiers (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】この発明は、低電圧駆動の電
圧制御発振回路(VCO)に関し、詳しくは、パーソナ
ルコンピュータにおけるクロックの発生とか、オーディ
オ機器や映像機器等の信号処理回路におけるPLL制御
ループなどで使用されるVCOにおいて、低電圧駆動で
も、入力制御電圧信号に対してダイナミックレンジが大
きく採れ、かつ、電源電圧の変動に対して周波数変動の
少ないIC化に適したVCOに関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a voltage controlled oscillator (VCO) driven by a low voltage, and more particularly, to a clock generation in a personal computer, a PLL control loop in a signal processing circuit of an audio device, a video device and the like. The present invention relates to a VCO which has a large dynamic range with respect to an input control voltage signal even when driven at a low voltage, and which is suitable for use in an IC having a small frequency fluctuation with respect to a power supply voltage fluctuation.
【0002】[0002]
【従来の技術】従来、パーソナルコンピュータのクロッ
クの発生、オーディオ機器における周波数シンセサイ
ザ、FM検波回路、また、VTR等の映像機器における
映像検波回路、位相検波回路などでは、ICに内蔵され
る形でPLL制御ループにVCOが設けれている。その
VCOの一例を図2に示す。図において、1は、ICの
内部に設けられたVCOであって、発振周波数制御回路
2と、リング発振器3とから構成されている。なお、8
aは、VCO1の制御電圧端子であり、8bは、その出
力端子、そして9は、位相比較回路,低域フィルタ、デ
バイダーなどで構成されるPLLループ回路である。発
振周波数制御回路2は、電圧/電流変換回路であって、
入力端子8aの制御電圧に応じた電流値をリング発振器
3に供給する。これは、ゲートが接続されたp型のMO
SFET4a,4bからなるカレントミラー回路4と、
ダイオード接続されたMOSFET4aの下流に設けら
れたn型のMOSFET4c、そしてMOSFET4b
の下流に接続された発振回路3とからなる。なお、MO
SFET4a,4bは、そのソース側が電源ラインVDD
に接続され、FET4cのソースは接地され、そのゲー
トに入力端子8aを介して制御電圧信号を受ける。2. Description of the Related Art Conventionally, in a clock generation of a personal computer, a frequency synthesizer and an FM detection circuit in an audio device, and a video detection circuit and a phase detection circuit in a video device such as a VTR, a PLL built in an IC is used. A VCO is provided in the control loop. FIG. 2 shows an example of the VCO. In the figure, reference numeral 1 denotes a VCO provided inside an IC, which comprises an oscillation frequency control circuit 2 and a ring oscillator 3. In addition, 8
a is a control voltage terminal of the VCO 1, 8b is an output terminal thereof, and 9 is a PLL loop circuit composed of a phase comparison circuit, a low-pass filter, a divider, and the like. The oscillation frequency control circuit 2 is a voltage / current conversion circuit,
A current value corresponding to the control voltage of the input terminal 8a is supplied to the ring oscillator 3. This is a p-type MO with a gate connected.
A current mirror circuit 4 including SFETs 4a and 4b;
An n-type MOSFET 4c provided downstream of the diode-connected MOSFET 4a, and a MOSFET 4b
And an oscillation circuit 3 connected downstream. Note that MO
The source side of the SFETs 4a and 4b has a power supply line VDD.
, The source of the FET 4c is grounded, and the gate thereof receives a control voltage signal via the input terminal 8a.
【0003】リング発振器3は、MOSFET4bの出
力であるドレインから導出された電力受給ラインVpと
グランドGND間に接続された3段のインバータからな
る。各インバータは、p型のMOSFETとn型のMO
SFETとを積上げ接続したCMOSのインバータ5,
6,7であって、これらが3段カスケード接続されてそ
の出力端子8b(最終段インバータ7の出力端子)が入
力側の初段インバータ5の入力端子に接続され、これに
より発振回路が形成されている。The ring oscillator 3 comprises a three-stage inverter connected between a power receiving line Vp derived from the drain of the MOSFET 4b and the ground GND. Each inverter has a p-type MOSFET and an n-type MO
CMOS inverter 5, which is stacked and connected with SFET 5,
6, 7 are connected in cascade, and the output terminal 8b (the output terminal of the last-stage inverter 7) is connected to the input terminal of the first-stage inverter 5 on the input side, whereby an oscillation circuit is formed. I have.
【0004】図3は、他の例であり、電源ラインVDDと
リング発振器3との間にn型のMOSFET4dを設け
たものである。このように、IC化されるVCOは、通
常、消費電力の低減などのために、あるいは、デジタル
回路が周辺回路として多い関係から、CMOS形態を主
体として構成される。FIG. 3 shows another example, in which an n-type MOSFET 4 d is provided between a power supply line VDD and a ring oscillator 3. As described above, the VCO that is formed into an IC is generally configured mainly of a CMOS type in order to reduce power consumption or because a digital circuit is often used as a peripheral circuit.
【0005】[0005]
【発明が解決しようとする課題】一方、パーソナルコン
ピュータをはじめとしてオーディオ機器や映像機器で
は、携帯型や省電力化が進み、電源電圧が5Vから3.
3Vへと低下し、さらに最近では、2.5Vあるいは
1.8V程度まで下がって来ている。このように電源電
圧が低下してくると、図2のVCO構成では、電圧/電
流変換回路をカレントミラーで構成している関係でゲー
ト電圧対出力電流特性が電源電圧に影響され、電源電圧
の少しの変動が電源電圧全体からみて大きな割合になっ
て、リング発振器の周波数の変動が電源電圧の変動に大
きく影響される欠点がある。また、図3のVCO構成で
は、ゲート・ソース間の電圧降下分が電源電圧が低い分
だけ、作用して入力端子8aに加えられる入力制御電圧
信号のダイナミックレンジが制限される。この発明は、
このような従来技術の問題点を解決するものであって、
低電圧駆動でも、入力制御電圧信号に対してダイナミッ
クレンジが大きく採れ、かつ、電源電圧の変動に対して
周波数変動の少ない低電圧駆動のVCOを提供すること
にある。On the other hand, in audio equipment and video equipment such as personal computers, portable type and power saving are progressing, and the power supply voltage is changed from 5V to 3.
It has fallen to 3V and more recently to around 2.5V or 1.8V. When the power supply voltage decreases in this manner, in the VCO configuration of FIG. 2, the gate voltage vs. output current characteristic is affected by the power supply voltage because the voltage / current conversion circuit is constituted by a current mirror, and the power supply voltage is reduced. There is a drawback that a slight variation becomes a large ratio when viewed from the entire power supply voltage, and the variation in the frequency of the ring oscillator is greatly affected by the variation in the power supply voltage. Further, in the VCO configuration of FIG. 3, the dynamic range of the input control voltage signal applied to the input terminal 8a is limited because the voltage drop between the gate and the source acts as much as the power supply voltage is low. The present invention
In order to solve such problems of the prior art,
An object of the present invention is to provide a low-voltage driven VCO that has a large dynamic range with respect to an input control voltage signal and has a small frequency fluctuation with respect to a power supply voltage fluctuation even in a low-voltage driving.
【0006】[0006]
【課題を解決するための手段】このような目的を達成す
るこの発明のVCOの特徴は、共通の電力受給ラインに
接続された複数のインバータを多段従属接続し、出力を
入力に帰還することで発振する発振回路と、制御電圧信
号を受けてこれに応じて電力受給ラインに出力を介して
電力を供給し発振回路の発振周波数を制御するボルテー
ジフォロアとを備えるものである。A feature of the VCO according to the present invention that achieves the above object is that a plurality of inverters connected to a common power receiving line are connected in a multistage cascade, and the output is fed back to the input. An oscillation circuit that oscillates, and a voltage follower that receives a control voltage signal, supplies power via an output to a power receiving line in response thereto, and controls the oscillation frequency of the oscillation circuit.
【0007】[0007]
【発明の実施の形態】このように、インバータの動作電
圧を決定する電力受給ラインをボルテージフォロアの出
力にして発振回路を駆動し、ボルテージフォロアの入力
に周波数を制御する制御電圧信号を入力することによ
り、制御電圧と等しい電圧の電力供給を発振回路に与え
てその発振周波数を制御することができる。その結果、
低い電源電圧の回路であっても、制御電圧信号の電圧
は、電源電圧近傍までダイナミックレンジを拡大するこ
とができ、その範囲での発振周波数の制御が可能にな
る。また、発振回路の動作電圧は、制御電圧信号の電圧
で決定されるので、その分、電源電圧の変動の影響を受
け難い。As described above, the power receiving line for determining the operating voltage of the inverter is output from the voltage follower to drive the oscillation circuit, and the control voltage signal for controlling the frequency is input to the input of the voltage follower. Thereby, power supply of a voltage equal to the control voltage can be supplied to the oscillation circuit to control the oscillation frequency. as a result,
Even in a circuit with a low power supply voltage, the voltage of the control voltage signal can expand the dynamic range to near the power supply voltage, and the oscillation frequency can be controlled in that range. Further, since the operating voltage of the oscillation circuit is determined by the voltage of the control voltage signal, the operating voltage is less affected by the fluctuation of the power supply voltage.
【0008】[0008]
【実施例】図1は、この発明のVCOを適用した一実施
例の回路図である。なお、図2と同様な構成要素は同一
の符号で示し、説明を割愛する。図1のVCO10と図
2のそれとの相違は、発振周波数制御回路2が発振周波
数制御回路11に置き換えれれていることである。発振
周波数制御回路11は、いわゆるCMOS形態のボルテ
ージフォロアであって、カレントミラー負荷のMOSF
ETの差動アンプ12と、この差動アンプの出力を受け
る次段アンプ13とからなり、次段アンプ13の出力端
子13bがリング発振器3の電力受給ラインVpに接続
されている。FIG. 1 is a circuit diagram of an embodiment to which the VCO of the present invention is applied. Note that components similar to those in FIG. 2 are denoted by the same reference numerals, and description thereof is omitted. The difference between the VCO 10 of FIG. 1 and that of FIG. 2 is that the oscillation frequency control circuit 2 is replaced by an oscillation frequency control circuit 11. The oscillation frequency control circuit 11 is a so-called CMOS type voltage follower, and a MOSF with a current mirror load.
An ET differential amplifier 12 and a next-stage amplifier 13 receiving the output of the differential amplifier are provided. The output terminal 13 b of the next-stage amplifier 13 is connected to the power receiving line Vp of the ring oscillator 3.
【0009】差動アンプ12は、差動動作をする一対の
n型のMOSFETQ1,Q2と、これの上流に設けられ
たカレントミラー負荷のp型のMOSFETQ3,Q4、
そして、その下流に設けられた定電流源14とからな
り、この定電流回路14を介してMOSFETQ1,Q2
の共通に接続されたソース側がグランドGNDに接続さ
れている。また、負荷であるFETQ3,Q4のソース
は、電源ラインVDDに接続されている。ここで、外部か
ら周波数を制御する制御電圧信号の入力は、FETQ1
のゲートに接続された入力端子13aになっていて、F
ETQ2のゲートは、出力端子13bに接続されて帰還
が行われる。The differential amplifier 12 includes a pair of n-type MOSFETs Q1 and Q2 that perform a differential operation, and current-mirror-loaded p-type MOSFETs Q3 and Q4 provided upstream thereof.
And a constant current source 14 provided downstream thereof, through which the MOSFETs Q1, Q2
Are connected to the ground GND. The sources of the FETs Q3 and Q4, which are loads, are connected to the power supply line VDD. Here, the input of the control voltage signal for controlling the frequency from the outside is the FET Q1
Input terminal 13a connected to the gate of
The gate of the ETQ2 is connected to the output terminal 13b to perform feedback.
【0010】次段アンプ13は、電源ラインVDD側にソ
ースが接続されたp型のMOSFETQ5と、これのド
レインに接続され、下流に設けれた定電流源15とから
なり、定電流源15の他方の端子がグランドGNDに接
続されている。そして、FETQ5のドレインは、出力
端子13bに接続され、そのゲートは、FETQ2のド
レインに接続されている。The next-stage amplifier 13 comprises a p-type MOSFET Q5 having a source connected to the power supply line VDD side, and a constant current source 15 connected to the drain thereof and provided downstream. The other terminal is connected to the ground GND. The drain of the FET Q5 is connected to the output terminal 13b, and the gate is connected to the drain of the FET Q2.
【0011】このような構成のVCO10にあっては、
発振周波数制御回路11の出力側が入力側に帰還されて
いるので、出力電圧が入力制御電圧と等しくなり、電力
受給ラインVpに発生する電流値が制御電圧値に対応し
た電流値になって、リング発振器3に電力供給がなさ
れ、その周波数が制御される。このようなことからリン
グ発振器3の発振周波数が電源電圧の変動を受け難い。
また、入力端子13aに加えられる入力制御電圧信号
は、グランドレベルから電源ラインVDDの電圧−Vsat
(FETQ5のソース−ドレイン間のON時における飽
和電圧)の範囲まで採ることができ、そのダイナミック
レンジが大きく採れる。In the VCO 10 having such a configuration,
Since the output side of the oscillation frequency control circuit 11 is fed back to the input side, the output voltage becomes equal to the input control voltage, the current value generated in the power receiving line Vp becomes a current value corresponding to the control voltage value, and Power is supplied to the oscillator 3 and its frequency is controlled. For this reason, the oscillation frequency of the ring oscillator 3 is hardly affected by the fluctuation of the power supply voltage.
Further, the input control voltage signal applied to the input terminal 13a is changed from the ground level to the voltage −Vsat of the power supply line VDD.
(Saturation voltage at the time of ON between the source and the drain of the FET Q5), so that a large dynamic range can be obtained.
【0012】以上説明してきたが、この発明は、実施例
のようなCMOS構成を主体とする回路の限定されるも
のではない。As described above, the present invention is not limited to a circuit mainly having a CMOS configuration as in the embodiment.
【0013】[0013]
【発明の効果】以上説明してきたが、この発明にあって
は、インバータの動作電圧を決定する電力受給ラインを
ボルテージフォロアの出力にして発振回路を駆動し、ボ
ルテージフォロアの入力に周波数を制御する制御電圧信
号を入力することにより、制御電圧と等しい電圧の電力
供給を発振回路に与えてその発振周波数を制御すること
ができる。その結果、低い電源電圧の回路であっても、
制御電圧信号の電圧は、電源電圧近傍までダイナミック
レンジを拡大することができ、その範囲での発振周波数
の制御が可能になる。また、発振回路の動作電圧は、制
御電圧信号の電圧で決定されるので、その分、電源電圧
の変動の影響を受け難い。As described above, according to the present invention, the power receiving line for determining the operating voltage of the inverter is output as a voltage follower to drive the oscillation circuit, and the frequency is controlled to the input of the voltage follower. By inputting the control voltage signal, power supply of a voltage equal to the control voltage can be supplied to the oscillation circuit to control the oscillation frequency. As a result, even in a circuit with a low power supply voltage,
The voltage of the control voltage signal can expand the dynamic range to near the power supply voltage, and the oscillation frequency can be controlled in that range. Further, since the operating voltage of the oscillation circuit is determined by the voltage of the control voltage signal, the operating voltage is less affected by the fluctuation of the power supply voltage.
【図1】図1は、この発明のVCOを適用した一実施例
の回路図である。FIG. 1 is a circuit diagram of an embodiment to which a VCO of the present invention is applied.
【図2】図2は、従来のIC化されたVCOの回路図で
ある。FIG. 2 is a circuit diagram of a conventional IC VCO.
【図3】図3は、従来の他のIC化されたVCOの回路
図である。FIG. 3 is a circuit diagram of another conventional VCO integrated into an IC.
1,10…VCO、2,11…発振周波数制御回路、 3…リング発振器、4…カレントミラー回路、 5,6,7…インバータ、8a…入力端子、 8b…出力端子、9…PLLループ回路、 12…差動アンプ、13…次段アンプ、 14,15…定電流源。 1, 10 VCO, 2, 11 oscillation frequency control circuit, 3 ring oscillator, 4 current mirror circuit, 5, 6, 7 inverter, 8a input terminal, 8b output terminal, 9 PLL loop circuit, 12: Differential amplifier, 13: Next stage amplifier, 14, 15: Constant current source.
Claims (2)
インバータを多段従属接続し、出力を入力に帰還するこ
とで発振する発振回路と、制御電圧信号を受けてこれに
応じて前記電力受給ラインに出力を介して電力を供給し
前記発振回路の発振周波数を制御するボルテージフォロ
アとを備える低電圧駆動の電圧制御発振回路。1. An oscillation circuit in which a plurality of inverters connected to a common power receiving line are cascaded in a multistage manner, and an oscillation circuit oscillates by returning an output to an input. A voltage follower that supplies power to the line via an output and controls an oscillation frequency of the oscillation circuit.
器であり、前記ボルテージフォロアは、CMOS構成の
差動増幅回路とこの差動増幅回路の出力を受けるMOS
トランジスタのアンプとにより構成され、これら発振回
路とボルテージフォロアとがICに内蔵される請求項1
記載の低電圧駆動の電圧制御発振回路。2. The semiconductor device according to claim 1, wherein said oscillation circuit is a ring oscillator having a CMOS configuration, and said voltage follower has a differential amplifier circuit having a CMOS configuration and a MOS receiving an output of said differential amplifier circuit.
2. An IC comprising a transistor amplifier, wherein the oscillation circuit and the voltage follower are built in the IC.
A low-voltage driven voltage-controlled oscillator according to any of the preceding claims.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9015920A JPH10200382A (en) | 1997-01-13 | 1997-01-13 | Voltage controlled oscillator circuit for low voltage driving |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9015920A JPH10200382A (en) | 1997-01-13 | 1997-01-13 | Voltage controlled oscillator circuit for low voltage driving |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH10200382A true JPH10200382A (en) | 1998-07-31 |
Family
ID=11902228
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9015920A Pending JPH10200382A (en) | 1997-01-13 | 1997-01-13 | Voltage controlled oscillator circuit for low voltage driving |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH10200382A (en) |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001257567A (en) * | 2000-03-08 | 2001-09-21 | Hitachi Ltd | Voltage controlled oscillator, PLL circuit, and semiconductor integrated circuit device |
US6617933B2 (en) | 2000-09-29 | 2003-09-09 | Mitsubishi Denki Kabushiki Kaisha | VCO circuit with wide output frequency range and PLL circuit with the VCO circuit |
US6724268B2 (en) | 2001-12-21 | 2004-04-20 | Denso Corporation | Variable delay circuit, and differential voltage-controlled ring oscillator using the same, and PLL using the oscillator |
US7944256B2 (en) | 2007-03-07 | 2011-05-17 | Hitachi, Ltd. | Semiconductor integrated circuit device |
KR102173800B1 (en) | 2020-06-24 | 2020-11-04 | 한국건설기술연구원 | Road transfer apparatus with rotation control unit on new foundation and foundation reinforcement method thereof |
KR102173798B1 (en) | 2020-06-24 | 2020-11-04 | 한국건설기술연구원 | Load transfer apparatus using brace-type supports and horizontal tensioning device, and foundation strengthening method therewith |
JP2021136574A (en) * | 2020-02-27 | 2021-09-13 | セイコーエプソン株式会社 | Charge pump circuit, PLL circuit and oscillator |
-
1997
- 1997-01-13 JP JP9015920A patent/JPH10200382A/en active Pending
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001257567A (en) * | 2000-03-08 | 2001-09-21 | Hitachi Ltd | Voltage controlled oscillator, PLL circuit, and semiconductor integrated circuit device |
US6617933B2 (en) | 2000-09-29 | 2003-09-09 | Mitsubishi Denki Kabushiki Kaisha | VCO circuit with wide output frequency range and PLL circuit with the VCO circuit |
US6724268B2 (en) | 2001-12-21 | 2004-04-20 | Denso Corporation | Variable delay circuit, and differential voltage-controlled ring oscillator using the same, and PLL using the oscillator |
US7944256B2 (en) | 2007-03-07 | 2011-05-17 | Hitachi, Ltd. | Semiconductor integrated circuit device |
JP2021136574A (en) * | 2020-02-27 | 2021-09-13 | セイコーエプソン株式会社 | Charge pump circuit, PLL circuit and oscillator |
KR102173800B1 (en) | 2020-06-24 | 2020-11-04 | 한국건설기술연구원 | Road transfer apparatus with rotation control unit on new foundation and foundation reinforcement method thereof |
KR102173798B1 (en) | 2020-06-24 | 2020-11-04 | 한국건설기술연구원 | Load transfer apparatus using brace-type supports and horizontal tensioning device, and foundation strengthening method therewith |
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