JPH10199970A - Manufacture of semiconductor elements - Google Patents

Abstract

PROBLEM TO BE SOLVED: To avoid contacting a low-resistance layer to a dielectric film by etching an Ru nitride film and first metal layer, forming a W film on the side wall of the first metal layer, and connecting a second metal layer to the first metal layer through contact holes. SOLUTION: A first Cu layer 32a is formed on a semiconductor substrate 31, and an Ru oxide film 33a is formed on the Cu layer 32a. Using a metal wiring mask, the oxide film 33a and Cu layer 32a are etched, and a W film 34 is formed selectively on the side wall of the remaining Cu layer 32a. To planarize the layer surface of the surface top of the entire structure, an insulation oxide film 35 easy to flow is formed and selectively removed to form contact holes for exposing the first Cu layer 32a, and a second metallic layer 37 is formed of Al, W, Cu, etc.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of forming a capacitor and a metal wiring suitable for high integration of a semiconductor device.

[0002]

2. Description of the Related Art In general, in manufacturing a semiconductor device, while a semiconductor element is highly integrated, a cell size is reduced and a capacitance in proportion to a surface area of a storage electrode is sufficiently ensured. Things are getting harder.

In particular, in a DRAM device in which a unit cell is composed of one MOS transistor and a capacitor, it is necessary to reduce the area while increasing the capacitance of the capacitor occupying a large area in a chip. It is an important factor for integration.

Therefore, (Eo × Er × A) / T (where,
Eo is the dielectric constant of the vacuum, Er is the dielectric constant of the dielectric film, A is the area of the capacitor, T is the capacitance of the capacitor shown in (T), and the dielectric constant Er is high. By forming a dielectric film using a substance having a high dielectric constant, high integration of a semiconductor element has been made possible.

At this time, the dielectric film is generally formed of PZT or BST.

Further, when the above-mentioned dielectric film is used, the lower electrode may be formed of platinum having oxidation resistance, a ruthenium oxide film (RuO2) which is an oxidizing conductor, or an iridium oxide film (IrO2). .

However, during the etching step, the platinum is
It cannot be used because it cannot be etched.

Since the ruthenium oxide film and the iridium oxide film have a large contact resistance value with silicon, the electrical contact resistance between the ruthenium oxide film and the silicon diffusion layer must be reduced.

Therefore, in order to reduce the electrical contact resistance between the ruthenium oxide film and the silicon diffusion layer, a low-resistance layer such as a titanium film / titanium nitride film laminated structure is formed before the lower electrode deposition step. There must be.

However, when the low resistance layer is formed, a dielectric film formed in a subsequent process and the low resistance layer may come into contact with each other, thereby deteriorating the insulation characteristics and the ferroelectric characteristics of the semiconductor device. .

Therefore, there is a problem that the characteristics and reliability of the semiconductor device are reduced, and it is difficult to achieve high integration of the semiconductor device.

On the other hand, in forming a metal wiring of a conventional semiconductor device, first, a copper wiring is formed on a semiconductor substrate, and a tungsten or fire-resistant nitride film is formed thereon.

Next, the structure is etched in an etching step using a metal wiring mask, and the tungsten and the refractory nitride film are formed on the etched copper sidewalls.

Next, an insulating film for planarizing the entire upper surface is formed, and a contact hole exposing the copper wiring is formed by an etching process using a metal wiring contact mask.

Next, a second metal layer connected to the copper wiring is formed to form a metal wiring.

At this time, in the tungsten or the refractory nitride film, oxygen contained in the insulating film cannot suppress the diffusion of the copper wiring, but rather reacts with oxygen to form an oxide film.

Therefore, conventionally, in order to prevent such an oxide film from being formed, alumina (Al 2 O 2) was used instead of the tungsten or the refractory nitride film.

However, the alumina, which is a nonconductive film, has a high contact resistance, and has a drawback that when it is removed, it is not completely removed and it is difficult to form a contact plug.

Therefore, it is difficult to perform a contact step when forming a metal wiring, and this reduces the characteristics and reliability of the semiconductor device. Therefore, it is difficult to achieve high integration of the semiconductor device.

From this point of view, a conventional method of manufacturing a semiconductor device will be described with reference to FIG.

FIG. 1 is a cross-sectional view illustrating a conventional method for forming a capacitor of a semiconductor device.

As shown in FIG. 1, a lower insulating layer 2 is formed on a semiconductor substrate 1. The lower insulating layer 2 is formed on a structure such as an element isolation insulating film (not shown), a gate electrode (not shown), or a bit line (not shown), and then an insulating layer is formed on the exposed entire structure. It is formed by planarizing with a substance.

Next, a contact hole 3 for exposing a predetermined portion of the semiconductor substrate 1 is formed by an etching process using a capacitor contact mask (not shown).

Next, a low resistance layer 4 is formed on the semiconductor substrate 1 including the contact hole 3.

Next, a lower electrode material (not shown) is formed on the low resistance layer 4.

Next, the lower electrode material and the low-resistance layer 4 are etched by an etching process using a storage electrode mask (not shown).
Is etched to form the storage electrode lower electrode 5.

Next, a dielectric film 6 is formed on the lower electrode 5.
To form

At this time, the dielectric film 6 is made of PZT or BS.
Formed with T.

[0029]

As described above, in the conventional method of manufacturing a semiconductor device, a portion "4a" where the low resistance layer and the dielectric film are in contact is generated.

Therefore, in the conventional method for manufacturing a semiconductor device, not only the insulation characteristics between the low resistance layer and the dielectric film but also the ferroelectric characteristics are reduced, and the characteristics and reliability of the semiconductor device are reduced. However, there is a problem that it is difficult to achieve high integration.

On the other hand, when forming the metal wiring, the alumina, which is a non-conductive film, has a high contact resistance. Therefore, even if an attempt is made to remove the alumina, it is not completely removed, and it is difficult to form a contact plug. .

For this reason, the contact step in forming the metal wiring is difficult, and the characteristics and reliability of the semiconductor device are reduced. Therefore, it is difficult to highly integrate the semiconductor device.

The present invention has been made to solve the above-mentioned conventional problems, and a first object of the present invention is to eliminate a portion in which a low-resistance layer and a dielectric film are in contact with each other, thereby achieving a semiconductor device. It is an object of the present invention to provide a method for manufacturing a semiconductor device having a capacitor capable of improving the insulation and ferroelectric characteristics of a semiconductor device.

A second object of the present invention is to prevent diffusion of oxygen from a planarized insulating film when forming a metal wiring,
It is an object of the present invention to provide a method of manufacturing a semiconductor device capable of improving characteristics and reliability of a metal wiring.

A third object of the present invention is to provide a method of manufacturing a semiconductor device suitable for high integration of a semiconductor device by improving characteristics and reliability of the semiconductor device.

[0036]

According to a first aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising: supplying a semiconductor substrate; and forming a first metal layer on the lower insulating layer. Forming a ruthenium oxide film on the first metal layer, etching the ruthenium oxide film and the first metal layer sequentially by an etching process using a metal wiring mask, Selectively forming a tungsten film on the side wall of the formed first metal layer, forming an insulating film on the upper surface of the entire structure, and etching using a metal wiring contact mask to select the insulating film. Forming a contact hole exposing the first metal layer by removing the first metal layer, and forming a second metal layer connected to the first metal layer through the contact hole. And forming a metal interconnection including a step, the to.

According to the first aspect of the present invention, there is no increase in resistance due to the material remaining on the first metal layer during the contact forming step, and there is no oxygen diffusion from the planarization layer to the first metal layer. After forming the film on the first metal layer, a metal wiring step is performed, whereby characteristics and reliability of the metal wiring step can be improved.

The first metal layer is formed of a copper layer, and the copper layer is
1 to 50 m from 0 to 200 W power using argon gas
It may be formed by a sputtering method at a pressure of Torr for 1 to 30 minutes. Further, the copper layer is formed of Cu
(Hfac) (tmvs) as source 150-25
0 ° C. and a pressure of 0.01 to 10 Torr for 10 seconds to
The deposition may be performed for 10 minutes. Further, it is preferable that the ruthenium oxide film is formed to have a thickness of 50 to 300 Å. The ruthenium oxide film is formed by a DC magnetron sputtering method.
Vapor deposition may be performed for 30 seconds to 5 minutes using an argon gas at a flow rate of 5 to 300 SCCM from an electric power of 00 to 1000 W and an oxygen gas at a flow rate of 5 to 100 SCCM. The ruthenium oxide film is made of Ru (NO) (NO3), Ru
Using O4, RuF5 or Ru (C5H5) 2 as source
Deposition temperature of 00 to 600 ° C and 1mTorr to 100T
It may be formed by vapor deposition at a vapor pressure of orr for 1 to 30 minutes. Further, the selective tungsten film is formed of W
The flow rate of F6 / SiH4 gas is set to 10/5 to 20/10 SCCM, the deposition temperature is set to 200 to 400C, and the flow rate is set to 10 to 50.
It is preferable that the film is formed to a thickness of 100 to 1000 Å at a deposition pressure of 0 mTorr.

[0039]

BEST MODE FOR CARRYING OUT THE INVENTION

[First Embodiment] The present invention will be described below in detail with reference to the accompanying drawings.

FIGS. 2 to 4 are vertical sectional side views showing a capacitor forming step in the method for manufacturing a semiconductor device according to the first embodiment of the present invention.

First, the semiconductor substrate 11 is supplied to a predetermined position, and a lower insulating layer 12 is formed on the semiconductor substrate 11 as shown in FIG.

After a structure such as an element isolation insulating film (not shown), a gate electrode (not shown), or a bit line (not shown) is formed, a flow is easily formed on the exposed whole structure. Planarized with a suitable insulating material to form a lower insulating layer 1
Form 2

Next, in an etching process using a capacitor contact mask (not shown), a contact hole 13 for exposing a predetermined portion of the semiconductor substrate 11 is formed.

Next, a ruthenium film 14 connected to the semiconductor substrate 11 via the contact hole 13 is formed with a certain thickness.

The ruthenium film 14 is an oxidizing conductor, and an iridium film can be used instead.

The ruthenium film 14 has a thickness of about 1000 to 5000
Angstrom thickness.

The ruthenium film 14 is formed by sputtering or chemical vapor deposition: chemical vapor deposition (CVD).
Formed.

At this time, the sputtering method is performed using ruthenium as a target.

Further, in the chemical vapor deposition method, the metal organic compound containing ruthenium is thermally decomposed or deposited by using RuO4.

Next, as shown in FIG. 3, the ruthenium film 14 is etched by an etching process using a storage electrode mask (not shown) to form a lower electrode 14a.

In the etching step of the ruthenium film 14, first, a chemical substance such as Cl2, Br or CF4 is excited into plasma, and the ruthenium film 14 is etched using the plasma.

Next, as shown in FIG.
Is oxidized to form a ruthenium oxide film 15 with a certain thickness on the surface of the lower electrode 14a.

The ruthenium oxide film 15 has a thickness of about 100 to 1
It is formed to a thickness of 000 angstroms.

At this time, the surface oxidation step includes oxygen plasma,
That is, the semiconductor substrate 11 is heated to about 400 to 800 ° C. in glow discharge plasma using oxygen or in an oxidizing atmosphere using ozone gas.

At this time, although not shown in the drawing, the contact resistance is reduced by forming silicide at a contact portion between the ruthenium film 14 and the semiconductor substrate 11.

Next, in a subsequent step, a dielectric film (not shown) and an upper electrode (not shown) are sequentially formed on the surface of the lower electrode 14a.

At this time, it is preferable that the dielectric film is formed of PZT or BST.

The upper electrode may be formed of a ruthenium oxide film or an iridium oxide film, such as the lower electrode 14a, or a material having a similar conductivity.

Since the method of manufacturing a semiconductor device according to this embodiment is configured as described above, the insulating characteristics and the dielectric characteristics of the semiconductor device can be improved while simplifying the manufacturing process of the semiconductor device. Contact resistance can be reduced.

Accordingly, the characteristics and reliability of the semiconductor device can be improved, and it is suitable for manufacturing a highly integrated semiconductor device.

[Second Embodiment] FIG. 5 is a vertical sectional side view showing a method for manufacturing a semiconductor device according to a second embodiment of the present invention.

First, as shown in FIG. 5, a lower insulating layer 22 is formed on the supplied semiconductor substrate 21.

The lower insulating layer 22 is formed by forming a structure such as an element isolation insulating film (not shown), a gate electrode (not shown), or a bit line (not shown), and then exposing the upper part of the entire structure. It is formed by a step of flattening with an insulating material which is easy to flow.

Next, in an etching step using a capacitor contact mask (not shown), the semiconductor substrate 2
A contact hole 23 exposing a predetermined portion 1
To form

Next, a contact plug 24 filling the contact hole 23 is formed.

This contact plug 24 is preferably formed of doped polycrystalline silicon.

Next, the first surface is placed on the entire surface.
A ruthenium film 25 used for the lower electrode is formed by the same process as that of the embodiment, and a ruthenium oxide film 26 is formed on the surface of the ruthenium film 25.

In this case, an iridium film can be used instead of the ruthenium film 25, and an iridium oxide film can be used instead of the ruthenium oxide film 26.

Next, in a subsequent step, the ruthenium oxide film 26 is formed.
A dielectric film (not shown) and an upper electrode (not shown) are formed on the exposed surface.

In this case, the dielectric film is made of PZT or BS.
Formed with T.

As described above, the method for manufacturing a semiconductor device according to this embodiment includes the steps of forming a contact hole in a semiconductor substrate and forming a contact plug in the contact hole to fill the contact hole. Is included, so that the problem of the step coverage due to the high integration of the semiconductor element is solved by the contact plug formed in the contact hole, and the characteristics and reliability of the semiconductor element are improved. be able to.

Therefore, the characteristics and reliability of the semiconductor device can be improved, and it is suitable for manufacturing a highly integrated semiconductor device.

The upper electrode may be formed of a ruthenium oxide film, an iridium oxide film, or a material having similar conduction characteristics as the lower electrode.

[Third Embodiment] A method of manufacturing a semiconductor device according to a third embodiment of the present invention will be described with reference to FIGS.

FIGS. 6 to 10 are longitudinal sectional side views showing a step of forming a metal wiring of a semiconductor device in a method of manufacturing a semiconductor device according to a third embodiment of the present invention.

First, as shown in FIG.
A copper layer 32, which is a first metal layer, is formed on top of the first metal layer.

Next, a ruthenium oxide film 33a is formed on the copper layer 32 to a predetermined thickness.

The copper layer 32 is formed by sputtering.
g) Method and chemical vapor deposition (CVD)
sition) method to a thickness of about 2000-4000 angstroms.

Further, when copper is deposited by using the above-mentioned sputtering method to form the copper layer 32, 50 to 200 W
(Watt) About 1 to 50 mTo with electric power using argon gas
Deposit at rr pressure for about 1-30 minutes.

Further, when the above-mentioned CVD method is used,
Using Cu (hfac) (tmvs) as a source, a temperature of about 150 to 250 ° C. and a temperature of about 0.01 to 10 Torr
Deposit under pressure for about 10 seconds to 10 minutes.

On the other hand, the ruthenium oxide film 33a has a thickness of about 50 to
Deposit to a thickness of 300 angstroms, about 100 to 1
Approximately 30 using argon and oxygen gas under 000 W power
Seconds to 5 minutes, DC magnetron sputtering (DC m
agnetron sputterinng) method.

At this time, the argon gas is 5 to 300 S
The oxygen gas flows at a flow rate of about 5 to 100 SCCM using the CCM flow rate.

Next, the ruthenium oxide film 33a is
Ru (NO) (NO3) when depositing by the VD method
, RuO4, RuF5, Ru (C5H5) 2, etc. as a source, a deposition temperature of about 100-600 ° C.,
About 1 mTorr to about 100 Torr under a deposition pressure of about 1 mTorr.
Deposit for ~ 30 minutes.

Then, as shown in FIG. 7, the ruthenium oxide film 33a and the copper layer 32a are sequentially etched in an etching step using a metal wiring mask (not shown).

Next, as shown in FIG. 8, a selective tungsten 34 is formed on the side wall of the copper layer 32a which is etched under the process of FIG.

When the selective tungsten 34 is formed, WF6 / SiH4 is used as a source gas, and WF6 / SiH4 is used.
The flow rate of H4 gas is about 10/5 to 20/10 SCCM.

The deposition temperature is about 200 to 400 ° C., and the deposition pressure is about 100 to 500 mTorr and about 100 to 400 mTorr.
It is formed to a thickness of 1000 angstroms.

Then, as shown in FIG. 9, an oxide film 35 is formed to a thickness of about 5000 to 10000 angstroms in order to flatten the surface of the layer over the entire structure.

This oxide film 35 is preferably formed of an insulating material that can easily flow.

Next, the contact hole 36 exposing the copper layer 32a as the first metal layer is formed by selectively removing the oxide film 35.

The contact holes 36 are formed by an etching process using a metal wiring contact mask (not shown).

Next, the second metal layer 37 is formed of aluminum, tungsten, copper, or the like.
It is formed to a thickness of 00 angstroms.

Since the method for manufacturing a semiconductor device according to this embodiment is configured as described above, there is no increase in resistance due to the material remaining on the first metal layer during the contact forming step, and planarization is achieved. After forming a ruthenium oxide film without oxygen diffusion from the layer to the first metal layer on the first metal layer,
By performing the metal wiring process, characteristics and reliability of the metal wiring process can be improved.

Therefore, the characteristics and reliability of the semiconductor device can be improved, and it is suitable for manufacturing a highly integrated semiconductor device.

[0095]

According to the method of manufacturing a semiconductor device according to the present invention, the following effects can be obtained. According to the present invention, a ruthenium oxide film without an oxygen diffusion from the planarization layer to the first metal layer does not increase in resistance due to a substance remaining on the first metal layer during the contact forming step, and is formed on the first metal layer. By performing the metal wiring step after the formation, the characteristics and reliability of the metal wiring step can be improved.

Further, the characteristics and reliability of the semiconductor device can be improved, which is suitable for manufacturing a highly integrated semiconductor device.

[Brief description of the drawings]

FIG. 1 is a vertical sectional side view showing a conventional example of a method for manufacturing a semiconductor element.

FIG. 2 is a vertical sectional side view showing a method of forming a capacitor in the method of manufacturing a semiconductor device according to the first embodiment of the present invention.

FIG. 3 is a vertical sectional side view showing a method of forming a capacitor in the method of manufacturing a semiconductor device according to the first embodiment of the present invention.

FIG. 4 is a vertical sectional side view showing a method of forming a capacitor in the method of manufacturing a semiconductor device according to the first embodiment of the present invention.

FIG. 5 is a vertical sectional side view showing a capacitor manufacturing step in a method for manufacturing a semiconductor device according to a second embodiment of the present invention.

FIG. 6 is a vertical sectional side view showing a metal wiring forming step in a method for manufacturing a semiconductor device according to a third embodiment of the present invention.

FIG. 7 is a vertical sectional side view showing a metal wiring forming step in a method for manufacturing a semiconductor device according to a third embodiment of the present invention.

FIG. 8 is a vertical sectional side view showing a metal wiring forming step in a method for manufacturing a semiconductor device according to a third embodiment of the present invention.

FIG. 9 is a vertical sectional side view showing a metal wiring forming step in a method for manufacturing a semiconductor device according to a third embodiment of the present invention.

FIG. 10 is a vertical sectional side view showing a metal wiring forming step in a method for manufacturing a semiconductor device according to a third embodiment of the present invention.

[Explanation of symbols]

 Reference Signs List 11 semiconductor substrate 12 lower insulating layer 13 contact hole 14, 14a ruthenium film 15 dielectric film

Claims (7)

[Claims] A step of providing a semiconductor substrate; a step of forming a first metal layer on the lower insulating layer; a step of forming a ruthenium oxide film on the first metal layer; A step of sequentially etching the ruthenium oxide film and the first metal layer according to the used etching step; a step of selectively forming a tungsten film on a side wall of the etched first metal layer; A step of forming a film; a step of forming a contact hole exposing the first metal layer by selectively removing the insulating film by an etching step using a metal wiring contact mask; Forming a second metal layer connected to the first metal layer, and forming a metal wiring. 2. The method according to claim 1, wherein the first metal layer is formed of a copper layer,
1 to 50 m from 0 to 200 W power using argon gas
2. The method according to claim 1, wherein the sputtering is performed at a pressure of Torr for 1 to 30 minutes. 3. The method according to claim 1, wherein the copper layer is formed of Cu (hfac) (tmv
s) as a source at a temperature of 150 to 250 ° C. and 0.01
3. The method according to claim 2, wherein the deposition is performed at a pressure of 10 to 10 Torr for 10 seconds to 10 minutes. 4. The method according to claim 1, wherein the ruthenium oxide film is formed to a thickness of 50 to 300 Å. 5. The method according to claim 1, wherein the ruthenium oxide film is formed by a DC magnetron sputtering method using argon having a power of 100 to 1000 W and a flow rate of 5 to 300 SCCM, and 5 to 10 SCCM.
2. The method according to claim 1, wherein the vapor deposition is performed using oxygen gas at a flow rate of 0 SCCM for 30 seconds to 5 minutes. 6. The ruthenium oxide film is made of Ru (NO).
(NO3), RuO4, RuF5, Ru (C5H5) 2, etc. as a source at a deposition temperature of 100 to 600 DEG C. and 1 mT
2. The method according to claim 1, wherein the semiconductor device is formed by vapor deposition at a vapor deposition pressure of orr to 100 Torr for 1 to 30 minutes. 7. The method according to claim 7, wherein the selective tungsten film is WF6 / S
The flow rate of iH4 gas is set to 10/5 to 20/10 SCCM, the deposition temperature is 200 to 400 [deg.] C. and 10 to 500 mT.
2. The method according to claim 1, wherein the semiconductor device is formed to a thickness of 100 to 1000 angstroms at a deposition pressure of orr.